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Differential D40172

[AMDGPU] SDWA: remove omod src operand for VOP2b instructions
ClosedPublic

Authored by SamWot on Nov 17 2017, 3:41 AM.

Details

Reviewers
rampitec
dp
Commits
rGc27e3b6f032e: [AMDGPU] SDWA: remove omod src operand for VOP2b instructions
rL318761: [AMDGPU] SDWA: remove omod src operand for VOP2b instructions
Summary

VOP2b instructions (v_subbrev_u32, v_add_i32 ...) shouldn't support OMod operand in SDWA encoding

Diff Detail

Repository
rL LLVM

Event Timeline

SamWot created this revision.Nov 17 2017, 3:41 AM
Herald added subscribers: t-tye, tpr, dstuttard and 5 others. · View Herald TranscriptNov 17 2017, 3:41 AM
Harbormaster completed remote builds in B12271: Diff 123315.Nov 17 2017, 3:42 AM
dp accepted this revision.Nov 17 2017, 4:58 AM

Looks good

This revision is now accepted and ready to land.Nov 17 2017, 4:58 AM
rampitec accepted this revision.Nov 17 2017, 8:10 AM

Thank you!

SamWot updated this revision to Diff 123773.Nov 21 2017, 5:42 AM

Fix for VOP2b instructions was submitted in D40088.
Added SDWA dissassembler tests for VI.

Closed by commit rL318761: [AMDGPU] SDWA: remove omod src operand for VOP2b instructions (authored by skolton). · Explain WhyNov 21 2017, 6:12 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
MC/
Disassembler/
AMDGPU/
18 lines
17 lines

Diff 123776

llvm/trunk/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt

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0xf9 0x06 0x02 0x62 0x02 0x06 0x05 0x02 0xf9 0x06 0x02 0x62 0x02 0x06 0x05 0x02
# GFX9: v_min_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x64,0x02,0x06,0x05,0x02] # GFX9: v_min_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x64,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x64 0x02 0x06 0x05 0x02 0xf9 0x06 0x02 0x64 0x02 0x06 0x05 0x02
# GFX9: v_ldexp_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x66,0x02,0x06,0x05,0x02] # GFX9: v_ldexp_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x66,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x66 0x02 0x06 0x05 0x02 0xf9 0x06 0x02 0x66 0x02 0x06 0x05 0x02
# GFX9: v_add_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x32,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x32 0x02 0x06 0x05 0x02
# GFX9: v_sub_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x34,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x34 0x02 0x06 0x05 0x02
# GFX9: v_subrev_co_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x36,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x36 0x02 0x06 0x05 0x02
# GFX9: v_addc_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x38,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x38 0x02 0x06 0x05 0x02
# GFX9: v_subb_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3a,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x3a 0x02 0x06 0x05 0x02
# GFX9: v_subbrev_co_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3c,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x3c 0x02 0x06 0x05 0x02
#-----------------------------------------------------------------------------# #-----------------------------------------------------------------------------#
# VOPC # VOPC
#-----------------------------------------------------------------------------# #-----------------------------------------------------------------------------#
# GFX9: v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x02,0x04] # GFX9: v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x02,0x04]
0xf9 0x04 0x84 0x7c 0x01 0x00 0x02 0x04 0xf9 0x04 0x84 0x7c 0x01 0x00 0x02 0x04
# GFX9: v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x98,0x7c,0x01,0x00,0x02,0x04] # GFX9: v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x98,0x7c,0x01,0x00,0x02,0x04]
▲ Show 20 Lines • Show All 113 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/AMDGPU/sdwa_vi.txt

Show First 20 Lines • Show All 342 Lines • ▼ Show 20 Lines
0xf9 0x06 0x02 0x62 0x02 0x06 0x05 0x02 0xf9 0x06 0x02 0x62 0x02 0x06 0x05 0x02
# VI: v_min_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x64,0x02,0x06,0x05,0x02] # VI: v_min_i16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x64,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x64 0x02 0x06 0x05 0x02 0xf9 0x06 0x02 0x64 0x02 0x06 0x05 0x02
# VI: v_ldexp_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x66,0x02,0x06,0x05,0x02] # VI: v_ldexp_f16_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x66,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x66 0x02 0x06 0x05 0x02 0xf9 0x06 0x02 0x66 0x02 0x06 0x05 0x02
# VI: v_add_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x32,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x32 0x02 0x06 0x05 0x02
# VI: v_sub_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x34,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x34 0x02 0x06 0x05 0x02
# VI: v_subrev_u32_sdwa v1, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x36,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x36 0x02 0x06 0x05 0x02
# VI: v_addc_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x38,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x38 0x02 0x06 0x05 0x02
# VI: v_subb_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3a,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x3a 0x02 0x06 0x05 0x02
# VI: v_subbrev_u32_sdwa v1, vcc, v2, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 ; encoding: [0xf9,0x06,0x02,0x3c,0x02,0x06,0x05,0x02]
0xf9 0x06 0x02 0x3c 0x02 0x06 0x05 0x02