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Differential D40051

AMDGPU: Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and Tonga both use gfx802; update target feature handling
ClosedPublic

Authored by t-tye on Nov 14 2017, 3:05 PM.

Details

Reviewers
kzhuravl
b-sumner
nhaehnle
tpr
Commits
rGa697880b3895: [AMDGPU] Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and…
rG31105cc99761: [AMDGPU] Rename Bonaire target to be gfx704; update target feature handling
rL320457: [AMDGPU] Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and…
rL320378: [AMDGPU] Rename Bonaire target to be gfx704; update target feature handling
Summary
  • Rename Bonaire target to be gfx704.
  • Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code.
  • List target features supported by each processor in the processor table together with the default value.
  • Add xnack flag to e_flags.
  • Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property.

Diff Detail

Repository
rL LLVM

Event Timeline

t-tye created this revision.Nov 14 2017, 3:05 PM
Herald added subscribers: tpr, dstuttard, yaxunl and 2 others. · View Herald TranscriptNov 14 2017, 3:05 PM
t-tye mentioned this in D40045: AMDGPU/GCN: Bring processors in sync with AMDGPUUsage.Nov 14 2017, 3:19 PM
t-tye mentioned this in D40046: AMDGPU/GCN: Bring processors in sync with AMDGPUUsage.Nov 14 2017, 3:22 PM
t-tye mentioned this in D40047: AMDGPU/GCN: Remove xnack from 801 and 810.Nov 14 2017, 3:30 PM
t-tye added reviewers: nhaehnle, tpr.
nhaehnle edited edge metadata.Nov 16 2017, 9:57 AM

Fine with me.

t-tye updated this revision to Diff 123286.Nov 16 2017, 6:21 PM
t-tye retitled this revision from AMDGPU: Rename Bonaire target to be gfx704 to AMDGPU: Rename Bonaire target to be gfx704; make target feature defaul processor specific.
t-tye edited the summary of this revision. (Show Details)

List target features supported by each processor in the processor table together with the default value.

t-tye updated this revision to Diff 123395.Nov 17 2017, 12:28 PM
t-tye retitled this revision from AMDGPU: Rename Bonaire target to be gfx704; make target feature defaul processor specific to AMDGPU: Rename Bonaire target to be gfx704; update target feature handling.
t-tye edited the summary of this revision. (Show Details)
  • Add xnack flag to e_flags.
kzhuravl edited edge metadata.Nov 17 2017, 12:30 PM
In D40051#928960, @t-tye wrote:
  • Add xnack flag to e_flags.

Do we still need to record xnack presence in metadata?

t-tye added a comment.Nov 17 2017, 12:40 PM
In D40051#928975, @kzhuravl wrote:
In D40051#928960, @t-tye wrote:
  • Add xnack flag to e_flags.

Do we still need to record xnack presence in metadata?

Also likely remove from kernel_code_t too.

t-tye updated this revision to Diff 123411.Nov 17 2017, 1:37 PM
t-tye edited the summary of this revision. (Show Details)

Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property.

t-tye updated this revision to Diff 123417.Nov 17 2017, 2:17 PM
t-tye edited the summary of this revision. (Show Details)

Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code.

kzhuravl added a comment.Nov 20 2017, 8:57 AM
In D40051#929113, @t-tye wrote:

Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code.

Is this correct? IIRC, Tonga's atomic add/sub must always have the glc bit enabled (iceland does not need that). This was the reason for having them as separate ccs.

kzhuravl added inline comments.Nov 20 2017, 9:00 AM
docs/AMDGPUUsage.rst
126 ↗(On Diff #123417)

Should this APU have an xnack on by default? I remember we talked about defaulting xnack to on for all APUs.

144 ↗(On Diff #123417)

Should this APU have an xnack on by default? I remember we talked about defaulting xnack to on for all APUs.

523–528 ↗(On Diff #123417)

Should we mention anything about the fact that we will not link code objects with different xnack settings?

b-sumner edited edge metadata.Nov 27 2017, 2:16 PM

Looks good to me.

t-tye added inline comments.Nov 27 2017, 9:32 PM
docs/AMDGPUUsage.rst
126 ↗(On Diff #123417)

I do not believe hardware added XNACK support until GFX8.

144 ↗(On Diff #123417)

I do not believe hardware added XNACK support until GFX8.

kzhuravl accepted this revision.Nov 28 2017, 8:50 AM

LGTM

This revision is now accepted and ready to land.Nov 28 2017, 8:50 AM
Closed by commit rL320378: [AMDGPU] Rename Bonaire target to be gfx704; update target feature handling (authored by t-tye). · Explain WhyDec 11 2017, 7:36 AM
This revision was automatically updated to reflect the committed changes.
t-tye retitled this revision from AMDGPU: Rename Bonaire target to be gfx704; update target feature handling to AMDGPU: Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and Tonga both use gfx802; update target feature handling.Dec 11 2017, 9:43 PM
t-tye mentioned this in rL320457: [AMDGPU] Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and….Dec 11 2017, 9:47 PM

Revision Contents

PathSize
llvm/
trunk/
docs/
283 lines

Diff 126362

llvm/trunk/docs/AMDGPUUsage.rst

Show First 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
---------- ----------
Use the ``clang -mcpu <Processor>`` option to specify the AMD GPU processor. The Use the ``clang -mcpu <Processor>`` option to specify the AMD GPU processor. The
names from both the *Processor* and *Alternative Processor* can be used. names from both the *Processor* and *Alternative Processor* can be used.
.. table:: AMDGPU Processors .. table:: AMDGPU Processors
:name: amdgpu-processor-table :name: amdgpu-processor-table
=========== =============== ============ ===== ======= ================== =========== =============== ============ ===== ========= ======= ==================
Processor Alternative Target dGPU/ ROCm Example Processor Alternative Target dGPU/ Target ROCm Example
Processor Triple APU Support Products Processor Triple APU Features Support Products
Architecture Architecture Supported
=========== =============== ============ ===== ======= ================== [Default]
=========== =============== ============ ===== ========= ======= ==================
**Radeon HD 2000/3000 Series (R600)** [AMD-RADEON-HD-2000-3000]_ **Radeon HD 2000/3000 Series (R600)** [AMD-RADEON-HD-2000-3000]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``r600`` ``r600`` dGPU ``r600`` ``r600`` dGPU
``r630`` ``r600`` dGPU ``r630`` ``r600`` dGPU
``rs880`` ``r600`` dGPU ``rs880`` ``r600`` dGPU
``rv670`` ``r600`` dGPU ``rv670`` ``r600`` dGPU
**Radeon HD 4000 Series (R700)** [AMD-RADEON-HD-4000]_ **Radeon HD 4000 Series (R700)** [AMD-RADEON-HD-4000]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``rv710`` ``r600`` dGPU ``rv710`` ``r600`` dGPU
``rv730`` ``r600`` dGPU ``rv730`` ``r600`` dGPU
``rv770`` ``r600`` dGPU ``rv770`` ``r600`` dGPU
**Radeon HD 5000 Series (Evergreen)** [AMD-RADEON-HD-5000]_ **Radeon HD 5000 Series (Evergreen)** [AMD-RADEON-HD-5000]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``cedar`` ``r600`` dGPU ``cedar`` ``r600`` dGPU
``redwood`` ``r600`` dGPU ``redwood`` ``r600`` dGPU
``sumo`` ``r600`` dGPU ``sumo`` ``r600`` dGPU
``juniper`` ``r600`` dGPU ``juniper`` ``r600`` dGPU
``cypress`` ``r600`` dGPU ``cypress`` ``r600`` dGPU
**Radeon HD 6000 Series (Northern Islands)** [AMD-RADEON-HD-6000]_ **Radeon HD 6000 Series (Northern Islands)** [AMD-RADEON-HD-6000]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``barts`` ``r600`` dGPU ``barts`` ``r600`` dGPU
``turks`` ``r600`` dGPU ``turks`` ``r600`` dGPU
``caicos`` ``r600`` dGPU ``caicos`` ``r600`` dGPU
``cayman`` ``r600`` dGPU ``cayman`` ``r600`` dGPU
**GCN GFX6 (Southern Islands (SI))** [AMD-GCN-GFX6]_ **GCN GFX6 (Southern Islands (SI))** [AMD-GCN-GFX6]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``gfx600`` - ``tahiti`` ``amdgcn`` dGPU ``gfx600`` - ``tahiti`` ``amdgcn`` dGPU
``gfx601`` - ``pitcairn`` ``amdgcn`` dGPU ``gfx601`` - ``pitcairn`` ``amdgcn`` dGPU
- ``verde`` - ``verde``
- ``oland`` - ``oland``
- ``hainan`` - ``hainan``
**GCN GFX7 (Sea Islands (CI))** [AMD-GCN-GFX7]_ **GCN GFX7 (Sea Islands (CI))** [AMD-GCN-GFX7]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``gfx700`` - ``bonaire`` ``amdgcn`` dGPU - Radeon HD 7790 ``gfx700`` - ``kaveri`` ``amdgcn`` APU - A6-7000
- Radeon HD 8770
- R7 260
- R7 260X
\ - ``kaveri`` ``amdgcn`` APU - A6-7000
- A6 Pro-7050B - A6 Pro-7050B
- A8-7100 - A8-7100
- A8 Pro-7150B - A8 Pro-7150B
- A10-7300 - A10-7300
- A10 Pro-7350B - A10 Pro-7350B
- FX-7500 - FX-7500
- A8-7200P - A8-7200P
- A10-7400P - A10-7400P
- FX-7600P - FX-7600P
``gfx701`` - ``hawaii`` ``amdgcn`` dGPU ROCm - FirePro W8100 ``gfx701`` - ``hawaii`` ``amdgcn`` dGPU ROCm - FirePro W8100
- FirePro W9100 - FirePro W9100
- FirePro S9150 - FirePro S9150
- FirePro S9170 - FirePro S9170
``gfx702`` ``amdgcn`` dGPU ROCm - Radeon R9 290 ``gfx702`` ``amdgcn`` dGPU ROCm - Radeon R9 290
- Radeon R9 290x - Radeon R9 290x
- Radeon R390 - Radeon R390
- Radeon R390x - Radeon R390x
``gfx703`` - ``kabini`` ``amdgcn`` APU - E1-2100 ``gfx703`` - ``kabini`` ``amdgcn`` APU - E1-2100
- ``mullins`` - E1-2200 - ``mullins`` - E1-2200
- E1-2500 - E1-2500
- E2-3000 - E2-3000
- E2-3800 - E2-3800
- A4-5000 - A4-5000
- A4-5100 - A4-5100
- A6-5200 - A6-5200
- A4 Pro-3340B - A4 Pro-3340B
``gfx704`` - ``bonaire`` ``amdgcn`` dGPU - Radeon HD 7790
- Radeon HD 8770
- R7 260
- R7 260X
**GCN GFX8 (Volcanic Islands (VI))** [AMD-GCN-GFX8]_ **GCN GFX8 (Volcanic Islands (VI))** [AMD-GCN-GFX8]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``gfx800`` - ``iceland`` ``amdgcn`` dGPU - FirePro S7150 ``gfx800`` - ``iceland`` ``amdgcn`` dGPU - xnack .. TODO
- FirePro S7100 [off] Add product
- FirePro W7100 names.
- Radeon R285 ``gfx801`` - ``carrizo`` ``amdgcn`` APU - xnack - A6-8500P
- Radeon R9 380 [on] - Pro A6-8500B
- Radeon R9 385
- Mobile FirePro
M7170
``gfx801`` - ``carrizo`` ``amdgcn`` APU - A6-8500P
- Pro A6-8500B
- A8-8600P - A8-8600P
- Pro A8-8600B - Pro A8-8600B
- FX-8800P - FX-8800P
- Pro A12-8800B - Pro A12-8800B
\ ``amdgcn`` APU ROCm - A10-8700P \ ``amdgcn`` APU - xnack ROCm - A10-8700P
- Pro A10-8700B [on] - Pro A10-8700B
- A10-8780P - A10-8780P
\ ``amdgcn`` APU - A10-9600P \ ``amdgcn`` APU - xnack - A10-9600P
- A10-9630P [on] - A10-9630P
- A12-9700P - A12-9700P
- A12-9730P - A12-9730P
- FX-9800P - FX-9800P
- FX-9830P - FX-9830P
\ ``amdgcn`` APU - E2-9010 \ ``amdgcn`` APU - xnack - E2-9010
- A6-9210 [on] - A6-9210
- A9-9410 - A9-9410
``gfx802`` - ``tonga`` ``amdgcn`` dGPU ROCm Same as gfx800 ``gfx802`` - ``tonga`` ``amdgcn`` dGPU - xnack ROCm - FirePro S7150
``gfx803`` - ``fiji`` ``amdgcn`` dGPU ROCm - Radeon R9 Nano [off] - FirePro S7100
- Radeon R9 Fury - FirePro W7100
- Radeon R285
- Radeon R9 380
- Radeon R9 385
- Mobile FirePro
M7170
``gfx803`` - ``fiji`` ``amdgcn`` dGPU - xnack ROCm - Radeon R9 Nano
[off] - Radeon R9 Fury
- Radeon R9 FuryX - Radeon R9 FuryX
- Radeon Pro Duo - Radeon Pro Duo
- FirePro S9300x2 - FirePro S9300x2
- Radeon Instinct MI8 - Radeon Instinct MI8
\ - ``polaris10`` ``amdgcn`` dGPU ROCm - Radeon RX 470 \ - ``polaris10`` ``amdgcn`` dGPU - xnack ROCm - Radeon RX 470
- Radeon RX 480 [off] - Radeon RX 480
- Radeon Instinct MI6 - Radeon Instinct MI6
\ - ``polaris11`` ``amdgcn`` dGPU ROCm - Radeon RX 460 \ - ``polaris11`` ``amdgcn`` dGPU - xnack ROCm - Radeon RX 460
``gfx810`` - ``stoney`` ``amdgcn`` APU [off]
``gfx810`` - ``stoney`` ``amdgcn`` APU - xnack
[on]
**GCN GFX9** [AMD-GCN-GFX9]_ **GCN GFX9** [AMD-GCN-GFX9]_
------------------------------------------------------------------------- -----------------------------------------------------------------------------------
``gfx900`` ``amdgcn`` dGPU ROCm - Radeon Vega ``gfx900`` ``amdgcn`` dGPU - xnack ROCm - Radeon Vega
Frontier Edition [off] Frontier Edition
- Radeon RX Vega 56 - Radeon RX Vega 56
- Radeon RX Vega 64 - Radeon RX Vega 64
- Radeon RX Vega 64 - Radeon RX Vega 64
Liquid Liquid
- Radeon Instinct MI25 - Radeon Instinct MI25
``gfx902`` ``amdgcn`` APU *TBA* ``gfx902`` ``amdgcn`` APU - xnack *TBA*
[on]
.. TODO .. TODO
Add product Add product
names. names.
=========== =============== ============ ===== ======= ================== =========== =============== ============ ===== ========= ======= ==================
.. _amdgpu-target-features: .. _amdgpu-target-features:
Target Features Target Features
--------------- ---------------
Target features control how code is generated to support certain Target features control how code is generated to support certain
features. Not all target features are supported by all processors. The processor specific features. Not all target features are supported by
runtime must ensure that the features supported by the device used to all processors. The runtime must ensure that the features supported by
execute the code match the features enabled when generating the the device used to execute the code match the features enabled when
code. A mismatch of features may result in incorrect execution, or a generating the code. A mismatch of features may result in incorrect
reduction in performance. execution, or a reduction in performance.
The target features supported by each processor, and the default value
used if not specified explicitly, is listed in
:ref:`amdgpu-processor-table`.
Use the ``clang -m[no-]<TargetFeature>`` option to specify the AMD GPU Use the ``clang -m[no-]<TargetFeature>`` option to specify the AMD GPU
target features. target features.
For example: For example:
``-mxnack`` ``-mxnack``
Enable the *XNACK* feature. Enable the ``xnack`` feature.
``-mno-xnack`` ``-mno-xnack``
Disable the *XNACK* feature. Disable the ``xnack`` feature.
.. table:: AMDGPU Target Features .. table:: AMDGPU Target Features
:name: amdgpu-target-feature-table :name: amdgpu-target-feature-table
============== ======== ================================================== ============== ==================================================
Target Feature Default Description Target Feature Description
============== ======== ================================================== ============== ==================================================
-m[no-]xnack disabled Enable/disable generating code that has -m[no-]xnack Enable/disable generating code that has
memory clauses that are compatible with memory clauses that are compatible with
having XNACK replay enabled. having XNACK replay enabled.
This is used for demand paging and page This is used for demand paging and page
migration. If XNACK replay is enabled in migration. If XNACK replay is enabled in
the device, then if a page fault occurs the device, then if a page fault occurs
the code may execute incorrectly if the the code may execute incorrectly if the
XNACK feature is not enabled. Executing ``xnack`` feature is not enabled. Executing
code that has the feature enabled on a code that has the feature enabled on a
device that does not have XNACK replay device that does not have XNACK replay
enabled will execute correctly, but may enabled will execute correctly, but may
be less performant than code with the be less performant than code with the
feature disabled. feature disabled.
============== ==================================================
This feature is supported by the
``amdgcn`` architecture for GFX8-GFX9.
============== ======== ==================================================
.. _amdgpu-address-spaces: .. _amdgpu-address-spaces:
Address Spaces Address Spaces
-------------- --------------
The AMDGPU backend uses the following address space mappings. The AMDGPU backend uses the following address space mappings.
▲ Show 20 Lines • Show All 246 Lines • ▼ Show 20 Lines .. table:: AMDGPU ELF Header ``e_flags``
================================= ========== ============================= ================================= ========== =============================
**AMDGPU Processor Flag** See :ref:`amdgpu-processor-table`. **AMDGPU Processor Flag** See :ref:`amdgpu-processor-table`.
-------------------------------------------- ----------------------------- -------------------------------------------- -----------------------------
``EF_AMDGPU_MACH`` 0x000000ff AMDGPU processor selection ``EF_AMDGPU_MACH`` 0x000000ff AMDGPU processor selection
mask for mask for
``EF_AMDGPU_MACH_xxx`` values ``EF_AMDGPU_MACH_xxx`` values
defined in defined in
:ref:`amdgpu-ef-amdgpu-mach-table`. :ref:`amdgpu-ef-amdgpu-mach-table`.
``EF_AMDGPU_XNACK`` 0x00000100 Indicates if the ``xnack``
target feature is
enabled for all code
contained in the code object.
See
:ref:`amdgpu-target-features`.
================================= ========== ============================= ================================= ========== =============================
.. table:: AMDGPU ``EF_AMDGPU_MACH`` Values .. table:: AMDGPU ``EF_AMDGPU_MACH`` Values
:name: amdgpu-ef-amdgpu-mach-table :name: amdgpu-ef-amdgpu-mach-table
================================= ========== ============================= ================================= ========== =============================
Name Value Description (see Name Value Description (see
:ref:`amdgpu-processor-table`) :ref:`amdgpu-processor-table`)
Show All 18 Lines .. table:: AMDGPU ``EF_AMDGPU_MACH`` Values
*reserved* 17-31 Reserved for ``r600`` *reserved* 17-31 Reserved for ``r600``
architecture processors. architecture processors.
``EF_AMDGPU_MACH_AMDGCN_GFX600`` 32 ``gfx600`` ``EF_AMDGPU_MACH_AMDGCN_GFX600`` 32 ``gfx600``
``EF_AMDGPU_MACH_AMDGCN_GFX601`` 33 ``gfx601`` ``EF_AMDGPU_MACH_AMDGCN_GFX601`` 33 ``gfx601``
``EF_AMDGPU_MACH_AMDGCN_GFX700`` 34 ``gfx700`` ``EF_AMDGPU_MACH_AMDGCN_GFX700`` 34 ``gfx700``
``EF_AMDGPU_MACH_AMDGCN_GFX701`` 35 ``gfx701`` ``EF_AMDGPU_MACH_AMDGCN_GFX701`` 35 ``gfx701``
``EF_AMDGPU_MACH_AMDGCN_GFX702`` 36 ``gfx702`` ``EF_AMDGPU_MACH_AMDGCN_GFX702`` 36 ``gfx702``
``EF_AMDGPU_MACH_AMDGCN_GFX703`` 37 ``gfx703`` ``EF_AMDGPU_MACH_AMDGCN_GFX703`` 37 ``gfx703``
``EF_AMDGPU_MACH_AMDGCN_GFX800`` 38 ``gfx800`` ``EF_AMDGPU_MACH_AMDGCN_GFX704`` 38 ``gfx704``
``EF_AMDGPU_MACH_AMDGCN_GFX801`` 39 ``gfx801`` ``EF_AMDGPU_MACH_AMDGCN_GFX800`` 39 ``gfx800``
``EF_AMDGPU_MACH_AMDGCN_GFX802`` 40 ``gfx802`` ``EF_AMDGPU_MACH_AMDGCN_GFX801`` 40 ``gfx801``
``EF_AMDGPU_MACH_AMDGCN_GFX803`` 41 ``gfx803`` ``EF_AMDGPU_MACH_AMDGCN_GFX802`` 41 ``gfx802``
``EF_AMDGPU_MACH_AMDGCN_GFX810`` 42 ``gfx810`` ``EF_AMDGPU_MACH_AMDGCN_GFX803`` 42 ``gfx803``
``EF_AMDGPU_MACH_AMDGCN_GFX900`` 43 ``gfx900`` ``EF_AMDGPU_MACH_AMDGCN_GFX810`` 43 ``gfx810``
``EF_AMDGPU_MACH_AMDGCN_GFX902`` 44 ``gfx902`` ``EF_AMDGPU_MACH_AMDGCN_GFX900`` 44 ``gfx900``
``EF_AMDGPU_MACH_AMDGCN_GFX902`` 45 ``gfx902``
================================= ========== ============================= ================================= ========== =============================
Sections Sections
-------- --------
An AMDGPU target ELF code object has the standard ELF sections which include: An AMDGPU target ELF code object has the standard ELF sections which include:
.. table:: AMDGPU ELF Sections .. table:: AMDGPU ELF Sections
▲ Show 20 Lines • Show All 716 Lines • ▼ Show 20 Lines "FixedWorkGroupSize" sequence of Corresponds to the
size X, Y, Z. If size X, Y, Z. If
omitted, defaults to omitted, defaults to
0, 0, 0. If an 0, 0, 0. If an
element is non-0 then element is non-0 then
the kernel must only the kernel must only
be launched with a be launched with a
matching corresponding matching corresponding
work-group size. work-group size.
"IsXNACKEnabled" boolean Indicates if the
generated machine
code is capable of
supporting XNACK. See
:ref:`amdgpu-target-features`.
"NumSpilledSGPRs" integer Number of stores from "NumSpilledSGPRs" integer Number of stores from
a scalar register to a scalar register to
a register allocator a register allocator
created spill created spill
location. location.
"NumSpilledVGPRs" integer Number of stores from "NumSpilledVGPRs" integer Number of stores from
a vector register to a vector register to
a register allocator a register allocator
▲ Show 20 Lines • Show All 278 Lines • ▼ Show 20 Lines .. table:: Kernel Descriptor for GFX6-GFX9
453 1 bit EnableSGPRFlatScratchInit *see above* 453 1 bit EnableSGPRFlatScratchInit *see above*
454 1 bit EnableSGPRPrivateSegmentSize *see above* 454 1 bit EnableSGPRPrivateSegmentSize *see above*
455 1 bit EnableSGPRGridWorkgroupCountX Not implemented in CP and 455 1 bit EnableSGPRGridWorkgroupCountX Not implemented in CP and
should always be 0. should always be 0.
456 1 bit EnableSGPRGridWorkgroupCountY Not implemented in CP and 456 1 bit EnableSGPRGridWorkgroupCountY Not implemented in CP and
should always be 0. should always be 0.
457 1 bit EnableSGPRGridWorkgroupCountZ Not implemented in CP and 457 1 bit EnableSGPRGridWorkgroupCountZ Not implemented in CP and
should always be 0. should always be 0.
462:458 5 bits Reserved, must be 0. 463:458 6 bits Reserved, must be 0.
463 1 bit IsXNACKEnabled Indicates if the generated
machine code is capable of
supporting XNACK.
511:464 6 Reserved, must be 0. 511:464 6 Reserved, must be 0.
bytes bytes
512 **Total size 64 bytes.** 512 **Total size 64 bytes.**
======= ==================================================================== ======= ====================================================================
.. ..
.. table:: compute_pgm_rsrc1 for GFX6-GFX9 .. table:: compute_pgm_rsrc1 for GFX6-GFX9
▲ Show 20 Lines • Show All 2,551 Lines • Show Last 20 Lines