[RISCV] MC layer support for the jump/branch instructions of standard compress instruction set
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Authored by shiva0217 on Mon, Nov 13, 11:24 PM.

Details

Summary
  1. Add CR CB CJ instruction format for C extension instructions
  1. Add C extension jump/branch instructions
  1. Identify/check SImm9Lsb0/SImm12Lsb0 operands by RISCVAsmParser
  1. Add MC testcases for C extension jump/branch instructions
  1. Support fixup branch/jump target immediate of compress instructions
  1. Add Fixup MC testcases for C extension branch/jump instruction

Diff Detail

Repository
rL LLVM
shiva0217 created this revision.Mon, Nov 13, 11:24 PM
shiva0217 updated this revision to Diff 123116.Wed, Nov 15, 5:36 PM
mgrang added a subscriber: mgrang.Fri, Nov 17, 10:48 AM
mgrang added inline comments.
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
194 ↗(On Diff #123116)

This return is unneeded as the default case is handled.

apazos added inline comments.
lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
39 ↗(On Diff #123116)

compressed jump instruction

shiva0217 added a subscriber: llvm-commits.
shiva0217 added inline comments.
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
194 ↗(On Diff #123116)

Remove redundant return.

lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
39 ↗(On Diff #123116)

Fixup comments.

asb added inline comments.Tue, Nov 21, 6:41 AM
lib/Target/RISCV/RISCVInstrInfoC.td
118 ↗(On Diff #123535)

Given that Jump_imm, Call_Imm, Jump_Reg and Call_Reg only have a single instruction in that class, I think it makes sense to drop the intermediate classes and just define the instructions directly.

shiva0217 added inline comments.Wed, Nov 22, 11:38 PM
lib/Target/RISCV/RISCVInstrInfoC.td
118 ↗(On Diff #123535)

Remove Jump_imm, Call_Imm, Jump_Reg and Call_Reg only have a single instruction in that class and define the instruction directly.

Add test cases to check the instruction operands should not be x0.

shiva0217 updated this revision to Diff 125297.Sun, Dec 3, 6:56 PM

Change fixup_riscv_rvc_branch fixup field in getFixupKindInfo to avoid assert build trigger error

asb accepted this revision.Thu, Dec 7, 5:15 AM

Thanks Shiva. The simm9lsb0 and simm12lsb0 functions and match cases are added out of the usual order (ascending by bit-width), but I'll fix during commit.

This revision is now accepted and ready to land.Thu, Dec 7, 5:15 AM
This revision was automatically updated to reflect the committed changes.