This is an archive of the discontinued LLVM Phabricator instance.

AMDGPU: Handle s_buffer_load_dword hazard on SI
ClosedPublic

Authored by mareko on Oct 22 2017, 2:11 PM.

Event Timeline

mareko created this revision.Oct 22 2017, 2:11 PM
nhaehnle added inline comments.Oct 23 2017, 6:50 AM
lib/Target/AMDGPU/GCNHazardRecognizer.cpp
373–400

This could be merged with the previous loop, right?

test/CodeGen/AMDGPU/smrd.ll
93

Please add a NOTSI-NOT-NEXT line as well (or CIVIGFX9-NOT-NEXT?)

arsenm added inline comments.Oct 23 2017, 9:45 AM
lib/Target/AMDGPU/GCNHazardRecognizer.cpp
373

Do you mean just SI? Needs a subtarget check?

380

Probably should avoid switch with something like isSMRD() && has buffer operand

mareko added inline comments.Oct 24 2017, 2:47 AM
lib/Target/AMDGPU/GCNHazardRecognizer.cpp
373

This code is only executed on SI.

380

Not sure if there is a way to check if an opcode has a buffer operand. It looks like not.

test/CodeGen/AMDGPU/smrd.ll
93

I think GCN-NEXT already ensures that there can't be any s_nop.

mareko updated this revision to Diff 120024.Oct 24 2017, 2:49 AM

Cleanups.

This revision was automatically updated to reflect the committed changes.