[AMDGPU/LLD] Add RELATIVE64 relocation record.

[t-tye]

Summary

Add base relative relocation record that can be used for the following case (OpenCL example):

static __global int Var = 0; 
__global int* Ptr[] = {&Var};
...

In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol.

This also fixes LLD which was incorrectly generating a PCREL64 for this case.

[kzhuravl]

LGTM.

[ruiu]

LGTM

lld/trunk/ELF/Arch/AMDGPU.cpp

public:
   AMDGPU();
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   RelExpr getRelExpr(RelType Type, const SymbolBody &S,
                      const uint8_t *Loc) const override;
 };
 } // namespace
 
 AMDGPU::AMDGPU() {
-  RelativeRel = R_AMDGPU_REL64;
+  RelativeRel = R_AMDGPU_RELATIVE64;
   GotRel = R_AMDGPU_ABS64;
   GotEntrySize = 8;
 }
 
 void AMDGPU::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
   switch (Type) {
   case R_AMDGPU_ABS32:
   case R_AMDGPU_GOTPCREL:

lld/trunk/test/ELF/amdgpu-relocs.s

 .type ptr, @object
 .data
   .globl ptr
   .p2align 3
 ptr:
   .quad temp
   .size ptr, 8
 
+# R_AMDGPU_RELATIVE64:
+  .type temp2, @object
+  .local temp2
+  .size temp2, 4
+
+  .type ptr2, @object
+  .globl ptr2
+  .size ptr2, 8
+  .p2align 3
+ptr2:
+  .quad temp2
+
 # The relocation for local_var{0, 1, 2} and var should be resolved by the
 # linker.
 # CHECK: Relocations [
 # CHECK: .rela.dyn {
+# CHECK-NEXT: R_AMDGPU_RELATIVE64 - 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 common_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 common_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 common_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 extern_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 extern_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 extern_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var1 0x0