AMDGPU/GlobalISel: Mark 32-bit G_FADD as legal

[kristof.beyls]

test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir

1

I just find "-mcpu=fiji" a bit strange for this test - I'm a bit surprised an -mcpu would be needed here.
Otherwise, without knowing hardly anything about the AMDGPU target, the rest of this patch looks fine to me.

[arsenm]

LGTM

[tstellar]

test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir

1

It's not necessary, I will drop it before I commit.

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
   // values may not be legal.  We need to figure out how to distinguish
   // between these two scenarios.
   setAction({G_CONSTANT, S1}, Legal);
   setAction({G_CONSTANT, S32}, Legal);
   setAction({G_CONSTANT, S64}, Legal);
 
   setAction({G_FCONSTANT, S32}, Legal);
 
+  setAction({G_FADD, S32}, Legal);
+
   setAction({G_FMUL, S32}, Legal);
 
   setAction({G_GEP, P1}, Legal);
   setAction({G_GEP, P2}, Legal);
   setAction({G_GEP, 1, S64}, Legal);
 
   setAction({G_ICMP, S1}, Legal);
   setAction({G_ICMP, 1, S32}, Legal);

test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir

+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+--- |
+  define void @test_fadd() {
+  entry:
+    ret void
+  }
+
+...
+
+---
+name:            test_fadd
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body: |
+  bb.0.entry:
+    liveins: %vgpr0, %vgpr1
+    ; CHECK-LABEL: name: test_fadd
+    ; CHECK: %2(s32) = G_FADD %0, %1
+
+    %0(s32) = COPY %vgpr0
+    %1(s32) = COPY %vgpr1
+    %2(s32) = G_FADD %0, %1
+...