[AArch64] Improve tests of loads and stores of register pairs

[evandro]

Summary

Include instances of FP register pairs.

[javed.absar]

looks ok to me. Thanks for extending these tests.
Will let, however, assigned reviewers, comment/accept further.

[mcrosier]

Thanks, Evandro.

[evandro]

Closed by commit rL313638: [AArch64] Extend tests of loads and stores of register pairs

llvm/test/CodeGen/AArch64/arm64-ldp.ll

 define double @ldp_double(double* %p) nounwind {
   %tmp = load double, double* %p, align 8
   %add.ptr = getelementptr inbounds double, double* %p, i64 1
   %tmp1 = load double, double* %add.ptr, align 8
   %add = fadd double %tmp, %tmp1
   ret double %add
 }
 
+; CHECK-LABEL: ldp_doublex2
+; CHECK: ldp
+define <2 x double> @ldp_doublex2(<2 x double>* %p) nounwind {
+  %tmp = load <2 x double>, <2 x double>* %p, align 16
+  %add.ptr = getelementptr inbounds <2 x double>, <2 x double>* %p, i64 1
+  %tmp1 = load <2 x double>, <2 x double>* %add.ptr, align 16
+  %add = fadd <2 x double> %tmp, %tmp1
+  ret <2 x double> %add
+}
+
 ; Test the load/store optimizer---combine ldurs into a ldp, if appropriate
 define i32 @ldur_int(i32* %a) nounwind {
 ; CHECK-LABEL: ldur_int
 ; CHECK: ldp     [[DST1:w[0-9]+]], [[DST2:w[0-9]+]], [x0, #-8]
 ; CHECK-NEXT: add     w{{[0-9]+}}, [[DST2]], [[DST1]]
 ; CHECK-NEXT: ret
   %p1 = getelementptr inbounds i32, i32* %a, i32 -1
   %tmp1 = load i32, i32* %p1, align 2
; CHECK-NEXT: ret
   %tmp2 = load i64, i64* %p2, align 2
   %tmp3 = add i64 %tmp1, %tmp2
   ret i64 %tmp3
 }
 
 define float @ldur_float(float* %a) {
 ; CHECK-LABEL: ldur_float
 ; CHECK: ldp     [[DST1:s[0-9]+]], [[DST2:s[0-9]+]], [x0, #-8]
-; CHECK-NEXT: add     s{{[0-9]+}}, [[DST2]], [[DST1]]
+; CHECK-NEXT: fadd    s{{[0-9]+}}, [[DST2]], [[DST1]]
 ; CHECK-NEXT: ret
   %p1 = getelementptr inbounds float, float* %a, i64 -1
   %tmp1 = load float, float* %p1, align 2
   %p2 = getelementptr inbounds float, float* %a, i64 -2
   %tmp2 = load float, float* %p2, align 2
   %tmp3 = fadd float %tmp1, %tmp2
   ret float %tmp3
 }
 
 define double @ldur_double(double* %a) {
 ; CHECK-LABEL: ldur_double
 ; CHECK: ldp     [[DST1:d[0-9]+]], [[DST2:d[0-9]+]], [x0, #-16]
-; CHECK-NEXT: add     d{{[0-9]+}}, [[DST2]], [[DST1]]
+; CHECK-NEXT: fadd    d{{[0-9]+}}, [[DST2]], [[DST1]]
 ; CHECK-NEXT: ret
   %p1 = getelementptr inbounds double, double* %a, i64 -1
   %tmp1 = load double, double* %p1, align 2
   %p2 = getelementptr inbounds double, double* %a, i64 -2
   %tmp2 = load double, double* %p2, align 2
   %tmp3 = fadd double %tmp1, %tmp2
   ret double %tmp3
 }
 
+define <2 x double> @ldur_doublex2(<2 x double>* %a) {
+; CHECK-LABEL: ldur_doublex2
+; CHECK: ldp     q[[DST1:[0-9]+]], q[[DST2:[0-9]+]], [x0, #-32]
+; CHECK-NEXT: fadd    v{{[0-9]+}}.2d, v[[DST2]].2d, v[[DST1]].2d
+; CHECK-NEXT: ret
+  %p1 = getelementptr inbounds <2 x double>, <2 x double>* %a, i64 -1
+  %tmp1 = load <2 x double>, <2 x double>* %p1, align 2
+  %p2 = getelementptr inbounds <2 x double>, <2 x double>* %a, i64 -2
+  %tmp2 = load <2 x double>, <2 x double>* %p2, align 2
+  %tmp3 = fadd <2 x double> %tmp1, %tmp2
+  ret <2 x double> %tmp3
+}
+
 ; Now check some boundary conditions
 define i64 @pairUpBarelyIn(i64* %a) nounwind ssp {
 ; CHECK-LABEL: pairUpBarelyIn
 ; CHECK-NOT: ldur
 ; CHECK: ldp     [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-256]
 ; CHECK-NEXT: add     x{{[0-9]+}}, [[DST2]], [[DST1]]
 ; CHECK-NEXT: ret
   %p1 = getelementptr inbounds i64, i64* %a, i64 -31

llvm/test/CodeGen/AArch64/arm64-stp.ll

 ; CHECK: stp d0, d1, [x0]
 define void @stp_double(double %a, double %b, double* nocapture %p) nounwind {
   store double %a, double* %p, align 8
   %add.ptr = getelementptr inbounds double, double* %p, i64 1
   store double %b, double* %add.ptr, align 8
   ret void
 }
 
+; CHECK-LABEL: stp_doublex2
+; CHECK: stp q0, q1, [x0]
+define void @stp_doublex2(<2 x double> %a, <2 x double> %b, <2 x double>* nocapture %p) nounwind {
+  store <2 x double> %a, <2 x double>* %p, align 16
+  %add.ptr = getelementptr inbounds <2 x double>, <2 x double>* %p, i64 1
+  store <2 x double> %b, <2 x double>* %add.ptr, align 16
+  ret void
+}
+
 ; Test the load/store optimizer---combine ldurs into a ldp, if appropriate
 define void @stur_int(i32 %a, i32 %b, i32* nocapture %p) nounwind {
 ; CHECK-LABEL: stur_int
 ; CHECK: stp w{{[0-9]+}}, {{w[0-9]+}}, [x{{[0-9]+}}, #-8]
 ; CHECK-NEXT: ret
   %p1 = getelementptr inbounds i32, i32* %p, i32 -1
   store i32 %a, i32* %p1, align 2
   %p2 = getelementptr inbounds i32, i32* %p, i32 -2

 ; CHECK-NEXT: ret
   %p1 = getelementptr inbounds double, double* %p, i32 -1
   store double %a, double* %p1, align 2
   %p2 = getelementptr inbounds double, double* %p, i32 -2
   store double %b, double* %p2, align 2
   ret void
 }
 
+define void @stur_doublex2(<2 x double> %a, <2 x double> %b, <2 x double>* nocapture %p) nounwind {
+; CHECK-LABEL: stur_doublex2
+; CHECK: stp q{{[0-9]+}}, q{{[0-9]+}}, [x{{[0-9]+}}, #-32]
+; CHECK-NEXT: ret
+  %p1 = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
+  store <2 x double> %a, <2 x double>* %p1, align 2
+  %p2 = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -2
+  store <2 x double> %b, <2 x double>* %p2, align 2
+  ret void
+}
+
 define void @splat_v4i32(i32 %v, i32 *%p) {
 entry:
 
 ; CHECK-LABEL: splat_v4i32
 ; CHECK-DAG: stp w0, w0, [x1]
 ; CHECK-DAG: stp w0, w0, [x1, #8]
 ; CHECK: ret