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AMD Zen Scheduler Model Update
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Authored by GGanesh on Aug 11 2017, 7:46 AM.

Details

Summary

This patch is an update to the zen scheduler model.
This is the second patch in the list of incremental patches.

This patch has the following

  1. Regex based Instruction itineraries for integer instructions.
  2. The instructions are grouped as per the nature of the instructions (move, arithmetic, logic, Misc, Control Transfer).
  3. FP instructions and their itineraries are added which includes values for SSE4A, BMI, BMI2 and SHA instructions.

Diff Detail

Repository
rL LLVM

Event Timeline

GGanesh created this revision.Aug 11 2017, 7:46 AM
RKSimon added inline comments.Aug 11 2017, 8:53 AM
lib/Target/X86/X86ScheduleZnver1.td
267

Shouldn't all the memory instructions (folding etc.) have an AGU resource dependency?

GGanesh updated this revision to Diff 110929.Aug 14 2017, 2:41 AM

Updated for the itineraries of memory variants of the instructions.

Simon, Craig Topper! My next increment is ready. If this patch can be accepted and committed, I will rebase and submit the next patch.
Or should I submit the next patch as an incremental patch with the changes put forth in this patch? Please help!

RKSimon edited edge metadata.Aug 18 2017, 5:15 AM

Since its the only other AMD model, please can you add the SSE4A values?

Yes Simon! I will include the SSE4A instructions, their itineraries in the next patch. I will include tests verifying them as well.
If this patch is okay, can you please commit this patch on my behalf.

GGanesh updated this revision to Diff 111898.Aug 20 2017, 12:29 PM

Updated the patch as per Simon's comments.
Added the FP instruction itineraries which includes SSE4A and SHA instructions.

javed.absar added inline comments.
lib/Target/X86/X86ScheduleZnver1.td
521

nitpick. Latency = 1 is default, so mention can be omitted.

794

ResourceCycles = [1] is default.

GGanesh updated this revision to Diff 112117.Aug 22 2017, 12:14 AM
GGanesh edited the summary of this revision. (Show Details)

Updated as per Javed's comments!

Simon! If you are okay with the patch, can you please commit the patch on my behalf!

I noticed that you forgot to include llvm-commits as a subscriber.

craig.topper added inline comments.Aug 29 2017, 11:10 AM
lib/Target/X86/X86ScheduleZnver1.td
789

Shouldn't VCVTSD2SSrm use the AGU?

GGanesh updated this revision to Diff 113229.Aug 30 2017, 3:54 AM

Updated for review comments from Craig Topper!

This revision is now accepted and ready to land.Aug 30 2017, 4:00 PM
This revision was automatically updated to reflect the committed changes.