[ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation

[javed.absar]

Summary

Modernise the code with range-loops etc

[fhahn]

LGTM, this looks like a NFC to me and range-based for loops make the code easier to read. Please check the loop I added a comment to before committing.

lib/Target/ARM/A15SDOptimizer.cpp

222 ↗

(On Diff #110322)

While you are at it, could we use a range based for loop here too? Looks like the iterator is dereferenced when used.

llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp

void A15SDOptimizer::eraseInstrWithNoUses(MachineInstr *MI) {
   Front.push_back(MI);
 
   while (Front.size() != 0) {
     MI = Front.back();
     Front.pop_back();
 
     // MI is already known to be dead. We need to see
     // if other instructions can also be removed.
-    for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
-      MachineOperand &MO = MI->getOperand(i);
+    for (MachineOperand &MO : MI->operands()) {
       if ((!MO.isReg()) || (!MO.isUse()))
         continue;
       unsigned Reg = MO.getReg();
       if (!TRI->isVirtualRegister(Reg))
         continue;
       MachineOperand *Op = MI->findRegisterDefOperand(Reg);
 
       if (!Op)
         continue;
 
       MachineInstr *Def = Op->getParent();
 
       // We don't need to do anything if we have already marked
       // this instruction as being dead.
       if (DeadInstr.find(Def) != DeadInstr.end())
         continue;
 
       // Check if all the uses of this instruction are marked as
       // dead. If so, we can also mark this instruction as being
       // dead.
       bool IsDead = true;
-      for (unsigned int j = 0; j < Def->getNumOperands(); ++j) {
-        MachineOperand &MODef = Def->getOperand(j);
+      for (MachineOperand &MODef : Def->operands()) {
         if ((!MODef.isReg()) || (!MODef.isDef()))
           continue;
         unsigned DefReg = MODef.getReg();
         if (!TRI->isVirtualRegister(DefReg)) {
           IsDead = false;
           break;
         }
-        for (MachineRegisterInfo::use_instr_iterator
-             II = MRI->use_instr_begin(Reg), EE = MRI->use_instr_end();
-             II != EE; ++II) {
+        for (MachineInstr &Use : MRI->use_instructions(Reg)) {
           // We don't care about self references.
-          if (&*II == Def)
+          if (&Use == Def)
             continue;
-          if (DeadInstr.find(&*II) == DeadInstr.end()) {
+          if (DeadInstr.find(&Use) == DeadInstr.end()) {
             IsDead = false;
             break;
           }
         }
       }
 
       if (!IsDead) continue;
 

 // Return the DPR virtual registers that are read by this machine instruction
 // (if any).
 SmallVector<unsigned, 8> A15SDOptimizer::getReadDPRs(MachineInstr *MI) {
   if (MI->isCopyLike() || MI->isInsertSubreg() || MI->isRegSequence() ||
       MI->isKill())
     return SmallVector<unsigned, 8>();
 
   SmallVector<unsigned, 8> Defs;
-  for (unsigned i = 0; i < MI->getNumOperands(); ++i) {
-    MachineOperand &MO = MI->getOperand(i);
-
+  for (MachineOperand &MO : MI->operands()) {
     if (!MO.isReg() || !MO.isUse())
       continue;
     if (!usesRegClass(MO, &ARM::DPRRegClass) &&
         !usesRegClass(MO, &ARM::QPRRegClass) &&
         !usesRegClass(MO, &ARM::DPairRegClass)) // Treat DPair as QPR
       continue;
 
     Defs.push_back(MO.getReg());
for (SmallVectorImpl<unsigned>::iterator I = Defs.begin(), E = Defs.end();
     if (!TRI->isVirtualRegister(*I))
       continue;
     MachineInstr *Def = MRI->getVRegDef(*I);
     if (!Def)
       continue;
 
     elideCopiesAndPHIs(Def, DefSrcs);
 
-    for (SmallVectorImpl<MachineInstr *>::iterator II = DefSrcs.begin(),
-      EE = DefSrcs.end(); II != EE; ++II) {
-      MachineInstr *MI = *II;
-
+    for (MachineInstr *MI : DefSrcs) {
       // If we've already analyzed and replaced this operand, don't do
       // anything.
       if (Replacements.find(MI) != Replacements.end())
         continue;
 
       // Now, work out if the instruction causes a SPR->DPR dependency.
       if (!hasPartialWrite(MI))
         continue;
bool A15SDOptimizer::runOnMachineFunction(MachineFunction &Fn) {
   MRI = &Fn.getRegInfo();
   bool Modified = false;
 
   DEBUG(dbgs() << "Running on function " << Fn.getName()<< "\n");
 
   DeadInstr.clear();
   Replacements.clear();
 
-  for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
-       ++MFI) {
-
-    for (MachineBasicBlock::iterator MI = MFI->begin(), ME = MFI->end();
-      MI != ME;) {
-      Modified |= runOnInstruction(&*MI++);
+  for (MachineBasicBlock &MBB : Fn) {
+    for (MachineInstr &MI : MBB) {
+      Modified |= runOnInstruction(&MI);
     }
-
   }
 
-  for (std::set<MachineInstr *>::iterator I = DeadInstr.begin(),
-                                            E = DeadInstr.end();
-                                            I != E; ++I) {
-    (*I)->eraseFromParent();
+  for (MachineInstr *MI : DeadInstr) {
+    MI->eraseFromParent();
   }
 
   return Modified;
 }
 
 FunctionPass *llvm::createA15SDOptimizerPass() {
   return new A15SDOptimizer();
 }