[MachineOutliner] Ensure AArch64 outliner doesn't mess with any register that overlaps with LR

[paquette]

Summary

It's currently possible for the AArch64 outliner to mark instructions that use w30 as legal.

This wasn't exposed in any tests until I started improving candidate selection recently. Since w30 overlaps with LR, it shouldn't be possible to outline anything that uses it.

I've also attached a MIR test that handles this. Currently, the outliner will incorrectly pull out the STRHHroW %w16, %x9, %w30, 1, 1 instructions despite them using w30.

The existing MachineOutliner IR tests should be ported over to MIR in a separate patch.

[MatzeB]

This looks simple enough and comes with a test so LGTM.
So I'd suggest making an attempt to stay with readsReg()/modifiesRegister() before comitting.

lib/Target/AArch64/AArch64InstrInfo.cpp

4505

modifiesRegister()/readsRegister() can figure this out for you as well if you pass in a TRI argument (without that it has no idea about aliases unfortunately).

[paquette]

lib/Target/AArch64/AArch64InstrInfo.cpp

4505

Oh neat, that's much better.

It requires that I use W30 rather than LR, which is a little less intuitive, but I like it more.

[paquette]

Updated the diff to reflect taking Matthias' advice.

I'm going to go ahead and commit this now.

[MatzeB]

Looks like this was committed in r310422

lib/Target/AArch64/AArch64InstrInfo.cpp

if (MI.isTerminator()) {
     return MachineOutlinerInstrType::Illegal;
   }
 
   // Don't outline positions.
   if (MI.isPosition())
     return MachineOutlinerInstrType::Illegal;
 
   // Make sure none of the operands are un-outlinable.
-  for (const MachineOperand &MOP : MI.operands())
+  for (const MachineOperand &MOP : MI.operands()) {
     if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() ||
         MOP.isTargetIndex())
       return MachineOutlinerInstrType::Illegal;
 
     // Don't outline anything that uses the link register.
-  if (MI.modifiesRegister(AArch64::LR, &RI) ||
-      MI.readsRegister(AArch64::LR, &RI))
+    if (MOP.isReg() && getRegisterInfo().regsOverlap(MOP.getReg(), AArch64::LR))
       return MachineOutlinerInstrType::Illegal;
+  }
 
   // Does this use the stack?
   if (MI.modifiesRegister(AArch64::SP, &RI) ||
       MI.readsRegister(AArch64::SP, &RI)) {
 
     // Is it a memory operation?
     if (MI.mayLoadOrStore()) {
       unsigned Base;  // Filled with the base regiser of MI.

test/CodeGen/AArch64/machine-outliner.mir

+# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner %s -o - | FileCheck %s
+--- |
+  target triple = "aarch64---"
+  
+  define i32 @main() #0 {
+  entry:
+    ret i32 0
+  }
+  
+  attributes #0 = { noinline noredzone nounwind optnone ssp uwtable }
+
+# CHECK-LABEL: @OUTLINED_FUNCTION_0
+
+...
+---
+# This test ensures that we
+# - Create outlined functions
+# - Don't outline anything to do with LR or W30
+#
+# CHECK-LABEL: name: main
+# CHECK: BL @OUTLINED_FUNCTION_0
+# CHECK: STRHHroW %w16, %x9, %w30, 1, 1
+# CHECK: %lr = ORRXri %xzr, 1
+# CHECK: BL @OUTLINED_FUNCTION_0
+# CHECK: STRHHroW %w16, %x9, %w30, 1, 1
+# CHECK: %lr = ORRXri %xzr, 1
+# CHECK: BL @OUTLINED_FUNCTION_0
+# CHECK: STRHHroW %w16, %x9, %w30, 1, 1
+# CHECK: %lr = ORRXri %xzr, 1
+name:            main
+alignment:       2
+tracksRegLiveness: true
+frameInfo:       
+  stackSize:       16
+  maxAlignment:    4
+  maxCallFrameSize: 0
+
+body:             |
+  bb.0.entry:
+    %sp = frame-setup SUBXri %sp, 16, 0
+    %x9 = ORRXri %xzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w30 = ORRWri %wzr, 1
+    %lr = ORRXri %xzr, 1
+
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    STRHHroW %w16, %x9, %w30, 1, 1
+    %lr = ORRXri %xzr, 1
+
+    %w3 = ORRWri %wzr, 1993
+
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    STRHHroW %w16, %x9, %w30, 1, 1
+    %lr = ORRXri %xzr, 1
+
+    %w4 = ORRWri %wzr, 1994
+
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    %w16 = ORRWri %wzr, 1
+    STRHHroW %w16, %x9, %w30, 1, 1
+    %lr = ORRXri %xzr, 1
+
+    %w5 = ORRWri %wzr, 1995
+
+    %sp = ADDXri %sp, 16, 0
+    RET undef %lr
+    
 No newline at end of file