[ARM] Add registers to debuginfo MIR test cases.

[fhahn]

Summary

MIRParserImpl::computeFunctionProperties uses MRI.getNumVirtRegs() to
set the NoVReg property. By adding a bunch of registers to the MIR test
cases, the NoVReg property is not set when importing the MIR. Otherwise
NoVReg is set after instruction selection while the machine instructions
still contain virtual registers, causing expensive checks to fail.

[MatzeB]

BTW: mir has a feature nowadays, where you can say %0 : gprnopc the first time a vreg is used instead of declaring it in the registers list. Unfortunately the dumper doesn't know about it yet. You may want to switch to that style, though this is fine too.

[MatzeB]

In D36152#827603, @MatzeB wrote:

BTW: mir has a feature nowadays, where you can say %0 : gprnopc the first time a vreg is used instead of declaring it in the registers list. Unfortunately the dumper doesn't know about it yet. You may want to switch to that style, though this is fine too.

I just realized the vregs aren't even used, why are you adding 14 of them then and not just 1? This also seems odd enough that it warrants a comment in the .mir files.

The fix is also strange; I think what we really need here is a -start-after or -start-before llc argument so it starts at a later pass which doesn't create new vregs anymore. Maybe adrian remembers what -stop-after line he used to create them so we can use the same for start-after?

[efriedma]

"-start-after=livedebugvalues" appears to work.

[fhahn]

Agreed, in hindsight the current solution is quite heavy-handed. 1 register

@efriedma -start-after=livedebugvalues works for me only for test/DebugInfo/MIR/ARM/split-superreg-complex.mir, for the other 2 FileCheck fails, I think because the check patterns are stronger. I'll have another look tomorrow.

[fhahn]

Using -start-before=livedebugvalues . I had to adjust the offset, but I don't think the exact offset is crucial for the test case. Maybe @aprantl can confirm that?

[aprantl]

That change looks reasonable to me.

[fhahn]

@MatzeB are you happy with the change too? It appears you have to remove your 'This revision now requires changes to proceed.' setting before Phab will mark this patch as accepted.

[MatzeB]

yes, LGTM

test/DebugInfo/MIR/ARM/split-superreg-complex.mir

-# RUN: llc -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
+# RUN:    llvm-dwarfdump - | FileCheck %s
 #
 # This is an artificial example of a debug value residing in a composite
 # location with a complex expression. Because the semantics of applying a DWARF
 # expression to a composite location are ill-defined, the compiler should bail
 # out of emitting a location.
 #
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable

test/DebugInfo/MIR/ARM/split-superreg-piece.mir

-# RUN: llc -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
+# RUN:     llvm-dwarfdump - | FileCheck %s
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable
 # CHECK-NEXT: DW_AT_location [DW_FORM_data4]  ([[OFS:.*]])
 # CHECK-NEXT: DW_AT_name {{.*}}"vec"
 # CHECK: .debug_loc contents:
-# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000016
-# CHECK:             Ending address offset: 0x000000000000001e
+# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000010
+# CHECK:             Ending address offset: 0x0000000000000018
 # CHECK:              Location description: 93 10 90 80 02 93 08 90 81 02 93 08 
 #                  piece 0x00000010, d0, piece 0x00000008, d1, piece 0x00000008
 --- |
   ; Generate from (and then manually modified to incorporate a DW_OP_LLVM_fragment):
   ; typedef float vec2 __attribute__((vector_size(16)));
   ; vec2 v();
   ; float f() {
   ;   vec2 vec = v();

test/DebugInfo/MIR/ARM/split-superreg.mir

-# RUN: llc -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
+# RUN:     llvm-dwarfdump - | FileCheck %s
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable
 # CHECK-NEXT: DW_AT_location [DW_FORM_data4]  ([[OFS:.*]])
 # CHECK-NEXT: DW_AT_name {{.*}}"vec"
 # CHECK: .debug_loc contents:
-# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000016
-# CHECK:             Ending address offset: 0x000000000000001e
+# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000010
+# CHECK:             Ending address offset: 0x0000000000000018
 # CHECK:              Location description: 90 80 02 93 08 90 81 02 93 08 
 #                                           d0, piece 0x00000008, d1, piece 0x00000008
 --- |
   ; Generated from:
   ; typedef float vec2 __attribute__((vector_size(16)));
   ; vec2 v();
   ; float f() {
   ;   vec2 vec = v();