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AMDGPU: Fix converting unanalyzable global loads to SMRD
ClosedPublic

Authored by arsenm on Jul 10 2017, 4:25 PM.

Reviewers

alex-t
rampitec

Summary

Not all memory dependence queries succeed, so this needs to
be conservative if it fails.

LGTM

This revision is now accepted and ready to land.Jul 10 2017, 6:35 PM

r307861

Path

Size

lib/

Target/

AMDGPU/

9 lines

test/

CodeGen/

AMDGPU/

20 lines

Show First 20 Lines • Show All 102 Lines • ▼ Show 20 Lines	if (L) {
} while (P);		} while (P);
Checklist.insert(L->block_begin(), L->block_end());		Checklist.insert(L->block_begin(), L->block_end());
Start = L->getHeader();		Start = L->getHeader();
}		}

DFS(Start, Checklist);		DFS(Start, Checklist);
for (auto &BB : Checklist) {		for (auto &BB : Checklist) {
BasicBlock::iterator StartIt = (!L && (BB == Load->getParent())) ?		BasicBlock::iterator StartIt = (!L && (BB == Load->getParent())) ?
BasicBlock::iterator(Load) : BB->end();		BasicBlock::iterator(Load) : BB->end();
if (MDR->getPointerDependencyFrom(MemoryLocation(Ptr),		auto Q = MDR->getPointerDependencyFrom(MemoryLocation(Ptr), true,
true, StartIt, BB, Load).isClobber())		StartIt, BB, Load);
		if (Q.isClobber() \|\| Q.isUnknown())
return true;		return true;
}		}
return false;		return false;
}		}

void AMDGPUAnnotateUniformValues::visitBranchInst(BranchInst &I) {		void AMDGPUAnnotateUniformValues::visitBranchInst(BranchInst &I) {
if (I.isUnconditional())		if (I.isUnconditional())
return;		return;

▲ Show 20 Lines • Show All 68 Lines • Show Last 20 Lines

				; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -memdep-block-scan-limit=1 -amdgpu-scalarize-global-loads -verify-machineinstrs < %s \| FileCheck -enable-var-scope -check-prefix=GCN %s

				; GCN-LABEL: {{^}}unknown_memdep_analysis:
				; GCN: flat_load_dword
				; GCN: flat_load_dword
				; GCN: flat_store_dword
				define amdgpu_kernel void @unknown_memdep_analysis(float addrspace(1)* nocapture readonly %arg) #0 {
				bb:
				%tmp53 = load float, float addrspace(1)* undef, align 4
				%tmp54 = getelementptr inbounds float, float addrspace(1)* %arg, i32 31
				%tmp55 = load float, float addrspace(1)* %tmp54, align 4
				%tmp56 = tail call float @llvm.fmuladd.f32(float undef, float %tmp53, float %tmp55)
				store float %tmp56, float addrspace(1)* undef, align 4
				ret void
				}

				declare float @llvm.fmuladd.f32(float, float, float) #1

				attributes #0 = { nounwind }
				attributes #1 = { nounwind readnone speculatable }