[X86] lea rdx, [rax - one] adds one instead of subtracts when one is a symbol that has been .set (PR33667)

[avt77]

Summary

It's a problem in Intel syntax of asm.

[RKSimon]

Couple of minors

lib/Target/X86/AsmParser/X86AsmParser.cpp

1510–1511

Replace SM.getImm() with ImmVal?

test/MC/X86/intel-syntax.s

20

Interleave the CHECKs with the relevant instruction

[avt77]

I fixed Simon's comments.

[RKSimon]

lib/Target/X86/AsmParser/X86AsmParser.cpp

1517

What happens to the case where these is a Disp and ImmVal but the Disp isn't a symbol ref? That drops to the Disp = Imm case and we lose the displacement?

test/MC/X86/intel-syntax.s

20

The rest of the test file capitalizes its REGISTER - match the style?

[avt77]

It's fixed in D35621

lib/Target/X86/AsmParser/X86AsmParser.cpp

void onIdentifierExpr(const MCExpr *SymRef, StringRef SymRefName) {
         State = IES_ERROR;
         break;
       case IES_PLUS:
       case IES_MINUS:
       case IES_NOT:
         State = IES_INTEGER;
         Sym = SymRef;
         SymName = SymRefName;
+        if (Sym->getKind() == llvm::MCExpr::Constant) {
+          auto *Constant = cast<MCConstantExpr>(SymRef);
+          IC.pushOperand(IC_IMM, Constant->getValue());
+        } else
           IC.pushOperand(IC_IMM);
         break;
       }
     }
     bool onInteger(int64_t TmpInt, StringRef &ErrMsg) {
       IntelExprState CurrState = State;
       switch (State) {
       default:
         State = IES_ERROR;
X86AsmParser::ParseIntelBracExpression(unsigned SegReg, SMLoc Start,
   if (const MCExpr *Sym = SM.getSym()) {
     // A symbolic displacement.
     Disp = Sym;
     if (isParsingInlineAsm())
       RewriteIntelBracExpression(*InstInfo->AsmRewrites, SM.getSymName(),
                                  ImmDisp, SM.getImm(), BracLoc, StartInBrac,
                                  End);
   }
 
-  if (SM.getImm() || !Disp) {
-    const MCExpr *Imm = MCConstantExpr::create(SM.getImm(), getContext());
-    if (Disp)
+  int64_t ImmVal = SM.getImm();
+  if (ImmVal || !Disp) {
+    const MCExpr *Imm = MCConstantExpr::create(ImmVal, getContext());
+    if (Disp && ImmVal && Disp->getKind() == llvm::MCExpr::SymbolRef)
       Disp = MCBinaryExpr::createAdd(Disp, Imm, getContext());
     else
       Disp = Imm;  // An immediate displacement only.
   }
 
   // Parse struct field access.  Intel requires a dot, but MSVC doesn't.  MSVC
   // will in fact do global lookup the field name inside all global typedefs,
   // but we don't emulate that.
   if ((Parser.getTok().getKind() == AsmToken::Identifier ||
        Parser.getTok().getKind() == AsmToken::Dot ||
        Parser.getTok().getKind() == AsmToken::Real) &&

test/MC/X86/intel-syntax.s

 // RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel %s > %t 2> %t.err
 // RUN: FileCheck < %t %s
 // RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s
 
 _test:
   xor EAX, EAX
   ret
 
+.set  number, 33
+
 _main:
+// CHECK: leaq -33(%rax), %rdx
+  lea rdx, [rax - 33]
+// CHECK: leaq -33(%rax), %rdx
+  lea rdx, [rax - number]
+// CHECK: leaq 33(%rax), %rdx
+  lea rdx, [rax + number]
+// CHECK: leaq 33(%rax), %rdx
+  lea rdx, [number + rax]
+
 // CHECK: movl  $257, -4(%rsp)
   mov DWORD PTR [RSP - 4], 257
 // CHECK: movl  $258, 4(%rsp)
   mov DWORD PTR [RSP + 4], 258
 // CHECK: movq  $123, -16(%rsp)
   mov QWORD PTR [RSP - 16], 123
 // CHECK: movb  $97, -17(%rsp)
   mov BYTE PTR [RSP - 17], 97