[ARM] Create relocations for unconditional branches.

[fhahn]

Summary

Relocations are required for unconditional branches to function symbols with
different execution mode. Without this patch, incorrect branches are
generated for tail calls between functions with different execution
mode.

[fhahn]

With this change, only 4 tests fail with an ARM bootstrap build with a version of clang that randomly adds +thumb-mode. The failures seem unrelated to Thumb mode

LLVM-Unit :: DebugInfo/DWARF/DebugInfoDWARFTests/DWARFDebugInfo.TestDwarfVerifyInvalidCURef
LLVM-Unit :: DebugInfo/DWARF/DebugInfoDWARFTests/DWARFDebugInfo.TestDwarfVerifyInvalidLineFileIndex
LLVM-Unit :: DebugInfo/DWARF/DebugInfoDWARFTests/DWARFDebugInfo.TestDwarfVerifyInvalidLineSequence
LLVM-Unit :: DebugInfo/DWARF/DebugInfoDWARFTests/DWARFDebugInfo.TestDwarfVerifyInvalidStmtList
LLVM :: Bindings/Go/go.test

That's down from a couple of thousand failures without this patch!

[peter.smith]

I'm happy with these changes. Again, will be worth seeing if there are any objections from later time zones before committing.

lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

if (IsResolved && (unsigned)Fixup.getKind() == ARM::fixup_arm_thumb_bl) {
 
     // If the symbol is external the linker will handle it.
     // FIXME: Should we handle it as an optimization?
 
     // If the symbol is out of range, produce a relocation and hope the
     // linker can handle it. GNU AS produces an error in this case.
     if (Sym->isExternal() || Value >= 0x400004)
       IsResolved = false;
-    // When an ARM function is called from a Thumb function, produce a
-    // relocation so the linker will use the correct branch instruction for ELF
-    // binaries.
-    if (Sym->isELF()) {
-      unsigned Type = dyn_cast<MCSymbolELF>(Sym)->getType();
-      if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC) &&
-          !Asm.isThumbFunc(Sym))
+  }
+  // Create relocations for unconditional branches to function symbols with
+  // different execution mode in ELF binaries.
+  if (Sym && Sym->isELF()) {
+    if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC)) {
+      unsigned FixupKind = Fixup.getKind() ;
+      if (Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_uncondbranch))
+        IsResolved = false;
+      if (!Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_thumb_br ||
+                                    FixupKind == ARM::fixup_arm_thumb_bl ||
+                                    FixupKind == ARM::fixup_t2_uncondbranch))
         IsResolved = false;
     }
   }
   // We must always generate a relocation for BL/BLX instructions if we have
   // a symbol to reference, as the linker relies on knowing the destination
   // symbol's thumb-ness to get interworking right.
   if (A && ((unsigned)Fixup.getKind() == ARM::fixup_arm_thumb_blx ||
             (unsigned)Fixup.getKind() == ARM::fixup_arm_blx ||

test/MC/ARM/arm-thumb-tail-call.ll

+; RUN: llc -O0 < %s -mtriple armv7-linux-gnueabi -o - \
+; RUN:   | llvm-mc -triple armv7-linux-gnueabi -filetype=obj -o - \
+; RUN:    | llvm-readobj -r | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "armv7--linux-gnueabihf"
+
+define internal i32 @arm_fn() #1 {
+  %1 = tail call i32 @thumb_fn()
+  ret i32 %1
+}
+
+define internal i32 @thumb_fn() #2 {
+  %1 = tail call i32 @arm_fn()
+  ret i32 %1
+}
+
+attributes #1 = { "target-features"="-thumb-mode" }
+attributes #2 = { "target-features"="+thumb-mode" }
+
+; CHECK: Relocations [
+; CHECK-NEXT: Section (3) .rel.text {
+; CHECK-NEXT: 0x0 R_ARM_JUMP24 thumb_fn 0x0
+; CHECK-NEXT: 0x4 R_ARM_THM_JUMP24 arm_fn 0x0
+; CHECK-NEXT: }