[Nios2] Changes in frontend to support Nios2 LLVM target

[belickim]

Summary

Hello,

This patch is part of our effort to implement Nios2 architecture support in LLVM and clang (our plans were announced in mailing list thread: "[llvm-dev] [RFC] Nios II backend" form April 12th).

This patch depends on changes introduced by patch D32669.

The patch contains following additions:

• Nios2 builtins;
• using -march or -mcpu options to specify Nios2 CPU type (R1 or R2) ;
• TargetInfo class implementation for Nios2.

Please let me know what you think about proposed change set.

Kind regards,
Mateusz Belicki

[joerg]

lib/Basic/Targets.cpp

7614

Can you just give the full string and avoid the runtime allocations?

7650

DefineStd tends to give a lot of namespace pollution, is that intentional here?

[belickim]

lib/Basic/Targets.cpp

7614

Yes, I will fix this.

7650

Yes, the usage is intentional: definitions of all four: __nios2, __nios2__, __NIOS2 and __NIOS2__ are part of Nios2 ABI (page 23, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/nios2/n2cpu_nii51016.pdf).

[belickim]

Additionally this information may be useful in context of this patch: here is specification of Nios2 builtins as implemented in GCC: https://gcc.gnu.org/onlinedocs/gcc/Altera-Nios-II-Built-in-Functions.html

[joerg]

lib/Basic/Targets.cpp

7650

The problem is that DefineStd will also define the no-underscore version in GNU mode.

[belickim]

lib/Basic/Targets.cpp

7650

Oh, that definitely is not needed in our case. I will remove the usage of DefineStd(). Looking at implementations of other TargetInfos, I assume that preferred solution would be to manually call Builder.defineMacro() for all four defintions.

[joerg]

lib/Basic/Targets.cpp

7650

Yes, that's fine/

[belickim]

I implemented changes suggested by Joerg.

In previous version there was also an additional macro with CPU name that I removed. It was not documented anywhere and is not even used by GCC. So there seems to be no prior usages, that would support its existence. The presence of that macro in previous version of the patch was an oversight.

[craig.topper]

Is there enough functional here that there should be tests for? i.e. make sure march/mcpu switches are recognized, that the target is recognized, etc.

[belickim]

I added test for driver to check if target and CPU flags are recognized, as Craig suggested.

[ahatanak]

A couple of coding style nits. FYI, LLVM coding standard is documented here:

http://llvm.org/docs/CodingStandards.html

include/clang/Basic/TargetBuiltins.h

154

No need to indent enum inside namespace.

http://llvm.org/docs/CodingStandards.html#namespace-indentation

lib/Basic/Targets.cpp

7609

No need for curly braces here.

7631

You don't need the inner parentheses here and the code below.

7685

Two space indentation here.

lib/Driver/ToolChains/CommonArgs.cpp

220

You can just write "if (!A)". Also, you can move up the return statement at the end of the function and do an early return.

if (A!) {
  ...
  return ""
}

const *name = A->getValue();
...

[belickim]

include/clang/Basic/TargetBuiltins.h

154

I was trying to follow conventions used by other code in this file (this also applies to some extend to other things that you pointed out). I will try to follow LLVM coding conventions over style present in file for any future changes. Thank you for your comments, I will prepare update with all changes that you suggested.

[belickim]

Thanks Akira for your comments, I made all changes that you suggested.

[craig.topper]

LGTM

lib/Basic/Targets.cpp

7678

This is indented too far. Can you fix when you commit?

include/clang/Basic/BuiltinsNios2.def

+//===-- BuiltinsNios2.def - Nios2 Builtin function database --------*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the Nios2-specific builtin function database. Users of
+// this file must define the BUILTIN macro to make use of this information.
+//
+//===----------------------------------------------------------------------===//
+
+// The format of this database matches clang/Basic/Builtins.def.
+
+#if defined(BUILTIN) && !defined(TARGET_BUILTIN)
+#   define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS)
+#endif
+
+// Nios2 R1 builtins:
+
+//int __builtin_ldbio(volatile const void *);
+BUILTIN(__builtin_ldbio, "ivDC*", "")
+//int __builtin_ldbuio(volatile const void *);
+BUILTIN(__builtin_ldbuio, "ivDC*", "")
+//int __builtin_ldhio(volatile const void *);
+BUILTIN(__builtin_ldhio, "ivDC*", "")
+//int __builtin_ldhuio(volatile const void *);
+BUILTIN(__builtin_ldhuio, "ivDC*", "")
+//int __builtin_ldwio(volatile const void *);
+BUILTIN(__builtin_ldwio, "ivDC*", "")
+//int __builtin_ldwuio(int);
+BUILTIN(__builtin_ldwuio, "ii", "")
+// int __builtin_rdctl(int);
+BUILTIN(__builtin_rdctl, "iIi", "")
+// void __builtin_wrctl(int, int);
+BUILTIN(__builtin_wrctl, "vIii", "")
+// int __builtin_rdprs(int, int);
+BUILTIN(__builtin_rdprs, "iii", "")
+//void __builtin_stbio(volatile void *, int);
+BUILTIN(__builtin_stbio, "vvD*i", "")
+//void __builtin_sthio(volatile void *, int);
+BUILTIN(__builtin_sthio, "vvD*i", "")
+//void __builtin_stwio(volatile void *, int);
+BUILTIN(__builtin_stwio, "vvD*i", "")
+//void __builtin_sync(void);
+BUILTIN(__builtin_sync, "v", "")
+// void __builtin_flushd(volatile void *);
+BUILTIN(__builtin_flushd, "vvD*", "")
+// void __builtin_flushda(volatile void *);
+BUILTIN(__builtin_flushda, "vvD*", "")
+
+// Nios2 R2 builtins:
+
+// int __builtin_wrpie(int);
+TARGET_BUILTIN(__builtin_wrpie, "ii", "", "nios2r2mandatory")
+// void __builtin_eni(int);
+TARGET_BUILTIN(__builtin_eni, "vi", "", "nios2r2mandatory")
+// int __builtin_ldex(volatile const void *);
+TARGET_BUILTIN(__builtin_ldex, "ivDC*", "", "nios2r2mandatory")
+// int __builtin_stex(volatile void *, int);
+TARGET_BUILTIN(__builtin_stex, "ivD*i", "", "nios2r2mandatory")
+// int __builtin_ldsex(volatile const void *);
+TARGET_BUILTIN(__builtin_ldsex, "ivDC*", "", "nios2r2mpx")
+// int __builtin_stsex(volatile void *, int);
+TARGET_BUILTIN(__builtin_stsex, "ivDC*i", "", "nios2r2mpx")
+
+#undef BUILTIN
+#undef TARGET_BUILTIN

include/clang/Basic/TargetBuiltins.h

namespace Hexagon {
     enum {
         LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
 #include "clang/Basic/BuiltinsHexagon.def"
         LastTSBuiltin
     };
   }
 
+  /// \brief Nios2 builtins
+  namespace Nios2 {
+      enum {
+        LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
+#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
+#include "clang/Basic/BuiltinsNios2.def"
+        LastTSBuiltin
+      };
+  }
+
   /// \brief MIPS builtins
   namespace Mips {
     enum {
         LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
 #include "clang/Basic/BuiltinsMips.def"
         LastTSBuiltin
     };

lib/Basic/Targets.cpp

bool validateAsmConstraint(const char *&Name,
                              TargetInfo::ConstraintInfo &info) const override {
     return true;
   }
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
     return None;
   }
 };
 
+class Nios2TargetInfo : public TargetInfo {
+  void setDataLayout() {
+    StringRef Layout = "p:32:32:32-i8:8:32-i16:16:32-n32";
+    if (BigEndian) {
+      resetDataLayout(("E-" + Layout).str());
+    } else {
+      resetDataLayout(("e-" + Layout).str());
+    }
+  }
+
+  static const Builtin::Info BuiltinInfo[];
+  std::string CPU;
+  std::string ABI;
+
+public:
+  Nios2TargetInfo(const llvm::Triple &triple, const TargetOptions &opts)
+      : TargetInfo(triple), CPU(opts.CPU), ABI(opts.ABI) {
+    SizeType = UnsignedInt;
+    PtrDiffType = SignedInt;
+    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+    setDataLayout();
+  }
+
+  StringRef getABI() const override { return ABI; }
+  bool setABI(const std::string &Name) override {
+    if ((Name == "o32") || (Name == "eabi")) {
+      ABI = Name;
+      return true;
+    }
+    return false;
+  }
+
+  bool setCPU(const std::string &Name) override {
+    if ((Name == "nios2r1") || (Name == "nios2r2")) {
+      CPU = Name;
+      return true;
+    }
+    return false;
+  }
+
+  void getTargetDefines(const LangOptions &Opts,
+                        MacroBuilder &Builder) const override {
+    DefineStd(Builder, "nios2", Opts);
+    DefineStd(Builder, "NIOS2", Opts);
+
+    Builder.defineMacro("_NIOS2_ARCH", "\"" + CPU + "\"");
+    Builder.defineMacro("_NIOS2_ARCH_" + StringRef(CPU).upper());
+  }
+
+  ArrayRef<Builtin::Info> getTargetBuiltins() const override {
+    return llvm::makeArrayRef(BuiltinInfo, clang::Nios2::LastTSBuiltin -
+                                               Builtin::FirstTSBuiltin);
+  }
+
+  bool isFeatureSupportedByCPU(StringRef Feature, StringRef CPU) const {
+    const bool isR2 = CPU == "nios2r2";
+    return llvm::StringSwitch<bool>(Feature)
+        .Case("nios2r2mandatory", isR2)
+        .Case("nios2r2bmx", isR2)
+        .Case("nios2r2mpx", isR2)
+        .Case("nios2r2cdx", isR2)
+        .Default(false);
+  }
+
+  bool initFeatureMap(llvm::StringMap<bool> &Features,
+                      DiagnosticsEngine &Diags, StringRef CPU,
+                      const std::vector<std::string> &FeatureVec) const override {
+    static const char *allFeatures[] = {
+      "nios2r2mandatory", "nios2r2bmx", "nios2r2mpx", "nios2r2cdx"
+    };
+    for (const char *feature : allFeatures) {
+        Features[feature] = isFeatureSupportedByCPU(feature, CPU);
+    }
+    return true;
+  }
+
+  bool hasFeature(StringRef Feature) const override {
+      return isFeatureSupportedByCPU(Feature, CPU);
+  }
+
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+    return TargetInfo::VoidPtrBuiltinVaList;
+  }
+
+  ArrayRef<const char *> getGCCRegNames() const override {
+    static const char *const GCCRegNames[] = {
+        // CPU register names
+        // Must match second column of GCCRegAliases
+        "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
+        "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20",
+        "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30",
+        "r31",
+        // Control register names
+        "ctl0", "ctl1", "ctl2", "ctl3", "ctl4", "ctl5", "ctl6", "ctl7", "ctl8",
+        "ctl9", "ctl10", "ctl11", "ctl12", "ctl13", "ctl14", "ctl15"};
+    return llvm::makeArrayRef(GCCRegNames);
+  }
+
+  bool validateAsmConstraint(const char *&Name,
+                             TargetInfo::ConstraintInfo &Info) const override {
+    switch (*Name) {
+    default:
+      return false;
+
+    case 'r': // CPU registers.
+    case 'd': // Equivalent to "r" unless generating MIPS16 code.
+    case 'y': // Equivalent to "r", backwards compatibility only.
+    case 'f': // floating-point registers.
+    case 'c': // $25 for indirect jumps
+    case 'l': // lo register
+    case 'x': // hilo register pair
+      Info.setAllowsRegister();
+      return true;
+    }
+  }
+
+  const char *getClobbers() const override { return ""; }
+
+  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+    static const TargetInfo::GCCRegAlias aliases[] = {
+        {{"zero"}, "r0"},      {{"at"}, "r1"},          {{"et"}, "r24"},
+        {{"bt"}, "r25"},       {{"gp"}, "r26"},         {{"sp"}, "r27"},
+        {{"fp"}, "r28"},       {{"ea"}, "r29"},         {{"ba"}, "r30"},
+        {{"ra"}, "r31"},       {{"status"}, "ctl0"},    {{"estatus"}, "ctl1"},
+        {{"bstatus"}, "ctl2"}, {{"ienable"}, "ctl3"},   {{"ipending"}, "ctl4"},
+        {{"cpuid"}, "ctl5"},   {{"exception"}, "ctl7"}, {{"pteaddr"}, "ctl8"},
+        {{"tlbacc"}, "ctl9"},  {{"tlbmisc"}, "ctl10"},  {{"badaddr"}, "ctl12"},
+        {{"config"}, "ctl13"}, {{"mpubase"}, "ctl14"},  {{"mpuacc"}, "ctl15"},
+    };
+    return llvm::makeArrayRef(aliases);
+  }
+};
+
+const Builtin::Info Nios2TargetInfo::BuiltinInfo[] = {
+#define BUILTIN(ID, TYPE, ATTRS)                                               \
+  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
+#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE)                               \
+  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
+#include "clang/Basic/BuiltinsNios2.def"
+};
+
 class MipsTargetInfo : public TargetInfo {
   void setDataLayout() {
     StringRef Layout;
 
     if (ABI == "o32")
       Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
     else if (ABI == "n32")
       Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
case llvm::Triple::avr:
     return new AVRTargetInfo(Triple, Opts);
   case llvm::Triple::bpfeb:
   case llvm::Triple::bpfel:
     return new BPFTargetInfo(Triple, Opts);
 
   case llvm::Triple::msp430:
     return new MSP430TargetInfo(Triple, Opts);
 
+  case llvm::Triple::nios2:
+    return new LinuxTargetInfo<Nios2TargetInfo>(Triple, Opts);
+
   case llvm::Triple::mips:
     switch (os) {
     case llvm::Triple::Linux:
       return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
     case llvm::Triple::RTEMS:
       return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
     case llvm::Triple::FreeBSD:
       return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);

lib/Driver/ToolChains/CommonArgs.cpp

return llvm::StringSwitch<const char *>(GPUName)
         .Cases("sumo", "sumo2", "sumo")
         .Case("hemlock", "cypress")
         .Case("aruba", "cayman")
         .Default(GPUName);
   }
   return "";
 }
 
+static std::string getNios2TargetCPU(const ArgList &Args) {
+  Arg *A = Args.getLastArg(options::OPT_mcpu_EQ);
+  if (A == nullptr)
+    A = Args.getLastArg(options::OPT_march_EQ);
+
+  if (A) {
+    const char *name = A->getValue();
+    return llvm::StringSwitch<const char *>(name)
+        .Case("r1", "nios2r1")
+        .Case("r2", "nios2r2")
+        .Default(name);
+  }
+  return "";
+}
+
 static std::string getLanaiTargetCPU(const ArgList &Args) {
   if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
     return A->getValue();
   }
   return "";
 }
 
 /// Get the (LLVM) name of the WebAssembly cpu we are targeting.
case llvm::Triple::thumbeb: {
     return arm::getARMTargetCPU(MCPU, MArch, T);
   }
 
   case llvm::Triple::avr:
     if (const Arg *A = Args.getLastArg(options::OPT_mmcu_EQ))
       return A->getValue();
     return "";
 
+  case llvm::Triple::nios2: {
+    return getNios2TargetCPU(Args);
+  }
+
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::mips64:
   case llvm::Triple::mips64el: {
     StringRef CPUName;
     StringRef ABIName;
     mips::getMipsCPUAndABI(Args, T, CPUName, ABIName);
     return CPUName;