[RegisterBankInfo] Remove overly-agressive asserts

[tstellar]

Summary

We were asserting in RegisterBankInfo if RBI.copyCost() returns
UINT_MAX. This is OK for RegBankSelect::Mode::Fast since we only
try one instruction mapping and can't recover from this, but for
RegBankSelect::Mode::Greedy we will be considering multiple
instruction mappings, so we can recover if we see a UNIT_MAX copy
cost.

The copy cost for one pair of register banks in the AMDGPU backend
will be UNIT_MAX, so this patch will prevent AMDGPU tests from
breaking.

[qcolombet]

lib/CodeGen/GlobalISel/RegBankSelect.cpp

449 ↗

(On Diff #98810)

Add a check for the RepairCost here. Otherwise we are going to have overflow in the following computation.

I.e., if (RepairCost == UINT_MAX)

continue;

[tstellar]

Add early exit to avoid overflow.

[qcolombet]

LGTM, nitpick below

lib/CodeGen/GlobalISel/RegBankSelect.cpp

449 ↗

(On Diff #98819)

Add a comment saying that this is an impossible repair cost.

[tstellar]

lib/CodeGen/GlobalISel/RegBankSelect.cpp

449 ↗

(On Diff #98810)

Hi Quentin,

I committed with continue; but after running some more tests, shouldn't it really be:

if (RepairCost == UINT_MAX)

return MappingCost::ImpossibleCost();

llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp

if (IsSameNumOfValues) {
     // We would also need to propagate this information in the
     // repairing placement.
     unsigned Cost =
         RBI->copyCost(*DesiredRegBrank, *CurRegBank,
                       RegisterBankInfo::getSizeInBits(MO.getReg(), *MRI, *TRI));
     // TODO: use a dedicated constant for ImpossibleCost.
     if (Cost != UINT_MAX)
       return Cost;
-    assert(!TPC->isGlobalISelAbortEnabled() &&
-           "Legalization not available yet");
     // Return the legalization cost of that repairing.
   }
-  assert(!TPC->isGlobalISelAbortEnabled() &&
-         "Complex repairing not implemented yet");
   return UINT_MAX;
 }
 
 const RegisterBankInfo::InstructionMapping &RegBankSelect::findBestMapping(
     MachineInstr &MI, RegisterBankInfo::InstructionMappings &PossibleMappings,
     SmallVectorImpl<RepairingPlacement> &RepairPts) {
   assert(!PossibleMappings.empty() &&
          "Do not know how to map this instruction");
for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands();
     // MO may not have a register bank while still needing repairing.
     // For the fast mode, we don't compute the cost so that is fine,
     // but still for the repairing code, we will have to make a choice.
     // For the greedy mode, we should choose greedily what is the best
     // choice based on the next use of MO.
 
     // Sums up the repairing cost of MO at each insertion point.
     uint64_t RepairCost = getRepairCost(MO, ValMapping);
+
+    // This is an impossible to repair cost.
+    if (RepairCost == UINT_MAX)
+      continue;
+
     // Bias used for splitting: 5%.
     const uint64_t PercentageForBias = 5;
     uint64_t Bias = (RepairCost * PercentageForBias + 99) / 100;
     // We should not need more than a couple of instructions to repair
     // an assignment. In other words, the computation should not
     // overflow because the repairing cost is free of basic block
     // frequency.
     assert(((RepairCost < RepairCost * PercentageForBias) &&