[AMDGPU] Fix incorrect register pressure calculation

[rampitec]

Summary

Earlier fix D32572 introduced a bug where live-ins were calculated
for basic block instead of scheduling region. This change fixes it.

[vpykhtin]

lib/Target/AMDGPU/GCNSchedStrategy.cpp

426

you can use skipDebugInstructionsForward from MachineBasicBlock.h for the same purpose

[rampitec]

Changed to use skipDebugInstructionsForward().

lib/Target/AMDGPU/GCNSchedStrategy.cpp

426

Thanks.

[vpykhtin]

LGTM.

lib/Target/AMDGPU/GCNSchedStrategy.cpp

static inline void setMask(const MachineRegisterInfo &MRI,
   assert ((int)SGPRs >= 0 && (int)VGPRs >= 0);
   PrevMask = NewMask;
 }
 
 void GCNScheduleDAGMILive::discoverLiveIns() {
   unsigned SGPRs = 0;
   unsigned VGPRs = 0;
 
-  auto &MI = *begin()->getParent()->getFirstNonDebugInstr();
+  auto I = begin();
+  for (auto const E = I->getParent()->end(); I != E; ++I)
+    if (!I->isDebugValue())
+      break;
   const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI);
-  SlotIndex SI = LIS->getInstructionIndex(MI).getBaseIndex();
+  SlotIndex SI = LIS->getInstructionIndex(*I).getBaseIndex();
   assert (SI.isValid());
 
   DEBUG(dbgs() << "Region live-ins:");
   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
     unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
     if (MRI.reg_nodbg_empty(Reg))
       continue;
     const LiveInterval &LI = LIS->getInterval(Reg);