[mips] Impose a threshold for coercion of aggregates

[smaksimovic]

Summary

Modified MipsABIInfo::classifyArgumentType so that it now coerces aggregate structures
only if the size of said aggregate is less than 16/64 bytes, depending on the ABI.

[sdardis]

LGTM.

test/CodeGen/mips-aggregate-arg.c

3

Space after the -target-abi n64

[sdardis]

Spotted a minor nit.

test/CodeGen/mips-aggregate-arg.c

36

Nit: spurious whitespace here.

[smaksimovic]

Thanks, fixed.

lib/CodeGen/TargetInfo.cpp

if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) {
     if (TySize == 0)
       return ABIArgInfo::getIgnore();
 
     if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
       Offset = OrigOffset + MinABIStackAlignInBytes;
       return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
     }
 
+    // Use indirect if the aggregate cannot fit into registers for
+    // passing arguments according to the ABI
+    unsigned Threshold = IsO32 ? 16 : 64;
+
+    if(getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(Threshold))
+      return ABIArgInfo::getIndirect(CharUnits::fromQuantity(Align), true,
+                                     getContext().getTypeAlign(Ty) / 8 > Align);
+
     // If we have reached here, aggregates are passed directly by coercing to
     // another structure type. Padding is inserted if the offset of the
     // aggregate is unaligned.
     ABIArgInfo ArgInfo =
         ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0,
                               getPaddingType(OrigOffset, CurrOffset));
     ArgInfo.setInReg(true);
     return ArgInfo;

test/CodeGen/mips-aggregate-arg.c

+// RUN: %clang_cc1 -triple mipsel-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=O32 %s
+// RUN: %clang_cc1 -triple mips64el-unknown-linux-gnu -S -emit-llvm -o - %s  -target-abi n32 | FileCheck -check-prefix=N32-N64 %s
+// RUN: %clang_cc1 -triple mips64el-unknown-linux-gnu -S -emit-llvm -o - %s  -target-abi n64| FileCheck -check-prefix=N32-N64 %s
+
+struct t1 {
+  char t1[10];
+};
+
+struct t2 {
+  char t2[20];
+};
+
+struct t3 {
+  char t3[65];
+};
+
+extern struct t1 g1;
+extern struct t2 g2;
+extern struct t3 g3;
+extern void f1(struct t1);
+extern void f2(struct t2);
+extern void f3(struct t3);
+
+void f() {
+
+// O32:  call void @f1(i32 inreg %3, i32 inreg %5, i16 inreg %7)
+// O32:  call void @f2(%struct.t2* byval align 4 %tmp)
+// O32:  call void @f3(%struct.t3* byval align 4 %tmp1)
+
+// N32-N64:  call void @f1(i64 inreg %3, i16 inreg %5)
+// N32-N64:  call void @f2(i64 inreg %9, i64 inreg %11, i32 inreg %13)
+// N32-N64:  call void @f3(%struct.t3* byval align 8 %tmp)
+
+  f1(g1);
+  f2(g2);
+  f3(g3);  
+}
+