This patch contains the new VPlan model and uses it to represent the vectorized code and drive the generation of vectorized IR. It follows the breakdown of https://reviews.llvm.org/D28975.
The patch contains
- https://reviews.llvm.org/D32200: once that patch is approved and committed, an updated and simplified version of this patch will be uploaded.
- VectorizationPlan.rst: documenting the VPlan model, covering this and follow-up patches.
- Protected methods made public to enable their reuse are annotated as such in-place to simplify the diff. They will eventually be moved and grouped together.
To recap, the introductory patch of VPlan is designed to
- capture in VPlan all current vectorization decisions,
- represent the control-flow of the vectorized loop body using VPlan's Hierarchical CFG,
- retain current vectorizer output.
In this patch VPlan models the vectorized loop body: the vectorized control-flow is represented using VPlan's Hierarchical CFG, with predication refactored from being a post-vectorization-step into a vectorization planning step modeling if-then VPRegionBlocks, and generating code inline with non-predicated code. The vectorized code within each VPBasicBlock is represented as a sequence of Recipes, each responsible for modelling and generating a sequence of IR instructions. To keep the size of this commit manageable the Recipes in this patch are coarse-grained and capture large chunks of LV’s code-generation logic. The constructed VPlans are dumped under -debug.
Gil and Ayal.