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Switch AArch64 to use reduction intrinsics
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Authored by aemerson on Apr 19 2017, 2:47 PM.

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Summary

This patch enables the use of the experimental reduction intrinsics from D30086 for AArch64.

The existing idiom recognition for the shufflevector sequence is removed and tests updated to use the new form.

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Repository
rL LLVM

Event Timeline

aemerson created this revision.Apr 19 2017, 2:47 PM
rengolin edited edge metadata.Apr 26 2017, 3:23 AM

As soon as the dependency patch is approved, this one looks ok.

Did you submit the patch that will make the MC layer recognise these patterns into the actual instructions?

lib/Target/AArch64/AArch64TargetTransformInfo.cpp
690 ↗(On Diff #95824)

For now, shouldn't this be == 128?

No changes are needed on the MC side. The same target-specific reduction DAG nodes (e.g. AArch64ISD::UADDV) should be created and from then on everything should work as before.

lib/Target/AArch64/AArch64TargetTransformInfo.cpp
690 ↗(On Diff #95824)

It's needed because vectors can be oversize, e.g. v8i32. We still want to use reductions for that as legalisation will split the vector later.

697 ↗(On Diff #95824)

FYI, I haven't yet updated this version of the patch, the current generic reduction patch combines the two hooks into one so this function will merge into the one above when I do.

aemerson updated this revision to Diff 98457.May 10 2017, 8:01 AM

New patch, rebased on latest ToT and using the different API implemented in the previous patch in D30086.

Marking this as accepted based on Renato's earlier approval, I'm just updating this review for future reference.

aemerson accepted this revision.May 10 2017, 8:01 AM
This revision is now accepted and ready to land.May 10 2017, 8:01 AM
This revision was automatically updated to reflect the committed changes.