This is an archive of the discontinued LLVM Phabricator instance.

Differential D31973

[AMDGPU][MC] Enabled constants for src operands of s_cbranch_g_fork
ClosedPublic

Authored by dp on Apr 12 2017, 3:49 AM.

Details

Reviewers
artem.tamazov
vpykhtin
Commits
rG5714860ee4a6: [AMDGPU][MC] Enabled constants for src operands of s_cbranch_g_fork
rL300318: [AMDGPU][MC] Enabled constants for src operands of s_cbranch_g_fork
Summary

See bug 32619: https://bugs.llvm.org//show_bug.cgi?id=32619

Diff Detail

Repository
rL LLVM

Event Timeline

dp created this revision.Apr 12 2017, 3:49 AM
Herald added subscribers: t-tye, tpr, dstuttard and 5 others. · View Herald TranscriptApr 12 2017, 3:49 AM
artem.tamazov accepted this revision.Apr 12 2017, 7:04 AM

LGTM. I am thinking it is worth to add some negative tests.

This revision is now accepted and ready to land.Apr 12 2017, 7:04 AM
dp added a comment.Apr 12 2017, 9:20 AM

I'll add a few negative tests with literals, would that suffice?

artem.tamazov added a comment.Apr 12 2017, 9:32 AM
In D31973#724922, @dp wrote:

I'll add a few negative tests with literals, would that suffice?

That's completely up to you. The idea is as follows. The patch extends allowed operand types. So now it is theoretically possible that some incorrect combinations of operands may pass through assembler. Let's smoke-test that only valid combinations of operands are actually allowed.

Closed by commit rL300318: [AMDGPU][MC] Enabled constants for src operands of s_cbranch_g_fork (authored by dpreobra). · Explain WhyApr 14 2017, 5:05 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
AMDGPU/
2 lines
test/
MC/
AMDGPU/
7 lines
8 lines

Diff 95289

llvm/trunk/lib/Target/AMDGPU/SOPInstructions.td

Show First 20 Lines • Show All 428 Lines • ▼ Show 20 Lines
def S_BFE_U32 : SOP2_32 <"s_bfe_u32">; def S_BFE_U32 : SOP2_32 <"s_bfe_u32">;
def S_BFE_I32 : SOP2_32 <"s_bfe_i32">; def S_BFE_I32 : SOP2_32 <"s_bfe_i32">;
def S_BFE_U64 : SOP2_64_32 <"s_bfe_u64">; def S_BFE_U64 : SOP2_64_32 <"s_bfe_u64">;
def S_BFE_I64 : SOP2_64_32 <"s_bfe_i64">; def S_BFE_I64 : SOP2_64_32 <"s_bfe_i64">;
} // End Defs = [SCC] } // End Defs = [SCC]
def S_CBRANCH_G_FORK : SOP2_Pseudo < def S_CBRANCH_G_FORK : SOP2_Pseudo <
"s_cbranch_g_fork", (outs), "s_cbranch_g_fork", (outs),
(ins SReg_64:$src0, SReg_64:$src1), (ins SCSrc_b64:$src0, SCSrc_b64:$src1),
"$src0, $src1" "$src0, $src1"
> { > {
let has_sdst = 0; let has_sdst = 0;
} }
let Defs = [SCC] in { let Defs = [SCC] in {
def S_ABSDIFF_I32 : SOP2_32 <"s_absdiff_i32">; def S_ABSDIFF_I32 : SOP2_32 <"s_absdiff_i32">;
} // End Defs = [SCC] } // End Defs = [SCC]
▲ Show 20 Lines • Show All 849 Lines • Show Last 20 Lines

llvm/trunk/test/MC/AMDGPU/sop2-err.s

// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s
s_cbranch_g_fork 100, s[6:7]
// GCN: error: invalid operand for instruction
s_cbranch_g_fork s[6:7], 100
// GCN: error: invalid operand for instruction

llvm/trunk/test/MC/AMDGPU/sop2.s

Show First 20 Lines • Show All 154 Lines • ▼ Show 20 Lines
s_bfe_i64 s[2:3], s[4:5], s6 s_bfe_i64 s[2:3], s[4:5], s6
// SICI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x95] // SICI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x95]
// VI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x94] // VI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x94]
s_cbranch_g_fork s[4:5], s[6:7] s_cbranch_g_fork s[4:5], s[6:7]
// SICI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x95] // SICI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x95]
// VI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x94] // VI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x94]
s_cbranch_g_fork 1, s[6:7]
// SICI: s_cbranch_g_fork 1, s[6:7] ; encoding: [0x81,0x06,0x80,0x95]
// VI: s_cbranch_g_fork 1, s[6:7] ; encoding: [0x81,0x06,0x80,0x94]
s_cbranch_g_fork s[6:7], 2
// SICI: s_cbranch_g_fork s[6:7], 2 ; encoding: [0x06,0x82,0x80,0x95]
// VI: s_cbranch_g_fork s[6:7], 2 ; encoding: [0x06,0x82,0x80,0x94]
s_absdiff_i32 s2, s4, s6 s_absdiff_i32 s2, s4, s6
// SICI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x96] // SICI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x96]
// VI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x95] // VI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x95]
s_add_u32 s101, s102, s103 s_add_u32 s101, s102, s103
// SICI: s_add_u32 s101, s102, s103 ; encoding: [0x66,0x67,0x65,0x80] // SICI: s_add_u32 s101, s102, s103 ; encoding: [0x66,0x67,0x65,0x80]
// NOVI: error: not a valid operand // NOVI: error: not a valid operand