This is the second one in the series of patches to enable adding of machine sched-models for ARM processors easier and compact. This patch focuses on integer instructions and adds missing sched definitions.
Awesome work, thanks!
Adding Tim, as you touch some of the Swift stuff.
Does that make some of the scheduler to be "complete"? If so, we should also update:
let CompleteModel = 1;
So that it gets validated from now on.
Thanks for the feedback.
We can't set CompleteModel just yet, but we are getting there. We need add missing schedule information some more instructions (notably Thumb2, VLD/VST)
|4079 ↗||(On Diff #85749)|
I see you're modelling IIC_iMUL16 the same as IIC_iMUL32, but they don't seem to be exactly identical in any of the models (A9, A8, V6). Same for IIC_iMAC16.
|41 ↗||(On Diff #85749)|
Can you also add a test for 64-bit mac?
I'm not sure if it's you or Phab, but I'm only seeing the changes between the first patch and the current one (not between trunk and the current one). You might want to try to upload again with all the changes included.
|1 ↗||(On Diff #86230)|
Nitpick: Why this is an IR test and not an MIR test?
|49 ↗||(On Diff #86230)|
This looks a bit contrived, is there any reason why you don't use mul i16 %c, %c to get a smulbb?
As requested, I have simplified the test (removed the contrived way of generating SMULBB), added test for SMLABB. Also, converted the test to MIR test.
Thanks and Best Regards