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SPARC: allow usage of floating-point registers in inline ASM
ClosedPublic

Authored by pboettch on Jan 24 2017, 11:45 PM.

Details

Summary

Make clang recognize floating point registers in inline assembler
when using the targeting Sparc.

This code now works:

static inline float fabsf(float a)
{

float res;
__asm __volatile__("fabss  %1, %0;"
                   : "=f"(res)
                   : "f"(a));
return res;

}

Diff Detail

Event Timeline

pboettch created this revision.Jan 24 2017, 11:45 PM
pboettch updated this revision to Diff 85708.Jan 25 2017, 1:00 AM

Added test-code.

bruno added a subscriber: bruno.Mar 6 2017, 3:11 PM

Hi,

Thanks for working on this. Few questions:

  • What happens with the validation if +soft-float is used?
  • What about the 'e' mode, can you double check if the sparc backend support these instructions? If so it might be interesting to add it here.

Also, please attach patches with full context, it's easier to review.

On SparcV8 there is no %e register.

Regarding soft-float, good question, I'll try.

How do I create full-context-patches? Does this mean just more context lines? Like 500 or 1000 lines?

sdardis added a subscriber: sdardis.Mar 7 2017, 4:42 AM

How do I create full-context-patches? Does this mean just more context lines? Like 500 or 1000 lines?

http://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface

This revision was automatically updated to reflect the committed changes.