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[ARM] Enable Cortex-M23 and Cortex-M33 support.
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Authored by sanwou01 on Jan 24 2017, 1:19 AM.

Details

Summary

Add both cores to the target parser and TableGen. Tests that eabi
attributes are set correctly for both cores. Additionally, test the
absence and presence of MOVT in Cortex-M23 and Cortex-M33, respectively.

Diff Detail

Repository
rL LLVM

Event Timeline

sanwou01 created this revision.Jan 24 2017, 1:19 AM

Depends on https://reviews.llvm.org/D29020 for cortex-m23.ll to pass. FYI, I do not have commit access.

rengolin edited edge metadata.Jan 24 2017, 3:22 AM

This patch has too many issues in one:

  1. Adding new M cores to the target parser. The testing has to be done in the unit-test (as you've done). Check.
  1. Adding new M cores to TableGen. Testing needs to be done by adding the new core to existing tests and using the appropriate CHECK lines (not adding new ones).
  1. Adding a test to tail call, which should belong to D29020.
  1. Heavily modifying the SW/HWDIV test, even though the hardware description you added in TableGen has no mention of special DIV features that would separate it from the other M cores.

I suggest you:

A. Keep the Target Parser and the TableGen changes here, but instead of modifying existing tests, just add new RUN lines to them where other M cores are tested and reuse the existing CHECK lines.

B. Move the tail-call test to D29020.

cheers,
--renato

test/CodeGen/ARM/cortex-m23.ll
1 ↗(On Diff #85539)

This test is completely different to the patch, I'm not sure why you moved it here.

test/CodeGen/ARM/div.ll
2 ↗(On Diff #85539)

Too many check lines increase the risk of tests being ignored, especially when you just rename them below, instead of adding new ones.

This patch has too many issues in one:

  1. Adding new M cores to the target parser. The testing has to be done in the unit-test (as you've done). Check.
  1. Adding new M cores to TableGen. Testing needs to be done by adding the new core to existing tests and using the appropriate CHECK lines (not adding new ones).

I see, I'll get on that.

  1. Adding a test to tail call, which should belong to D29020.

Moved, sorry about that.

  1. Heavily modifying the SW/HWDIV test, even though the hardware description you added in TableGen has no mention of special DIV features that would separate it from the other M cores.

The cortex-m23 is sufficiently different from the other processors checked in this file that the extra CHECK lines were necessary. I can add a new file to test HWDIV on Thumb 1. I'll submit a separate patch for that.

I suggest you:

A. Keep the Target Parser and the TableGen changes here, but instead of modifying existing tests, just add new RUN lines to them where other M cores are tested and reuse the existing CHECK lines.

B. Move the tail-call test to D29020.

Thanks, will do.

  1. Heavily modifying the SW/HWDIV test, even though the hardware description you added in TableGen has no mention of special DIV features that would separate it from the other M cores.

The cortex-m23 is sufficiently different from the other processors checked in this file that the extra CHECK lines were necessary. I can add a new file to test HWDIV on Thumb 1. I'll submit a separate patch for that.

Right, extra checks are ok, changing the old check is risky. If there's too much bloat, you can split the test or just duplicate some of the CHECK lines.

The Thumb1 HWDIV test is probably best on its own.

cheers,
--renato

sanwou01 updated this revision to Diff 85814.Jan 25 2017, 3:01 PM
sanwou01 edited the summary of this revision. (Show Details)

Updated patch as per @rengolin's suggestions.

rengolin accepted this revision.Jan 26 2017, 12:58 PM

LGTM. Thanks!

This revision is now accepted and ready to land.Jan 26 2017, 12:58 PM
This revision was automatically updated to reflect the committed changes.