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[AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate operands
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Authored by SamWot on Dec 29 2016, 4:16 AM.

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SamWot updated this revision to Diff 82663.Dec 29 2016, 4:16 AM
SamWot retitled this revision from to [AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate operands.
SamWot updated this object.
vpykhtin accepted this revision.Dec 29 2016, 5:24 AM
vpykhtin edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Dec 29 2016, 5:24 AM
artem.tamazov edited edge metadata.Dec 30 2016, 8:40 AM

There are 8 real regressions in testGen tests -- sometimes negate modifier is used with integer constants, which is wrong.

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
311

What "isCSrc" is stand for? It is worth to make the name more self-explaining.

artem.tamazov added inline comments.Dec 30 2016, 8:41 AM
lib/Target/AMDGPU/SIInstrInfo.td
1038

whitespace in empty line

SamWot updated this revision to Diff 83803.Jan 10 2017, 6:17 AM
SamWot edited edge metadata.

Fixed issues

artem.tamazov accepted this revision.Jan 10 2017, 6:38 AM
artem.tamazov edited edge metadata.

There are 8 real regressions in testGen tests -- sometimes negate modifier is used with integer constants, which is wrong.

It is OK according to our talk today. Please go ahead.

This revision was automatically updated to reflect the committed changes.