ELF/AArch64: Fix dynamic relocation against local symbol in shared objects

[zatrazz]

Summary

ELF/AArch64: Fix dynamic relocation against local symbol in
shared objects

static thread int32_t x1;
static thread int64_t x2;

int32_t foo1 (int32_t x)
{

x1 += x;
return x;

}

int64_t foo2 (int64_t x)
{

x2 += x;
return x;

}

The dynamic relocation should be create as:

Relocations [

Section (N) .rela.dyn {
  <Address1> R_AARCH64_TLSDESC - 0x0
  <Address2> R_AARCH64_TLSDESC - 0x8
}

]

Where 0x0 addend in first dynamic relocation is the address of 'x1'
in TLS block and '0x8' is the address of 'x2'.

Checked against test-suite on aarch64-linux-gnu.

[zatrazz]

Ping.

[ruiu]

Looks like Rafael made a comment?

[zatrazz]

In D27711#624244, @ruiu wrote:

Looks like Rafael made a comment?

Did he? I am not seeing it on phabricator. Did he reply to the message directly?

[zatrazz]

Updated patch based on previous comments.

[ruiu]

LGTM

ELF/Relocations.cpp

static unsigned handleTlsRelocation(uint32_t Type, SymbolBody &Body,
   if (Config->EMachine == EM_MIPS)
     return handleNoRelaxTlsRelocation<ELFT>(In<ELFT>::MipsGot, Type, Body, C,
                                             Offset, Addend, Expr);
 
   if ((Expr == R_TLSDESC || Expr == R_TLSDESC_PAGE || Expr == R_TLSDESC_CALL) &&
       Config->Shared) {
     if (In<ELFT>::Got->addDynTlsEntry(Body)) {
       uintX_t Off = In<ELFT>::Got->getGlobalDynOffset(Body);
+      bool UseSymVA = Target->useSymVAForTls(Body);
       In<ELFT>::RelaDyn->addReloc(
-          {Target->TlsDescRel, In<ELFT>::Got, Off, false, &Body, 0});
+          {Target->TlsDescRel, In<ELFT>::Got, Off, UseSymVA, &Body, 0});
     }
     if (Expr != R_TLSDESC_CALL)
       C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
 
   if (Expr == R_TLSLD_PC || Expr == R_TLSLD) {
     // Local-Dynamic relocs can be relaxed to Local-Exec.

ELF/Target.h

public:
 
   // Returns true if a relocation only uses the low bits of a value such that
   // all those bits are in in the same page. For example, if the relocation
   // only uses the low 12 bits in a system with 4k pages. If this is true, the
   // bits will always have the same value at runtime and we don't have to emit
   // a dynamic relocation.
   virtual bool usesOnlyLowPageBits(uint32_t Type) const;
 
+  // Returns true if a dynamic relocation create from a TLS relocation should
+  // use the symbol VA.
+  virtual bool useSymVAForTls(const SymbolBody &S) const { return false; };
+
   // Decide whether a Thunk is needed for the relocation from File
   // targeting S. Returns one of:
   // Expr if there is no Thunk required
   // R_THUNK_ABS if thunk is required and expression is absolute
   // R_THUNK_PC if thunk is required and expression is pc rel
   // R_THUNK_PLT_PC if thunk is required to PLT entry and expression is pc rel
   virtual RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType,
                                const InputFile &File,

ELF/Target.cpp

public:
   RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   bool isPicRel(uint32_t Type) const override;
   bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool usesOnlyLowPageBits(uint32_t Type) const override;
+  bool useSymVAForTls(const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
                           RelExpr Expr) const override;
   void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
 };
 
bool AArch64TargetInfo::usesOnlyLowPageBits(uint32_t Type) const {
   }
 }
 
 bool AArch64TargetInfo::isTlsInitialExecRel(uint32_t Type) const {
   return Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
          Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
 }
 
+bool AArch64TargetInfo::useSymVAForTls(const SymbolBody &S) const {
+  // R_AARCH64_TLSDESC against a local symbol, the dynamic relocation
+  // should have the symbol VA as its addend.
+  return (Config->Shared && S.isLocal());
+}
+
 bool AArch64TargetInfo::isPicRel(uint32_t Type) const {
   return Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64;
 }
 
 void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
   write64le(Buf, In<ELF64LE>::Plt->getVA());
 }
 

test/ELF/aarch64-tlsdesc.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-linux %s -o %t.o
 // RUN: ld.lld -shared %t.o -o %t.so
 // RUN: llvm-objdump -d %t.so | FileCheck %s
 // RUN: llvm-readobj -r %t.so | FileCheck --check-prefix=REL %s
 
+  .text
         adrp    x0, :tlsdesc:a
         ldr     x1, [x0, :tlsdesc_lo12:a]
         add     x0, x0, :tlsdesc_lo12:a
         .tlsdesccall a
         blr     x1
 
+// Create relocation against local TLS symbols where linker should
+// create target specific dynamic TLSDESC relocation where addend is
+// the symbol VMA in tls block.
+
 // CHECK:      10000: {{.*}}  adrp    x0, #65536
 // CHECK-NEXT: 10004: {{.*}}  ldr     x1, [x0, #144]
 // CHECK-NEXT: 10008: {{.*}}  add     x0, x0, #144
 // CHECK-NEXT: 1000c: {{.*}}  blr     x1
 
+  adrp  x0, :tlsdesc:local1
+  ldr  x1, [x0, :tlsdesc_lo12:local1]
+  add x0, x0, :tlsdesc_lo12:local1
+        .tlsdesccall a
+        blr     x1
+
+// CHECK:      10010: {{.*}}  adrp    x0, #65536
+// CHECK-NEXT: 10014: {{.*}}  ldr     x1, [x0, #160]
+// CHECK-NEXT: 10018: {{.*}}  add     x0, x0, #160
+// CHECK-NEXT: 1001c: {{.*}}  blr     x1
+
+  adrp  x0, :tlsdesc:local2
+  ldr  x1, [x0, :tlsdesc_lo12:local2]
+  add x0, x0, :tlsdesc_lo12:local2
+        .tlsdesccall a
+        blr     x1
+
+// CHECK:      10020: {{.*}}  adrp    x0, #65536
+// CHECK-NEXT: 10024: {{.*}}  ldr     x1, [x0, #176]
+// CHECK-NEXT: 10028: {{.*}}  add     x0, x0, #176
+// CHECK-NEXT: 1002c: {{.*}}  blr     x1
+
+        .section .tbss,"awT",@nobits
+        .type   local1,@object
+        .p2align 2
+local1:
+        .word   0
+        .size   local1, 4
+
+        .type   local2,@object
+        .p2align 3
+local2:
+        .xword  0
+        .size   local2, 8
+
+
+// 0x1000 + 4096 + 160 = 0x20A0
+// 0x1000 + 4096 + 176 = 0x20B0
 // 0x1000 + 4096 + 144 = 0x2090
 
+// R_AARCH64_TLSDESC - 0x0 -> start of tls block
+// R_AARCH64_TLSDESC - 0x8 -> align (sizeof (local1), 8)
+
 // REL:      Relocations [
 // REL-NEXT:   Section (4) .rela.dyn {
+// REL-NEXT:     0x200A0 R_AARCH64_TLSDESC - 0x0
+// REL-NEXT:     0x200B0 R_AARCH64_TLSDESC - 0x8
 // REL-NEXT:     0x20090 R_AARCH64_TLSDESC a 0x0
 // REL-NEXT:   }
 // REL-NEXT: ]