This is an archive of the discontinued LLVM Phabricator instance.

Differential D25367

[AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
ClosedPublic

Authored by artem.tamazov on Oct 7 2016, 6:36 AM.

Details

Reviewers
• tstellarAMD
vpykhtin
SamWot
Commits
rG73f1ab28cd2e: [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
rL283567: [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
Summary

Partially fixes Bug 28232.
Lit tests added.

Diff Detail

Repository
rL LLVM

Event Timeline

artem.tamazov updated this revision to Diff 73925.Oct 7 2016, 6:36 AM
artem.tamazov retitled this revision from to [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3..
artem.tamazov updated this object.
artem.tamazov added a reviewer: vporpo.
artem.tamazov set the repository for this revision to rL LLVM.
artem.tamazov added a subscriber: Restricted Project.
Herald added a reviewer: • tstellarAMD. · View Herald TranscriptOct 7 2016, 6:36 AM
Herald added subscribers: tony-tye, yaxunl, nhaehnle and 3 others. · View Herald Transcript
artem.tamazov edited reviewers, added: vpykhtin; removed: vporpo.Oct 7 2016, 6:37 AM
SamWot accepted this revision.Oct 7 2016, 6:40 AM
SamWot added a reviewer: SamWot.
This revision is now accepted and ready to land.Oct 7 2016, 6:40 AM
vpykhtin accepted this revision.Oct 7 2016, 6:41 AM
vpykhtin edited edge metadata.

LGTM.

Closed by commit rL283567: [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3. (authored by artem.tamazov). · Explain WhyOct 7 2016, 10:46 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
AMDGPU/
10 lines
test/
MC/
AMDGPU/
8 lines
Disassembler/
AMDGPU/
6 lines

Diff 73950

llvm/trunk/lib/Target/AMDGPU/BUFInstructions.td

Show First 20 Lines • Show All 544 Lines • ▼ Show 20 Linesdefm BUFFER_LOAD_SSHORT : MUBUF_Pseudo_Loads <
"buffer_load_sshort", VGPR_32, i32, mubuf_sextloadi16 "buffer_load_sshort", VGPR_32, i32, mubuf_sextloadi16
>; >;
defm BUFFER_LOAD_DWORD : MUBUF_Pseudo_Loads < defm BUFFER_LOAD_DWORD : MUBUF_Pseudo_Loads <
"buffer_load_dword", VGPR_32, i32, mubuf_load "buffer_load_dword", VGPR_32, i32, mubuf_load
>; >;
defm BUFFER_LOAD_DWORDX2 : MUBUF_Pseudo_Loads < defm BUFFER_LOAD_DWORDX2 : MUBUF_Pseudo_Loads <
"buffer_load_dwordx2", VReg_64, v2i32, mubuf_load "buffer_load_dwordx2", VReg_64, v2i32, mubuf_load
>; >;
defm BUFFER_LOAD_DWORDX3 : MUBUF_Pseudo_Loads <
"buffer_load_dwordx3", VReg_96, untyped, mubuf_load
>;
defm BUFFER_LOAD_DWORDX4 : MUBUF_Pseudo_Loads < defm BUFFER_LOAD_DWORDX4 : MUBUF_Pseudo_Loads <
"buffer_load_dwordx4", VReg_128, v4i32, mubuf_load "buffer_load_dwordx4", VReg_128, v4i32, mubuf_load
>; >;
defm BUFFER_STORE_BYTE : MUBUF_Pseudo_Stores < defm BUFFER_STORE_BYTE : MUBUF_Pseudo_Stores <
"buffer_store_byte", VGPR_32, i32, truncstorei8_global "buffer_store_byte", VGPR_32, i32, truncstorei8_global
>; >;
defm BUFFER_STORE_SHORT : MUBUF_Pseudo_Stores < defm BUFFER_STORE_SHORT : MUBUF_Pseudo_Stores <
"buffer_store_short", VGPR_32, i32, truncstorei16_global "buffer_store_short", VGPR_32, i32, truncstorei16_global
>; >;
defm BUFFER_STORE_DWORD : MUBUF_Pseudo_Stores < defm BUFFER_STORE_DWORD : MUBUF_Pseudo_Stores <
"buffer_store_dword", VGPR_32, i32, global_store "buffer_store_dword", VGPR_32, i32, global_store
>; >;
defm BUFFER_STORE_DWORDX2 : MUBUF_Pseudo_Stores < defm BUFFER_STORE_DWORDX2 : MUBUF_Pseudo_Stores <
"buffer_store_dwordx2", VReg_64, v2i32, global_store "buffer_store_dwordx2", VReg_64, v2i32, global_store
>; >;
defm BUFFER_STORE_DWORDX3 : MUBUF_Pseudo_Stores <
"buffer_store_dwordx3", VReg_96, untyped, global_store
>;
defm BUFFER_STORE_DWORDX4 : MUBUF_Pseudo_Stores < defm BUFFER_STORE_DWORDX4 : MUBUF_Pseudo_Stores <
"buffer_store_dwordx4", VReg_128, v4i32, global_store "buffer_store_dwordx4", VReg_128, v4i32, global_store
>; >;
defm BUFFER_ATOMIC_SWAP : MUBUF_Pseudo_Atomics < defm BUFFER_ATOMIC_SWAP : MUBUF_Pseudo_Atomics <
"buffer_atomic_swap", VGPR_32, i32, atomic_swap_global "buffer_atomic_swap", VGPR_32, i32, atomic_swap_global
>; >;
defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Pseudo_Atomics < defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Pseudo_Atomics <
"buffer_atomic_cmpswap", VReg_64, v2i32, null_frag "buffer_atomic_cmpswap", VReg_64, v2i32, null_frag
▲ Show 20 Lines • Show All 537 Lines • ▼ Show 20 Lines
defm BUFFER_STORE_FORMAT_XYZW : MUBUF_Real_AllAddr_si <0x07>; defm BUFFER_STORE_FORMAT_XYZW : MUBUF_Real_AllAddr_si <0x07>;
defm BUFFER_LOAD_UBYTE : MUBUF_Real_AllAddr_si <0x08>; defm BUFFER_LOAD_UBYTE : MUBUF_Real_AllAddr_si <0x08>;
defm BUFFER_LOAD_SBYTE : MUBUF_Real_AllAddr_si <0x09>; defm BUFFER_LOAD_SBYTE : MUBUF_Real_AllAddr_si <0x09>;
defm BUFFER_LOAD_USHORT : MUBUF_Real_AllAddr_si <0x0a>; defm BUFFER_LOAD_USHORT : MUBUF_Real_AllAddr_si <0x0a>;
defm BUFFER_LOAD_SSHORT : MUBUF_Real_AllAddr_si <0x0b>; defm BUFFER_LOAD_SSHORT : MUBUF_Real_AllAddr_si <0x0b>;
defm BUFFER_LOAD_DWORD : MUBUF_Real_AllAddr_si <0x0c>; defm BUFFER_LOAD_DWORD : MUBUF_Real_AllAddr_si <0x0c>;
defm BUFFER_LOAD_DWORDX2 : MUBUF_Real_AllAddr_si <0x0d>; defm BUFFER_LOAD_DWORDX2 : MUBUF_Real_AllAddr_si <0x0d>;
defm BUFFER_LOAD_DWORDX4 : MUBUF_Real_AllAddr_si <0x0e>; defm BUFFER_LOAD_DWORDX4 : MUBUF_Real_AllAddr_si <0x0e>;
defm BUFFER_LOAD_DWORDX3 : MUBUF_Real_AllAddr_si <0x0f>;
defm BUFFER_STORE_BYTE : MUBUF_Real_AllAddr_si <0x18>; defm BUFFER_STORE_BYTE : MUBUF_Real_AllAddr_si <0x18>;
defm BUFFER_STORE_SHORT : MUBUF_Real_AllAddr_si <0x1a>; defm BUFFER_STORE_SHORT : MUBUF_Real_AllAddr_si <0x1a>;
defm BUFFER_STORE_DWORD : MUBUF_Real_AllAddr_si <0x1c>; defm BUFFER_STORE_DWORD : MUBUF_Real_AllAddr_si <0x1c>;
defm BUFFER_STORE_DWORDX2 : MUBUF_Real_AllAddr_si <0x1d>; defm BUFFER_STORE_DWORDX2 : MUBUF_Real_AllAddr_si <0x1d>;
defm BUFFER_STORE_DWORDX4 : MUBUF_Real_AllAddr_si <0x1e>; defm BUFFER_STORE_DWORDX4 : MUBUF_Real_AllAddr_si <0x1e>;
defm BUFFER_STORE_DWORDX3 : MUBUF_Real_AllAddr_si <0x1f>;
defm BUFFER_ATOMIC_SWAP : MUBUF_Real_Atomic_si <0x30>; defm BUFFER_ATOMIC_SWAP : MUBUF_Real_Atomic_si <0x30>;
defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Real_Atomic_si <0x31>; defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Real_Atomic_si <0x31>;
defm BUFFER_ATOMIC_ADD : MUBUF_Real_Atomic_si <0x32>; defm BUFFER_ATOMIC_ADD : MUBUF_Real_Atomic_si <0x32>;
defm BUFFER_ATOMIC_SUB : MUBUF_Real_Atomic_si <0x33>; defm BUFFER_ATOMIC_SUB : MUBUF_Real_Atomic_si <0x33>;
//defm BUFFER_ATOMIC_RSUB : MUBUF_Real_Atomic_si <0x34>; // isn't on CI & VI //defm BUFFER_ATOMIC_RSUB : MUBUF_Real_Atomic_si <0x34>; // isn't on CI & VI
defm BUFFER_ATOMIC_SMIN : MUBUF_Real_Atomic_si <0x35>; defm BUFFER_ATOMIC_SMIN : MUBUF_Real_Atomic_si <0x35>;
defm BUFFER_ATOMIC_UMIN : MUBUF_Real_Atomic_si <0x36>; defm BUFFER_ATOMIC_UMIN : MUBUF_Real_Atomic_si <0x36>;
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
defm BUFFER_STORE_FORMAT_XYZ : MUBUF_Real_AllAddr_vi <0x06>; defm BUFFER_STORE_FORMAT_XYZ : MUBUF_Real_AllAddr_vi <0x06>;
defm BUFFER_STORE_FORMAT_XYZW : MUBUF_Real_AllAddr_vi <0x07>; defm BUFFER_STORE_FORMAT_XYZW : MUBUF_Real_AllAddr_vi <0x07>;
defm BUFFER_LOAD_UBYTE : MUBUF_Real_AllAddr_vi <0x10>; defm BUFFER_LOAD_UBYTE : MUBUF_Real_AllAddr_vi <0x10>;
defm BUFFER_LOAD_SBYTE : MUBUF_Real_AllAddr_vi <0x11>; defm BUFFER_LOAD_SBYTE : MUBUF_Real_AllAddr_vi <0x11>;
defm BUFFER_LOAD_USHORT : MUBUF_Real_AllAddr_vi <0x12>; defm BUFFER_LOAD_USHORT : MUBUF_Real_AllAddr_vi <0x12>;
defm BUFFER_LOAD_SSHORT : MUBUF_Real_AllAddr_vi <0x13>; defm BUFFER_LOAD_SSHORT : MUBUF_Real_AllAddr_vi <0x13>;
defm BUFFER_LOAD_DWORD : MUBUF_Real_AllAddr_vi <0x14>; defm BUFFER_LOAD_DWORD : MUBUF_Real_AllAddr_vi <0x14>;
defm BUFFER_LOAD_DWORDX2 : MUBUF_Real_AllAddr_vi <0x15>; defm BUFFER_LOAD_DWORDX2 : MUBUF_Real_AllAddr_vi <0x15>;
defm BUFFER_LOAD_DWORDX3 : MUBUF_Real_AllAddr_vi <0x16>;
defm BUFFER_LOAD_DWORDX4 : MUBUF_Real_AllAddr_vi <0x17>; defm BUFFER_LOAD_DWORDX4 : MUBUF_Real_AllAddr_vi <0x17>;
defm BUFFER_STORE_BYTE : MUBUF_Real_AllAddr_vi <0x18>; defm BUFFER_STORE_BYTE : MUBUF_Real_AllAddr_vi <0x18>;
defm BUFFER_STORE_SHORT : MUBUF_Real_AllAddr_vi <0x1a>; defm BUFFER_STORE_SHORT : MUBUF_Real_AllAddr_vi <0x1a>;
defm BUFFER_STORE_DWORD : MUBUF_Real_AllAddr_vi <0x1c>; defm BUFFER_STORE_DWORD : MUBUF_Real_AllAddr_vi <0x1c>;
defm BUFFER_STORE_DWORDX2 : MUBUF_Real_AllAddr_vi <0x1d>; defm BUFFER_STORE_DWORDX2 : MUBUF_Real_AllAddr_vi <0x1d>;
defm BUFFER_STORE_DWORDX3 : MUBUF_Real_AllAddr_vi <0x1e>;
defm BUFFER_STORE_DWORDX4 : MUBUF_Real_AllAddr_vi <0x1f>; defm BUFFER_STORE_DWORDX4 : MUBUF_Real_AllAddr_vi <0x1f>;
defm BUFFER_ATOMIC_SWAP : MUBUF_Real_Atomic_vi <0x40>; defm BUFFER_ATOMIC_SWAP : MUBUF_Real_Atomic_vi <0x40>;
defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Real_Atomic_vi <0x41>; defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Real_Atomic_vi <0x41>;
defm BUFFER_ATOMIC_ADD : MUBUF_Real_Atomic_vi <0x42>; defm BUFFER_ATOMIC_ADD : MUBUF_Real_Atomic_vi <0x42>;
defm BUFFER_ATOMIC_SUB : MUBUF_Real_Atomic_vi <0x43>; defm BUFFER_ATOMIC_SUB : MUBUF_Real_Atomic_vi <0x43>;
defm BUFFER_ATOMIC_SMIN : MUBUF_Real_Atomic_vi <0x44>; defm BUFFER_ATOMIC_SMIN : MUBUF_Real_Atomic_vi <0x44>;
defm BUFFER_ATOMIC_UMIN : MUBUF_Real_Atomic_vi <0x45>; defm BUFFER_ATOMIC_UMIN : MUBUF_Real_Atomic_vi <0x45>;
Show All 40 Lines

llvm/trunk/test/MC/AMDGPU/mubuf.s

Show First 20 Lines • Show All 440 Lines • ▼ Show 20 Lines
buffer_load_dword v1, off, ttmp[4:7], ttmp1 buffer_load_dword v1, off, ttmp[4:7], ttmp1
// SICI: buffer_load_dword v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x30,0xe0,0x00,0x01,0x1d,0x71] // SICI: buffer_load_dword v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x30,0xe0,0x00,0x01,0x1d,0x71]
// VI: buffer_load_dword v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x1d,0x71] // VI: buffer_load_dword v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x1d,0x71]
buffer_load_dwordx2 v[1:2], off, s[4:7], s1 buffer_load_dwordx2 v[1:2], off, s[4:7], s1
// SICI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x34,0xe0,0x00,0x01,0x01,0x01] // SICI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x34,0xe0,0x00,0x01,0x01,0x01]
// VI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x54,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x54,0xe0,0x00,0x01,0x01,0x01]
buffer_load_dwordx3 v[0:2], off, s[4:7], s0 offset:4095
// SICI: buffer_load_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 ; encoding: [0xff,0x0f,0x3c,0xe0,0x00,0x00,0x01,0x00]
// VI: buffer_load_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 ; encoding: [0xff,0x0f,0x58,0xe0,0x00,0x00,0x01,0x00]
buffer_load_dwordx4 v[1:4], off, s[4:7], s1 buffer_load_dwordx4 v[1:4], off, s[4:7], s1
// SICI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x38,0xe0,0x00,0x01,0x01,0x01] // SICI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x38,0xe0,0x00,0x01,0x01,0x01]
// VI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x01,0x01]
buffer_load_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 buffer_load_dwordx4 v[1:4], off, ttmp[4:7], ttmp1
// SICI: buffer_load_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x38,0xe0,0x00,0x01,0x1d,0x71] // SICI: buffer_load_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x38,0xe0,0x00,0x01,0x1d,0x71]
// VI: buffer_load_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x1d,0x71] // VI: buffer_load_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x1d,0x71]
Show All 12 Lines
buffer_store_dword v1, off, s[4:7], s1 buffer_store_dword v1, off, s[4:7], s1
// SICI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01] // SICI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01]
// VI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01]
buffer_store_dwordx2 v[1:2], off, s[4:7], s1 buffer_store_dwordx2 v[1:2], off, s[4:7], s1
// SICI: buffer_store_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x74,0xe0,0x00,0x01,0x01,0x01] // SICI: buffer_store_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x74,0xe0,0x00,0x01,0x01,0x01]
// VI: buffer_store_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x74,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_store_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x74,0xe0,0x00,0x01,0x01,0x01]
buffer_store_dwordx3 v[0:2], off, s[4:7], s0 offset:4095
// SICI: buffer_store_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 ; encoding: [0xff,0x0f,0x7c,0xe0,0x00,0x00,0x01,0x00]
// VI: buffer_store_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 ; encoding: [0xff,0x0f,0x78,0xe0,0x00,0x00,0x01,0x00]
buffer_store_dwordx4 v[1:4], off, s[4:7], s1 buffer_store_dwordx4 v[1:4], off, s[4:7], s1
// SICI: buffer_store_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x78,0xe0,0x00,0x01,0x01,0x01] // SICI: buffer_store_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x78,0xe0,0x00,0x01,0x01,0x01]
// VI: buffer_store_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_store_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x01,0x01]
buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1
// SICI: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x78,0xe0,0x00,0x01,0x1d,0x71] // SICI: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x78,0xe0,0x00,0x01,0x1d,0x71]
// VI: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x1d,0x71] // VI: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x1d,0x71]
▲ Show 20 Lines • Show All 220 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/AMDGPU/mubuf_vi.txt

Show First 20 Lines • Show All 204 Lines • ▼ Show 20 Lines
0x00 0x00 0x4c 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x4c 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_load_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_load_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x50 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x50 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x54,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x54,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x54 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x54 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_load_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 ; encoding: [0xff,0x0f,0x58,0xe0,0x00,0x00,0x01,0x00]
0xff,0x0f,0x58,0xe0,0x00,0x00,0x01,0x00
# VI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x5c 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x5c 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_store_byte v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x60,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_store_byte v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x60,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x60 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x60 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_store_short v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x68,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_store_short v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x68,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x68 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x68 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x70 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x70 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_store_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x74,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_store_dwordx2 v[1:2], off, s[4:7], s1 ; encoding: [0x00,0x00,0x74,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x74 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x74 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_store_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 ; encoding: [0xff,0x0f,0x78,0xe0,0x00,0x00,0x01,0x00]
0xff,0x0f,0x78,0xe0,0x00,0x00,0x01,0x00
# VI: buffer_store_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x01,0x01] # VI: buffer_store_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x01,0x01]
0x00 0x00 0x7c 0xe0 0x00 0x01 0x01 0x01 0x00 0x00 0x7c 0xe0 0x00 0x01 0x01 0x01
# VI: buffer_wbinvl1 ; encoding: [0x00,0x00,0xf8,0xe0,0x00,0x00,0x00,0x00] # VI: buffer_wbinvl1 ; encoding: [0x00,0x00,0xf8,0xe0,0x00,0x00,0x00,0x00]
0x00 0x00 0xf8 0xe0 0x00 0x00 0x00 0x00 0x00 0x00 0xf8 0xe0 0x00 0x00 0x00 0x00
# VI: buffer_wbinvl1_vol ; encoding: [0x00,0x00,0xfc,0xe0,0x00,0x00,0x00,0x00] # VI: buffer_wbinvl1_vol ; encoding: [0x00,0x00,0xfc,0xe0,0x00,0x00,0x00,0x00]
0x00 0x00 0xfc 0xe0 0x00 0x00 0x00 0x00 0x00 0x00 0xfc 0xe0 0x00 0x00 0x00 0x00
▲ Show 20 Lines • Show All 120 Lines • Show Last 20 Lines