[ARM][LLD] Add support for .ARM.exidx sections

[peter.smith]

Summary

This is a rewrite of the abandoned revision https://reviews.llvm.org/D24032 Add support for SHF_LINK_ORDER flag to ARM Target.

Instead of introducing SHF_LINK_ORDER as a general feature we just implement support for .ARM.exidx sections. This is done by creating a subclass of InputSectionBase and OutputSectionBase to handle the special case code.

I've taken the opportunity to add support for the PT_ARM_EXIDX program header as it is much simpler with this design. The PT_ARM_EXIDX program header is similar to the PT_GNU_EH_FRAME. This can easily be added as a separate patch, but it would mean updating the offsets in the test.

With .ARM.exidx support implemented all that should be needed for ARM exceptions support is to add support for the R_ARM_TARGET2 relocation, which should be straightforward.

References:
ARM exception handling ABI http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038b/IHI0038B_ehabi.pdf
ELF for the ARM Architecture http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044f/IHI0044F_aaelf.pdf

Limitations that can be addressed in the future:

• Garbage collection can be optimized with a similar special case to the .eh_frame section. A .ARM.exidx section should be live only when the executable section it links to is live.
• Linker scripts assume that all InputSections assigned to an OutputSection are the same class. A contrived linker script such as

SECTIONS {

.text : { *(.text) *(.eh_frame*) }

}
Will give an internal fault rather than an error. This also affects .ARM.exidx sections mixed with regular OutputSections

• Table compression is not implemented. The EHABI permits adjacent table entries to be folded if they have the same unwinding instructions. Compressing the table will alter the size of the OutputSection which can't be done safely in writeTo().

[ruiu]

What I was trying to suggest is to completely ignore LINK_ORDER and instead sort section contents directly. In order to describe my idea, I created a change: https://reviews.llvm.org/D24277. It does not compile because it is for the sake of discussion. I'm not an ARM expert so it is likely that I'm missing something. Do you think this approach could work?

[peter.smith]

I think the approach in https://reviews.llvm.org/D24277 will work for executables, but it won't be sufficient to produce relocatable object files with SHF_LINK_ORDER dependencies.

I'll state what I think a linker has to do to support exceptions:

Garbage collection:
There are no relocations to any .ARM.exidx section so at a minimum they must be marked live.

Output Sections:
For a full link there must be one .ARM.exidx OutputSection containing all input .ARM.exidx sections with table entries in the same order as the functions described by the table entries.

For a relocatable link (ABI compliant) the output object must have an .ARM.exidx OutputSection for each executable OutputSection that has exeception tables. The .ARM.exidx OutputSection has SHF_LINK_ORDER and a sh_link field to the OutputSection. The table entries must be in the same order as the functions in the executable OutputSection

For a relocatable link (Consumable by lld only if it sorts the individual table entries) the output object must preserve the .ARM.exidx OutputSection name.

Program Headers
In an executable and shared object, the linker generates a PT_ARM_EXIDX program header that has the same address and size as the .ARM.exidx section.

The part that requires most of the code for SHF_LINK_ORDER is the ABI compliant relocatable object. If this is implemented then executables/shared objects drop out for free.

I could do another rewrite with a sorting of each individual entry rather than section. The actual table entry is not set up to do this easily although it is possible (see comment in https://reviews.llvm.org/D24277). With the small parts for garbage collection and PT_ARM_EXIDX that would give executable support, and relocatable support for lld, however the relocatable objects wouldn't be consumable by other linkers.

Personally I'd like maintain ABI compatibility so that relocatable output can be consumed by other linkers such as ld and gold. In theory it should be possible to use a similar approach to https://reviews.llvm.org/D24277 and set the sh_link field. I'm not sure it will be much simpler than what I have now or in the previous review though.

I'll be out of the office till next Monday, I'll pick up any comments when I'm back.

[peter.smith]

Abandoning this revision. I'll use a new review for the revised version.

ELF/InputFiles.cpp

case SHT_REL: {
       if (auto *S = dyn_cast<EhInputSection<ELFT>>(Target)) {
         if (S->RelocSection)
           fatal(
               getFilename(this) +
               ": multiple relocation sections to .eh_frame are not supported");
         S->RelocSection = &Sec;
         break;
       }
+      if (auto *S = dyn_cast<ARMExidxInputSection<ELFT>>(Target)) {
+        S->RelocSections.push_back(&Sec);
+        break;
+      }
       fatal(getFilename(this) +
             ": relocations pointing to SHF_MERGE are not supported");
     }
     case SHT_ARM_ATTRIBUTES:
       // FIXME: ARM meta-data section. At present attributes are ignored,
       // they can be used to reason about object compatibility.
       Sections[I] = &InputSection<ELFT>::Discarded;
       break;
     case SHT_MIPS_REGINFO:
       MipsReginfo.reset(new MipsReginfoInputSection<ELFT>(this, &Sec));
       Sections[I] = MipsReginfo.get();
       break;
     case SHT_MIPS_OPTIONS:
       MipsOptions.reset(new MipsOptionsInputSection<ELFT>(this, &Sec));
       Sections[I] = MipsOptions.get();
       break;
     case SHT_MIPS_ABIFLAGS:
       MipsAbiFlags.reset(new MipsAbiFlagsInputSection<ELFT>(this, &Sec));
       Sections[I] = MipsAbiFlags.get();
       break;
+    case SHT_ARM_EXIDX:
+      if (Config->EMachine == EM_ARM) {
+        // SHT_ARM_EXIDX is shared with SHT_X86_64_UNWIND
+        // which is handled by the default case
+        Sections[I] =
+            new (IAlloc.Allocate()) ARMExidxInputSection<ELFT>(this, &Sec);
+        break;
+      }
+    // fallthrough
     default:
       Sections[I] = createInputSection(Sec);
     }
   }
 }
 
 template <class ELFT>
 InputSectionBase<ELFT> *

ELF/InputSection.h

 // We need non-template input section class to store symbol layout
 // in linker script parser structures, where we do not have ELFT
 // template parameter. For each scripted output section symbol we
 // store pointer to preceding InputSectionData object or nullptr,
 // if symbol should be placed at the very beginning of the output
 // section
 class InputSectionData {
 public:
-  enum Kind { Regular, EHFrame, Merge, MipsReginfo, MipsOptions, MipsAbiFlags };
+  enum Kind {
+    Regular, EHFrame, Merge, MipsReginfo, MipsOptions, MipsAbiFlags, ARMExidx
+  };
 
   // The garbage collector sets sections' Live bits.
   // If GC is disabled, all sections are considered live by default.
   InputSectionData(Kind SectionKind, bool Compressed, bool Live)
       : SectionKind(SectionKind), Live(Live), Compressed(Compressed) {}
 
   Kind SectionKind;
   uint32_t Alignment;

 
 public:
   MipsAbiFlagsInputSection(ObjectFile<ELFT> *F, const Elf_Shdr *Hdr);
   static bool classof(const InputSectionBase<ELFT> *S);
 
   const llvm::object::Elf_Mips_ABIFlags<ELFT> *Flags = nullptr;
 };
 
+template <class ELFT>
+class ARMExidxInputSection : public InputSectionBase<ELFT> {
+  typedef typename ELFT::Shdr Elf_Shdr;
+
+public:
+  // The offset from beginning of the output sections this section was assigned
+  // to. The writer sets a value.
+  uint64_t OutSecOff = 0;
+
+  ARMExidxInputSection(ObjectFile<ELFT> *F, const Elf_Shdr *Hdr);
+  static bool classof(const InputSectionBase<ELFT> *S);
+  // Relocation sections that refer to this one.
+  llvm::TinyPtrVector<const Elf_Shdr *> RelocSections;
+
+  // .ARM.exidx sections have a SHF_LINK_ORDER dependency with respect
+  // to an InputSection containing executable code
+  InputSection<ELFT> *getLinkedToSection() const;
+
+  // In a final link this is .ARM.exidx . In a relocatable link the name of the
+  // section is derived from the linked-to section.
+  StringRef getOutputSectionName() const;
+
+  // Write this section to a mmap'ed file, assuming Buf is pointing to
+  // beginning of the output section.
+  void writeTo(uint8_t *Buf);
+};
+
 // Common symbols don't belong to any section. But it is easier for us
 // to handle them as if they belong to some input section. So we defined
 // this class. CommonInputSection is a virtual singleton class that
 // "contains" all common symbols.
 template <class ELFT> class CommonInputSection : public InputSection<ELFT> {
   typedef typename ELFT::uint uintX_t;
 
 public:

ELF/InputSection.cpp

case MipsAbiFlags:
     // MIPS .reginfo, .MIPS.options, and .MIPS.abiflags sections are consumed
     // by the linker, and the linker produces a single output section. It is
     // possible that input files contain section symbol points to the
     // corresponding input section. Redirect it to the produced output section.
     if (Offset != 0)
       fatal(getName(this) + ": unsupported reference to the middle of '" +
             getSectionName() + "' section");
     return this->OutSec->getVA();
+  case ARMExidx:
+    return cast<ARMExidxInputSection<ELFT>>(this)->OutSecOff + Offset;
   }
   llvm_unreachable("invalid section kind");
 }
 
 template <class ELFT> void InputSectionBase<ELFT>::uncompress() {
   if (!zlib::isAvailable())
     fatal(getName(this) +
           ": build lld with zlib to enable compressed sections support");

 }
 
 template <class ELFT>
 bool MipsAbiFlagsInputSection<ELFT>::classof(const InputSectionBase<ELFT> *S) {
   return S->SectionKind == InputSectionBase<ELFT>::MipsAbiFlags;
 }
 
 template <class ELFT>
+ARMExidxInputSection<ELFT>::ARMExidxInputSection(ObjectFile<ELFT> *F,
+                                                 const Elf_Shdr *Hdr)
+    : InputSectionBase<ELFT>(F, Hdr, InputSectionBase<ELFT>::ARMExidx) {
+  // Mark .ARM.exidx sections as live by default because there are
+  // usually no relocations that point to .ARM.exidx sections. Otherwise,
+  // the garbage collector would drop all .ARM.exidx sections.
+  this->Live = true;
+  // .ARM.exidx sections must have a SHF_LINK_ORDER dependency with respect
+  // to an executable Section
+  if (!(Hdr->sh_flags & SHF_LINK_ORDER) || Hdr->sh_link == 0)
+    fatal(getName(this) + ": unsupported link order reference");
+}
+
+template <class ELFT>
+bool ARMExidxInputSection<ELFT>::classof(const InputSectionBase<ELFT> *S) {
+  return S->SectionKind == InputSectionBase<ELFT>::ARMExidx;
+}
+
+template <class ELFT>
+InputSection<ELFT> *ARMExidxInputSection<ELFT>::getLinkedToSection() const {
+  ArrayRef<InputSectionBase<ELFT> *> Sections = this->File->getSections();
+  InputSectionBase<ELFT> *LT = Sections[this->Header->sh_link];
+  auto *LinkedTo = dyn_cast<InputSection<ELFT>>(LT);
+  if (LinkedTo == &InputSection<ELFT>::Discarded)
+    return nullptr;
+  if (!LinkedTo)
+    fatal(getName(this) + ": unsupported link order reference");
+  return LinkedTo;
+}
+
+template <class ELFT>
+StringRef ARMExidxInputSection<ELFT>::getOutputSectionName() const {
+  if (Config->Relocatable) {
+    // In a relocatable link we consolidate .text.* sections into a single
+    // .text section. We consolidate all .ARM.exidx.* sections into a single
+    // ARMExidxOutputSection with a sh_link to the .text OutputSection
+    // For all other Section Names we preserve the .ARM.exidx.<InputSection>
+    // name.
+    InputSectionBase<ELFT> *LT = getLinkedToSection();
+    StringRef LinkToName = LT->getSectionName();
+    if (!LinkToName.startswith(".text"))
+      return this->getSectionName();
+  }
+  return ".ARM.exidx";
+}
+
+template <class ELFT> void ARMExidxInputSection<ELFT>::writeTo(uint8_t *Buf) {
+  // Copy section contents from source object file to output file.
+  ArrayRef<uint8_t> Data = this->getSectionData();
+  memcpy(Buf + OutSecOff, Data.data(), Data.size());
+
+  // Iterate over all relocation sections that apply to this section.
+  uint8_t *BufEnd = Buf + OutSecOff + Data.size();
+  this->relocate(Buf, BufEnd);
+}
+
+template <class ELFT>
 CommonInputSection<ELFT>::CommonInputSection(std::vector<DefinedCommon *> Syms)
     : InputSection<ELFT>(nullptr, &Hdr) {
   Hdr.sh_size = 0;
   Hdr.sh_type = SHT_NOBITS;
   Hdr.sh_flags = SHF_ALLOC | SHF_WRITE;
   this->Live = true;
 
   // Sort the common symbols by alignment as an heuristic to pack them better.

 template class elf::MipsOptionsInputSection<ELF64LE>;
 template class elf::MipsOptionsInputSection<ELF64BE>;
 
 template class elf::MipsAbiFlagsInputSection<ELF32LE>;
 template class elf::MipsAbiFlagsInputSection<ELF32BE>;
 template class elf::MipsAbiFlagsInputSection<ELF64LE>;
 template class elf::MipsAbiFlagsInputSection<ELF64BE>;
 
+template class elf::ARMExidxInputSection<ELF32LE>;
+template class elf::ARMExidxInputSection<ELF32BE>;
+template class elf::ARMExidxInputSection<ELF64LE>;
+template class elf::ARMExidxInputSection<ELF64BE>;
+
 template class elf::CommonInputSection<ELF32LE>;
 template class elf::CommonInputSection<ELF32BE>;
 template class elf::CommonInputSection<ELF64LE>;
 template class elf::CommonInputSection<ELF64BE>;

ELF/OutputSections.h

 template <class ELFT> class SymbolTable;
 template <class ELFT> class SymbolTableSection;
 template <class ELFT> class StringTableSection;
 template <class ELFT> class EhInputSection;
 template <class ELFT> class InputSection;
 template <class ELFT> class InputSectionBase;
 template <class ELFT> class MergeInputSection;
 template <class ELFT> class MipsReginfoInputSection;
+template <class ELFT> class ARMExidxInputSection;
 template <class ELFT> class OutputSection;
 template <class ELFT> class ObjectFile;
 template <class ELFT> class SharedFile;
 template <class ELFT> class SharedSymbol;
 template <class ELFT> class DefinedRegular;
 
 // This represents a section in an output file.
 // Different sub classes represent different types of sections. Some contain
enum Kind {
     Got,
     GotPlt,
     HashTable,
     Interp,
     Merge,
     MipsReginfo,
     MipsOptions,
     MipsAbiFlags,
+    ARMExidx,
     Plt,
     Regular,
     Reloc,
     StrTable,
     SymTable,
     VersDef,
     VersNeed,
     VersTable
private:
   struct FdeData {
     uint32_t Pc;
     uint32_t FdeVA;
   };
 
   std::vector<FdeData> Fdes;
 };
 
+// A consolidated .ARM.exidx OutputSection containing only
+// ARMExidxInputSections. Each ARMExidxInputSection has the SHF_LINK_ORDER
+// flag set and a sh_link set to the section index of the executable
+// InputSection it describes. The intention being to form a binary searchable
+// table that maps the address an exception is thrown from to the exception
+// table that handles it.
+// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038b/IHI0038B_ehabi.pdf
+template <class ELFT>
+class ARMExidxOutputSection final : public OutputSectionBase<ELFT> {
+  typedef typename ELFT::uint uintX_t;
+  typedef OutputSectionBase<ELFT> Base;
+
+public:
+  ARMExidxOutputSection(StringRef Name);
+  void addSection(InputSectionBase<ELFT> *C) override;
+  void assignOffsets() override;
+  void writeTo(uint8_t *Buf) override;
+  void finalize() override;
+  typename Base::Kind getKind() const override { return Base::ARMExidx; }
+  static bool classof(const Base *B) { return B->getKind() == Base::ARMExidx; }
+  std::vector<ARMExidxInputSection<ELFT> *> Sections;
+};
+
 template <class ELFT> class BuildIdSection : public OutputSectionBase<ELFT> {
   typedef OutputSectionBase<ELFT> Base;
 
 public:
   void writeTo(uint8_t *Buf) override;
   virtual void writeBuildId(ArrayRef<uint8_t> Buf) = 0;
   typename Base::Kind getKind() const override { return Base::BuildId; }
   static bool classof(const Base *B) { return B->getKind() == Base::BuildId; }

ELF/OutputSections.cpp

void MipsAbiFlagsOutputSection<ELFT>::addSection(InputSectionBase<ELFT> *C) {
   Flags.ases |= S->Flags->ases;
   Flags.flags1 |= S->Flags->flags1;
   Flags.flags2 |= S->Flags->flags2;
   Flags.fp_abi = elf::getMipsFpAbiFlag(Flags.fp_abi, S->Flags->fp_abi,
                                        getFilename(S->getFile()));
 }
 
 template <class ELFT>
+ARMExidxOutputSection<ELFT>::ARMExidxOutputSection(StringRef Name)
+    : OutputSectionBase<ELFT>(Name, SHT_ARM_EXIDX, SHF_ALLOC | SHF_LINK_ORDER) {
+}
+
+template <class ELFT>
+void ARMExidxOutputSection<ELFT>::addSection(InputSectionBase<ELFT> *C) {
+  assert(C->Live);
+  auto *S = cast<ARMExidxInputSection<ELFT>>(C);
+  Sections.push_back(S);
+  S->OutSec = this;
+  this->updateAlignment(S->Alignment);
+}
+
+// This function is called after we sort input sections
+// and scan relocations to setup sections' offsets.
+template <class ELFT> void ARMExidxOutputSection<ELFT>::assignOffsets() {
+  uintX_t Off = 0;
+  for (ARMExidxInputSection<ELFT> *S : Sections) {
+    Off = alignTo(Off, S->Alignment);
+    S->OutSecOff = Off;
+    Off += S->getSize();
+  }
+  this->Header.sh_size = Off;
+}
+
+template <class ELFT> void ARMExidxOutputSection<ELFT>::writeTo(uint8_t *Buf) {
+  // Order .ARM.Exidx Input Sections in order of the virtual address of
+  // the sections that the .ARM.exidx sections have a SHF_LINK_ORDER
+  // dependency on.
+  auto LinkOrderComp = [](const ARMExidxInputSection<ELFT> *A,
+                          const ARMExidxInputSection<ELFT> *B) {
+    const InputSection<ELFT> *LinkedToA = A->getLinkedToSection();
+    const InputSection<ELFT> *LinkedToB = B->getLinkedToSection();
+    if (LinkedToA->OutSec == LinkedToB->OutSec)
+      return (LinkedToA->OutSecOff < LinkedToB->OutSecOff);
+    return LinkedToA->OutSec->getVA() < LinkedToB->OutSec->getVA();
+  };
+  std::stable_sort(Sections.begin(), Sections.end(), LinkOrderComp);
+  // reassign .ARM.exidx Input Section offsets
+  // .ARM.exidx sections are always 4-byte aligned and their size
+  // is always a multiple of 8 so reordering the sections won't change
+  // the OutputSection size.
+  assignOffsets();
+
+  for (ARMExidxInputSection<ELFT> *C : Sections)
+    C->writeTo(Buf);
+}
+
+template <class ELFT> void ARMExidxOutputSection<ELFT>::finalize() {
+  for (ARMExidxInputSection<ELFT> *S : Sections) {
+    InputSection<ELFT> *D = S->getLinkedToSection();
+    if (D) {
+      // For Relocatable links all InputSections will have the same
+      // OutSec. For non-relocatable links the sh_link is irrelevant but
+      // some ELF processing tools can complain if it is not set so we use
+      // the first InputSection.
+      this->Header.sh_link = D->OutSec->SectionIndex;
+      return;
+    }
+  }
+}
+
+template <class ELFT>
 std::pair<OutputSectionBase<ELFT> *, bool>
 OutputSectionFactory<ELFT>::create(InputSectionBase<ELFT> *C,
                                    StringRef OutsecName) {
   SectionKey<ELFT::Is64Bits> Key = createKey(C, OutsecName);
   OutputSectionBase<ELFT> *&Sec = Map[Key];
   if (Sec)
     return {Sec, false};
 
case InputSectionBase<ELFT>::MipsReginfo:
     Sec = new MipsReginfoOutputSection<ELFT>();
     break;
   case InputSectionBase<ELFT>::MipsOptions:
     Sec = new MipsOptionsOutputSection<ELFT>();
     break;
   case InputSectionBase<ELFT>::MipsAbiFlags:
     Sec = new MipsAbiFlagsOutputSection<ELFT>();
     break;
+  case InputSectionBase<ELFT>::ARMExidx:
+    Sec = new ARMExidxOutputSection<ELFT>(Key.Name);
+    break;
   }
   Out<ELFT>::Pool.emplace_back(Sec);
   return {Sec, true};
 }
 
 template <class ELFT>
 SectionKey<ELFT::Is64Bits>
 OutputSectionFactory<ELFT>::createKey(InputSectionBase<ELFT> *C,

 template class MipsOptionsOutputSection<ELF64LE>;
 template class MipsOptionsOutputSection<ELF64BE>;
 
 template class MipsAbiFlagsOutputSection<ELF32LE>;
 template class MipsAbiFlagsOutputSection<ELF32BE>;
 template class MipsAbiFlagsOutputSection<ELF64LE>;
 template class MipsAbiFlagsOutputSection<ELF64BE>;
 
+template class ARMExidxOutputSection<ELF32LE>;
+template class ARMExidxOutputSection<ELF32BE>;
+template class ARMExidxOutputSection<ELF64LE>;
+template class ARMExidxOutputSection<ELF64BE>;
+
 template class MergeOutputSection<ELF32LE>;
 template class MergeOutputSection<ELF32BE>;
 template class MergeOutputSection<ELF64LE>;
 template class MergeOutputSection<ELF64BE>;
 
 template class StringTableSection<ELF32LE>;
 template class StringTableSection<ELF32BE>;
 template class StringTableSection<ELF64LE>;

ELF/Writer.cpp

private:
 
   uintX_t FileSize;
   uintX_t SectionHeaderOff;
 };
 } // anonymous namespace
 
 template <class ELFT>
 StringRef elf::getOutputSectionName(InputSectionBase<ELFT> *S) {
+  if (auto *ARMExidx = dyn_cast<ARMExidxInputSection<ELFT>>(S))
+    return ARMExidx->getOutputSectionName();
   StringRef Name = S->getSectionName();
   for (StringRef V : {".text.", ".rodata.", ".data.rel.ro.", ".data.", ".bss.",
                       ".init_array.", ".fini_array.", ".ctors.", ".dtors.",
-                      ".tbss.", ".gcc_except_table.", ".tdata.", ".ARM.exidx."})
+                      ".tbss.", ".gcc_except_table.", ".tdata."})
     if (Name.startswith(V))
       return V.drop_back();
   return Name;
 }
 
 template <class ELFT> void elf::reportDiscarded(InputSectionBase<ELFT> *IS) {
   if (!Config->PrintGcSections || !IS || IS->Live)
     return;
for (InputSectionBase<ELFT> *C : F->getSections()) {
       if (auto *S = dyn_cast<InputSection<ELFT>>(C)) {
         for (const Elf_Shdr *RelSec : S->RelocSections)
           Fn(*S, *RelSec);
         continue;
       }
       if (auto *S = dyn_cast<EhInputSection<ELFT>>(C))
         if (S->RelocSection)
           Fn(*S, *S->RelocSection);
+      if (auto *S = dyn_cast<ARMExidxInputSection<ELFT>>(C)) {
+        for (const Elf_Shdr *RelSec : S->RelocSections)
+          Fn(*S, *RelSec);
+        continue;
+      }
     }
   }
 }
 
 template <class ELFT> void Writer<ELFT>::createSections() {
   for (const std::unique_ptr<elf::ObjectFile<ELFT>> &F :
        Symtab<ELFT>::X->getObjectFiles()) {
     for (InputSectionBase<ELFT> *C : F->getSections()) {
std::vector<PhdrEntry<ELFT>> Writer<ELFT>::createPhdrs() {
   uintX_t Flags = PF_R;
   Phdr *Load = AddHdr(PT_LOAD, Flags);
   Load->add(Out<ELFT>::ElfHeader);
   Load->add(Out<ELFT>::ProgramHeaders);
 
   Phdr TlsHdr(PT_TLS, PF_R);
   Phdr RelRo(PT_GNU_RELRO, PF_R);
   Phdr Note(PT_NOTE, PF_R);
+  Phdr ARMExidx(PT_ARM_EXIDX, PF_R);
   for (OutputSectionBase<ELFT> *Sec : OutputSections) {
     if (!(Sec->getFlags() & SHF_ALLOC))
       break;
 
     // If we meet TLS section then we create TLS header
     // and put all TLS sections inside for futher use when
     // assign addresses.
     if (Sec->getFlags() & SHF_TLS)
for (OutputSectionBase<ELFT> *Sec : OutputSections) {
     }
 
     Load->add(Sec);
 
     if (isRelroSection(Sec))
       RelRo.add(Sec);
     if (Sec->getType() == SHT_NOTE)
       Note.add(Sec);
+    if (Config->EMachine == EM_ARM && Sec->getType() == SHT_ARM_EXIDX)
+      ARMExidx.add(Sec);
   }
 
   // Add the TLS segment unless it's empty.
   if (TlsHdr.First)
     Ret.push_back(std::move(TlsHdr));
 
   // Add an entry for .dynamic.
   if (Out<ELFT>::DynSymTab) {
     Phdr &H = *AddHdr(PT_DYNAMIC, Out<ELFT>::Dynamic->getPhdrFlags());
     H.add(Out<ELFT>::Dynamic);
   }
 
   // PT_GNU_RELRO includes all sections that should be marked as
   // read-only by dynamic linker after proccessing relocations.
   if (RelRo.First)
     Ret.push_back(std::move(RelRo));
 
   // PT_GNU_EH_FRAME is a special section pointing on .eh_frame_hdr.
   if (!Out<ELFT>::EhFrame->empty() && Out<ELFT>::EhFrameHdr) {
     Phdr &Hdr = *AddHdr(PT_GNU_EH_FRAME, Out<ELFT>::EhFrameHdr->getPhdrFlags());
     Hdr.add(Out<ELFT>::EhFrameHdr);
   }
 
+  // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME
+  if (ARMExidx.First)
+    Ret.push_back(std::move(ARMExidx));
+
   // PT_GNU_STACK is a special section to tell the loader to make the
   // pages for the stack non-executable.
   if (!Config->ZExecStack) {
     Phdr &Hdr = *AddHdr(PT_GNU_STACK, PF_R | PF_W);
     if (Config->ZStackSize != uint64_t(-1))
       Hdr.H.p_memsz = Config->ZStackSize;
   }
 

test/ELF/Inputs/arm-exidx-cantunwind.s

+// Functions that will generate a .ARM.exidx section with SHF_LINK_ORDER
+// dependency on the progbits section containing the .cantunwind directive
+ .syntax unified
+ .section .func1, "ax",%progbits
+ .globl func1
+ .align 2
+ .type func1,%function
+func1:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+
+ .section .func2, "ax", %progbits
+ .globl func2
+ .align 2
+ .type func2,%function
+func2:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+
+ .section .func3, "ax",%progbits
+ .globl func3
+ .align 2
+ .type func3,%function
+func3:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+
+ .section .text, "ax",%progbits
+ .globl func4
+ .align 2
+ .type func4,%function
+func4:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+ .globl func5
+ .align 2
+ .type func5,%function
+func5:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend

test/ELF/arm-exidx-order.s

+// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/arm-exidx-cantunwind.s -o %tcantunwind
+// RUN: ld.lld %t %tcantunwind -o %t2 2>&1
+// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
+// RUN: llvm-objdump -s -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EXIDX %s
+// RUN: llvm-readobj --program-headers --sections %t2 | FileCheck -check-prefix=CHECK-PT %s
+// Use Linker script to place .ARM.exidx in between .text and orphan sections
+// RUN: echo "SECTIONS { \
+// RUN:          .text : { *(.text*) } \
+// RUN:          .ARM.exidx : { *(.ARM.exidx) } } " > %t.script
+// RUN: ld.lld --script %t.script %tcantunwind %t -o %t3 2>&1
+// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t3 | FileCheck -check-prefix=CHECK-SCRIPT %s
+// RUN: llvm-objdump -s -triple=armv7a-none-linux-gnueabi %t3 | FileCheck -check-prefix=CHECK-SCRIPT-EXIDX %s
+// Check that relocatable link maintains SHF_LINK_ORDER and when relinked
+// produces same output as a full link
+// RUN: ld.lld -r %t %tcantunwind -o %t4 2>&1
+// RUN: llvm-readobj -s %t4 | FileCheck -check-prefix=CHECK-RELOCATABLE %s
+// RUN: ld.lld %t4 -o %t5
+// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t5 | FileCheck %s
+// RUN: llvm-objdump -s -triple=armv7a-none-linux-gnueabi %t5 | FileCheck -check-prefix=CHECK-EXIDX %s
+// RUN: llvm-readobj --program-headers --sections %t2 | FileCheck -check-prefix=CHECK-PT %s
+// REQUIRES: arm
+
+// Each assembler created .ARM.exidx section has the SHF_LINK_ORDER flag set
+// with the sh_link containing the section index of the executable section
+// containing the function it describes. The linker must combine the .ARM.exidx
+// InputSections in the same order that it has combined the executable section,
+// such that the combined .ARM.exidx OutputSection can be used as  a binary
+// search table.
+
+ .syntax unified
+ .section .text, "ax",%progbits
+ .globl _start
+ .align 2
+ .type _start,%function
+_start:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+
+ .section .text.f1, "ax", %progbits
+ .globl f1
+ .align 2
+ .type f1,%function
+f1:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+
+ .section .text.f2, "ax", %progbits
+ .globl f2
+ .align 2
+ .type f2,%function
+f2:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+ .globl f3
+ .align 2
+ .type f3,%function
+f3:
+ .fnstart
+ bx lr
+ .cantunwind
+ .fnend
+
+// Check default no linker script order.
+
+// CHECK: Disassembly of section .text:
+// CHECK: _start:
+// CHECK-NEXT:    11000:       1e ff 2f e1     bx      lr
+// CHECK: f1:
+// CHECK-NEXT:    11004:       1e ff 2f e1     bx      lr
+// CHECK: f2:
+// CHECK-NEXT:    11008:       1e ff 2f e1     bx      lr
+// CHECK: f3:
+// CHECK-NEXT:    1100c:       1e ff 2f e1     bx      lr
+// CHECK: func4:
+// CHECK-NEXT:    11010:       1e ff 2f e1     bx      lr
+// CHECK: func5:
+// CHECK-NEXT:    11014:       1e ff 2f e1     bx      lr
+// CHECK: Disassembly of section .func1:
+// CHECK-NEXT: func1:
+// CHECK-NEXT:    11018:       1e ff 2f e1     bx      lr
+// CHECK: Disassembly of section .func2:
+// CHECK-NEXT: func2:
+// CHECK-NEXT:    1101c:       1e ff 2f e1     bx      lr
+// CHECK: Disassembly of section .func3:
+// CHECK-NEXT: func3:
+// CHECK-NEXT:    11020:       1e ff 2f e1     bx      lr
+
+// Each .ARM.exidx section has two 4 byte fields
+// Field 1 is the 31-bit offset to the function. The top bit is used to
+// indicate whether Field 2 is a pointer or an inline table entry.
+// Field 2 is either a pointer to a .ARM.extab section or an inline table
+// In this example all Field 2 entries are inline can't unwind (0x1)
+// We expect to see the entries in the same order as the functions
+
+// CHECK-EXIDX: Contents of section .ARM.exidx:
+// 100d4 + f2c = 11000 = _start
+// 100dc + f28 = 11004 = f1
+// CHECK-EXIDX-NEXT:       100d4 2c0f0000 01000000 280f0000 01000000
+// 100e4 + f24 = 11008 = f2
+// 100ec + f20 = 1100c = f3
+// CHECK-EXIDX-NEXT:  100e4 240f0000 01000000 200f0000 01000000
+// 100f4 + f1c = 11010 = func4
+// 100fc + f18 = 11014 = func5
+// CHECK-EXIDX-NEXT:  100f4 1c0f0000 01000000 180f0000 01000000
+// 10104 + f14 = 11018 = func1
+// 1010c + f10 = 1101c = func2
+// CHECK-EXIDX-NEXT:  10104 140f0000 01000000 100f0000 01000000
+// 10114 + f0c = 11020 = func3
+// CHECK-EXIDX-NEXT:  10114 0c0f0000 01000000
+
+// Check that PT_ARM_EXIDX program header has been generated that describes
+// the .ARM.exidx output section
+// CHECK-PT:          Name: .ARM.exidx
+// CHECK-PT-NEXT:     Type: SHT_ARM_EXIDX (0x70000001)
+// CHECK-PT-NEXT:     Flags [ (0x82)
+// CHECK-PT-NEXT:       SHF_ALLOC (0x2)
+// CHECK-PT-NEXT:       SHF_LINK_ORDER (0x80)
+// CHECK-PT-NEXT:     ]
+// CHECK-PT-NEXT:     Address: 0x100D4
+// CHECK-PT-NEXT:     Offset: 0xD4
+// CHECK-PT-NEXT:     Size: 72
+// CHECK-PT-NEXT:     Link: 2
+// CHECK-PT-NEXT:     Info: 0
+// CHECK-PT-NEXT:     AddressAlignment: 4
+// CHECK-PT-NEXT:     EntrySize: 0
+// CHECK-PT-NEXT:   }
+
+// CHECK-PT:          Type: PT_ARM_EXIDX (0x70000001)
+// CHECK-PT-NEXT:     Offset: 0xD4
+// CHECK-PT-NEXT:     VirtualAddress: 0x100D4
+// CHECK-PT-NEXT:     PhysicalAddress: 0x100D4
+// CHECK-PT-NEXT:     FileSize: 72
+// CHECK-PT-NEXT:     MemSize: 72
+// CHECK-PT-NEXT:     Flags [ (0x4)
+// CHECK-PT-NEXT:       PF_R (0x4)
+// CHECK-PT-NEXT:     ]
+// CHECK-PT-NEXT:     Alignment: 4
+// CHECK-PT-NEXT:   }
+
+
+// Check linker script order. The .ARM.exidx section will be inserted after
+// the .text section but before the orphan sections
+
+// CHECK-SCRIPT: Disassembly of section .text:
+// CHECK-SCRIPT-NEXT: func4:
+// CHECK-SCRIPT-NEXT:      114:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT: func5:
+// CHECK-SCRIPT-NEXT:      118:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT: _start:
+// CHECK-SCRIPT-NEXT:      11c:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT: f1:
+// CHECK-SCRIPT-NEXT:      120:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT: f2:
+// CHECK-SCRIPT-NEXT:      124:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT: f3:
+// CHECK-SCRIPT-NEXT:      128:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT-NEXT: Disassembly of section .func1:
+// CHECK-SCRIPT-NEXT: func1:
+// CHECK-SCRIPT-NEXT:      174:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT-NEXT: Disassembly of section .func2:
+// CHECK-SCRIPT-NEXT: func2:
+// CHECK-SCRIPT-NEXT:      178:       1e ff 2f e1     bx      lr
+// CHECK-SCRIPT-NEXT: Disassembly of section .func3:
+// CHECK-SCRIPT-NEXT: func3:
+// CHECK-SCRIPT-NEXT:      17c:       1e ff 2f e1     bx      lr
+
+// Check that the .ARM.exidx section is sorted in order as the functions
+// The offset in field 1, is 32-bit so in the binary the most significant bit
+// will be e and not f.
+// 12c - 18 = 114
+// 134 - 1c = 118
+// CHECK-SCRIPT-EXIDX:       012c e8ffff7f 01000000 e4ffff7f 01000000
+// 13c - 20 = 11c
+// 144 - 24 = 120
+// CHECK-SCRIPT-EXIDX-NEXT:  013c e0ffff7f 01000000 dcffff7f 01000000
+// 14c - 28 = 124
+// 154 - 2c = 128
+// CHECK-SCRIPT-EXIDX-NEXT:  014c d8ffff7f 01000000 d4ffff7f 01000000
+// 15c + 18 = 174
+// 164 + 14 = 178
+// CHECK-SCRIPT-EXIDX-NEXT:  015c 18000000 01000000 14000000 01000000
+// 16c + 10 = 17c
+// CHECK-SCRIPT-EXIDX-NEXT:  016c 10000000 01000000
+
+// For a relocatable link check that the .ARM.exidx sections preserve their
+// SHF_LINK_ORDER dependencies and the sh_link points at the appropriate
+// progbits output section. When the relocatable object is linked as an input
+// to a full link the output should match the test above.
+
+// CHECK-RELOCATABLE:          Name: .ARM.exidx
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_ARM_EXIDX
+// CHECK-RELOCATABLE-NEXT:     Flags [
+// CHECK-RELOCATABLE-NEXT:       SHF_ALLOC
+// CHECK-RELOCATABLE-NEXT:       SHF_LINK_ORDER
+// CHECK-RELOCATABLE:          Link: 5
+// CHECK-RELOCATABLE:          Name: .ARM.exidx.func1
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_ARM_EXIDX
+// CHECK-RELOCATABLE-NEXT:     Flags [
+// CHECK-RELOCATABLE-NEXT:       SHF_ALLOC
+// CHECK-RELOCATABLE-NEXT:       SHF_LINK_ORDER
+// CHECK-RELOCATABLE:          Link: 6
+// CHECK-RELOCATABLE:          Name: .ARM.exidx.func2
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_ARM_EXIDX
+// CHECK-RELOCATABLE-NEXT:     Flags [
+// CHECK-RELOCATABLE-NEXT:       SHF_ALLOC
+// CHECK-RELOCATABLE-NEXT:       SHF_LINK_ORDER
+// CHECK-RELOCATABLE:          Link: 7
+// CHECK-RELOCATABLE:          Name: .ARM.exidx.func3
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_ARM_EXIDX
+// CHECK-RELOCATABLE-NEXT:     Flags [
+// CHECK-RELOCATABLE-NEXT:       SHF_ALLOC
+// CHECK-RELOCATABLE-NEXT:       SHF_LINK_ORDER
+// CHECK-RELOCATABLE:          Link: 8
+// CHECK-RELOCATABLE:        Section {
+// CHECK-RELOCATABLE-NEXT:     Index: 5
+// CHECK-RELOCATABLE-NEXT:     Name: .text
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_PROGBITS
+// CHECK-RELOCATABLE:        Section {
+// CHECK-RELOCATABLE-NEXT:     Index: 6
+// CHECK-RELOCATABLE-NEXT:     Name: .func1
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_PROGBITS
+// CHECK-RELOCATABLE:        Section {
+// CHECK-RELOCATABLE-NEXT:     Index: 7
+// CHECK-RELOCATABLE-NEXT:     Name: .func2
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_PROGBITS
+// CHECK-RELOCATABLE:        Section {
+// CHECK-RELOCATABLE-NEXT:     Index: 8
+// CHECK-RELOCATABLE-NEXT:     Name: .func3
+// CHECK-RELOCATABLE-NEXT:     Type: SHT_PROGBITS