This is an archive of the discontinued LLVM Phabricator instance.

[AArch64] Load/store opt: Don't count transient instructions towards search limits.
ClosedPublic

Authored by gberry on Jul 20 2016, 12:38 PM.

Details

Summary

This change also changes findMatchingInsn and
findMatchingUpdateInsnForward to take DBG_VALUE opcodes into account
when tracking register defs and uses, which could potentially inhibit
these optimizations in the presence of debug information.

Diff Detail

Event Timeline

gberry updated this revision to Diff 64730.Jul 20 2016, 12:38 PM
gberry retitled this revision from to [AArch64] Load/store opt: Don't count transient instructions towards search limits..
gberry updated this object.
gberry added a reviewer: mcrosier.
gberry added a subscriber: llvm-commits.
mcrosier edited edge metadata.Jul 20 2016, 12:57 PM

The change itself looks fine. Would it be possible to create a stable test case?

I was thinking the same thing. Should be relatively simple with MIR: just spam some ignorable instructions into otherwise tempting situations.

I'll give it a shot

gberry updated this revision to Diff 64775.Jul 20 2016, 3:06 PM
gberry edited edge metadata.

Add MIR test cases.

I think you also need to declare initializeAArch64LoadStoreOptPass in AArch64.h and call it in AArch64TargetMachine.cpp (otherwise llc won't recognize aarch64-ldst-opt).

Other than that, it all looks reasonable to me now.

Hi Tim,

I went ahead and made that change in https://reviews.llvm.org/rL276193

t.p.northover accepted this revision.Jul 21 2016, 8:01 AM
t.p.northover added a reviewer: t.p.northover.

Yes sorry, I did notice that afterwards but thought it would all work out without extra comments. LGTM!

This revision is now accepted and ready to land.Jul 21 2016, 8:01 AM
This revision was automatically updated to reflect the committed changes.