[libunwind][ARM] Improve unwinder stack usage - Make WMMX support optional

[rmaprath]

Summary

These registers are only available on a limited set of ARM targets (those based on XScale). Other targets should not have to pay the cost of these.

This patch shaves off about ~300 bytes of stack usage and ~1KB of code-size.

[bcraig]

CMakeLists.txt

108 ↗

(On Diff #62739)

Buried in one of the .s files, I see a preprocessor definition check for __ARM_WMMX. Can the use of the preprocessor define be used instead of adding a new configuration option?

[rmaprath]

CMakeLists.txt

108 ↗

(On Diff #62739)

Missed that. Digging into some past commits bumped into http://reviews.llvm.org/D5314#74501

I think it's safe to guard the whole thing with __ARM_WMMX. Will do that instead.

[rmaprath]

CMakeLists.txt

108 ↗

(On Diff #62739)

Although, now I'm not sure if clang ever generates this predefine.

The ACLE clearly says it should be defined for supporting targets: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf

I'm not sure if that justifies using this predefine to completely exclude all of WMMX support. Perhaps a build option is safer? @jroelofs: what's your take?

[compnerd]

I don't think that clang nor LLVM have much in terms of support for XScale. Can we do something more convoluted perhaps? I like the preprocessor based approach. However, if the compiler doesn't define it with the correct target, we define it and push it into the CPPFLAGS. This way, in the future, we can rely on the compiler to do the right thing and eventually lose the cmake magic.

[rmaprath]

In D21991#474736, @compnerd wrote:

I don't think that clang nor LLVM have much in terms of support for XScale. Can we do something more convoluted perhaps? I like the preprocessor based approach. However, if the compiler doesn't define it with the correct target, we define it and push it into the CPPFLAGS. This way, in the future, we can rely on the compiler to do the right thing and eventually lose the cmake magic.

Sounds good to me.

Just to confirm, we keep the cmake option and make it define __ARM_WMMX instead of _LIBUNWIND_ARM_WMMX? Or did you mean we try to figure it out based on the target? I think the latter would be very complicated; WMMX is not an architectural feature but an extension supported on some processors (like the PXA series: http://www.marvell.com/application-processors/pxa-family/).

WDYT?

Thanks.

/ Asiri

[compnerd]

Right, we make it a cmake define corresponding to the AEABI name. In the future when clang knows to correctly emit the macro, we just rely on that. Figuring it out based on the target in my case means: ${CMAKE_C_COMPILER} -x c -E - -dM <<< "__ARM_WMMX". Thats not too terrible to do, but since the support for WMMX is rare, I think skimping on that bit of preparation is acceptable too.

[rmaprath]

• Use __ARM_WMMX instead of _LIBUNWIND_ARM_WMMX
• Add a comment to the cmake option LIBUNWIND_ENABLE_ARM_WMMX to explain why it is done this way

[compnerd]

src/Registers.hpp

1497 ↗

(On Diff #62890)

Early returns would be nicer imo.

1706 ↗

(On Diff #62890)

Early returns would be nicer here as well imo.

[rmaprath]

src/Registers.hpp

1497 ↗

(On Diff #62890)

Not sure if I follow, did you mean to check the bounds of regNum the first thing and _LIBUNWIND_ABORT sooner than later? Might convolute the code given the conditional on __ARM_WMMX and I'm not sure what benefit it brings? Or perhaps I misunderstood you?

I'll commit the current patch as it is for the moment and then do a clean-up (once I understand what you mean).

Thanks.

[compnerd]

src/Registers.hpp

1497 ↗

(On Diff #62890)

Oh, that was meant, as, we can write the code a slight bit nicer, which is beyond the scope of your change. If you don't mind doing a bit more clean up -- a follow up patch to improve this would be appreciated!

Basically, we have a number of if/else if cases with a unreachable. We should replace this with a series of

if (<condition>) {
  <operation>
  return;
}

[rmaprath]

src/Registers.hpp

1497 ↗

(On Diff #62890)

Fixed in r274840

http://llvm.org/viewvc/llvm-project?view=revision&revision=274840

Thanks.

/ Asiri

libunwind/trunk/CMakeLists.txt

 
 # Define options.
 option(LIBUNWIND_BUILD_32_BITS "Build 32 bit libunwind" ${LLVM_BUILD_32_BITS})
 option(LIBUNWIND_ENABLE_ASSERTIONS "Enable assertions independent of build mode." ON)
 option(LIBUNWIND_ENABLE_PEDANTIC "Compile with pedantic enabled." ON)
 option(LIBUNWIND_ENABLE_WERROR "Fail and stop if a warning is triggered." OFF)
 option(LIBUNWIND_ENABLE_SHARED "Build libunwind as a shared library." ON)
 option(LIBUNWIND_ENABLE_CROSS_UNWINDING "Enable cross-platform unwinding support." OFF)
+option(LIBUNWIND_ENABLE_ARM_WMMX "Enable unwinding support for ARM WMMX registers." OFF)
 
 set(LIBUNWIND_TARGET_TRIPLE "" CACHE STRING "Target triple for cross compiling.")
 set(LIBUNWIND_GCC_TOOLCHAIN "" CACHE PATH "GCC toolchain for cross compiling.")
 set(LIBUNWIND_SYSROOT "" CACHE PATH "Sysroot for cross compiling.")
 
 
 # Check that we can build with 32 bits if requested.
 if (CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32)
else()
   endif ()
 endif ()
 
 # Cross-unwinding
 if (NOT LIBUNWIND_ENABLE_CROSS_UNWINDING)
   list(APPEND LIBUNWIND_COMPILE_FLAGS -D_LIBUNWIND_IS_NATIVE_ONLY)
 endif ()
 
+# ARM WMMX register support
+if (LIBUNWIND_ENABLE_ARM_WMMX)
+  # __ARM_WMMX is a compiler pre-define (as per the ACLE 2.0). Clang does not
+  # define this macro for any supported target at present. Therefore, here we
+  # provide the option to explicitly enable support for WMMX registers in the
+  # unwinder.
+  list(APPEND LIBUNWIND_COMPILE_FLAGS -D__ARM_WMMX)
+endif ()
+
 # This is the _ONLY_ place where add_definitions is called.
 if (MSVC)
   add_definitions(-D_CRT_SECURE_NO_WARNINGS)
 endif ()
 
 #===============================================================================
 # Setup Source Code
 #===============================================================================
 
 include_directories(include)
 
 add_subdirectory(src)

libunwind/trunk/include/__libunwind_config.h

 #  define _LIBUNWIND_CONTEXT_SIZE 117
 #  define _LIBUNWIND_CURSOR_SIZE 128
 # elif defined(__aarch64__)
 #  define _LIBUNWIND_TARGET_AARCH64 1
 #  define _LIBUNWIND_CONTEXT_SIZE 66
 #  define _LIBUNWIND_CURSOR_SIZE 78
 # elif defined(__arm__)
 #  define _LIBUNWIND_TARGET_ARM 1
-#  define _LIBUNWIND_CONTEXT_SIZE 60
-#  define _LIBUNWIND_CURSOR_SIZE 67
+#  if defined(__ARM_WMMX)
+#    define _LIBUNWIND_CONTEXT_SIZE 60
+#    define _LIBUNWIND_CURSOR_SIZE 67
+#  else
+#    define _LIBUNWIND_CONTEXT_SIZE 42
+#    define _LIBUNWIND_CURSOR_SIZE 49
+#  endif
 # elif defined(__or1k__)
 #  define _LIBUNWIND_TARGET_OR1K 1
 #  define _LIBUNWIND_CONTEXT_SIZE 16
 #  define _LIBUNWIND_CURSOR_SIZE 28
 # else
 #  error "Unsupported architecture."
 # endif
 #else // !_LIBUNWIND_IS_NATIVE_ONLY

libunwind/trunk/src/Registers.hpp

void restoreSavedFloatRegisters() {
     if (_saved_vfp_d0_d15) {
       if (_use_X_for_vfp_save)
         restoreVFPWithFLDMX(_vfp_d0_d15_pad);
       else
         restoreVFPWithFLDMD(_vfp_d0_d15_pad);
     }
     if (_saved_vfp_d16_d31)
       restoreVFPv3(_vfp_d16_d31);
+#if defined(__ARM_WMMX)
     if (_saved_iwmmx)
       restoreiWMMX(_iwmmx);
     if (_saved_iwmmx_control)
       restoreiWMMXControl(_iwmmx_control);
+#endif
   }
 
 private:
   struct GPRs {
     uint32_t __r[13]; // r0-r12
     uint32_t __sp;    // Stack pointer r13
     uint32_t __lr;    // Link register r14
     uint32_t __pc;    // Program counter r15
   };
 
   static void saveVFPWithFSTMD(unw_fpreg_t*);
   static void saveVFPWithFSTMX(unw_fpreg_t*);
   static void saveVFPv3(unw_fpreg_t*);
-  static void saveiWMMX(unw_fpreg_t*);
-  static void saveiWMMXControl(uint32_t*);
   static void restoreVFPWithFLDMD(unw_fpreg_t*);
   static void restoreVFPWithFLDMX(unw_fpreg_t*);
   static void restoreVFPv3(unw_fpreg_t*);
+#if defined(__ARM_WMMX)
+  static void saveiWMMX(unw_fpreg_t*);
+  static void saveiWMMXControl(uint32_t*);
   static void restoreiWMMX(unw_fpreg_t*);
   static void restoreiWMMXControl(uint32_t*);
+#endif
   void restoreCoreAndJumpTo();
 
   // ARM registers
   GPRs _registers;
 
   // We save floating point registers lazily because we can't know ahead of
   // time which ones are used. See EHABI #4.7.
 
   // Whether D0-D15 are saved in the FTSMX instead of FSTMD format.
   //
   // See EHABI #7.5 that explains how matching instruction sequences for load
   // and store need to be used to correctly restore the exact register bits.
   bool _use_X_for_vfp_save;
   // Whether VFP D0-D15 are saved.
   bool _saved_vfp_d0_d15;
   // Whether VFPv3 D16-D31 are saved.
   bool _saved_vfp_d16_d31;
-  // Whether iWMMX data registers are saved.
-  bool _saved_iwmmx;
-  // Whether iWMMX control registers are saved.
-  bool _saved_iwmmx_control;
   // VFP registers D0-D15, + padding if saved using FSTMX
   unw_fpreg_t _vfp_d0_d15_pad[17];
   // VFPv3 registers D16-D31, always saved using FSTMD
   unw_fpreg_t _vfp_d16_d31[16];
+#if defined(__ARM_WMMX)
+  // Whether iWMMX data registers are saved.
+  bool _saved_iwmmx;
+  // Whether iWMMX control registers are saved.
+  bool _saved_iwmmx_control;
   // iWMMX registers
   unw_fpreg_t _iwmmx[16];
   // iWMMX control registers
   uint32_t _iwmmx_control[4];
+#endif
 };
 
 inline Registers_arm::Registers_arm(const void *registers)
   : _use_X_for_vfp_save(false),
     _saved_vfp_d0_d15(false),
-    _saved_vfp_d16_d31(false),
-    _saved_iwmmx(false),
-    _saved_iwmmx_control(false) {
+    _saved_vfp_d16_d31(false) {
   static_assert((check_fit<Registers_arm, unw_context_t>::does_fit),
                 "arm registers do not fit into unw_context_t");
   // See unw_getcontext() note about data.
   memcpy(&_registers, registers, sizeof(_registers));
   memset(&_vfp_d0_d15_pad, 0, sizeof(_vfp_d0_d15_pad));
   memset(&_vfp_d16_d31, 0, sizeof(_vfp_d16_d31));
+#if defined(__ARM_WMMX)
+  _saved_iwmmx = false;
+  _saved_iwmmx_control = false;
   memset(&_iwmmx, 0, sizeof(_iwmmx));
   memset(&_iwmmx_control, 0, sizeof(_iwmmx_control));
+#endif
 }
 
 inline Registers_arm::Registers_arm()
   : _use_X_for_vfp_save(false),
     _saved_vfp_d0_d15(false),
-    _saved_vfp_d16_d31(false),
-    _saved_iwmmx(false),
-    _saved_iwmmx_control(false) {
+    _saved_vfp_d16_d31(false) {
   memset(&_registers, 0, sizeof(_registers));
   memset(&_vfp_d0_d15_pad, 0, sizeof(_vfp_d0_d15_pad));
   memset(&_vfp_d16_d31, 0, sizeof(_vfp_d16_d31));
+#if defined(__ARM_WMMX)
+  _saved_iwmmx = false;
+  _saved_iwmmx_control = false;  
   memset(&_iwmmx, 0, sizeof(_iwmmx));
   memset(&_iwmmx_control, 0, sizeof(_iwmmx_control));
+#endif
 }
 
 inline bool Registers_arm::validRegister(int regNum) const {
   // Returns true for all non-VFP registers supported by the EHABI
   // virtual register set (VRS).
   if (regNum == UNW_REG_IP)
     return true;
   if (regNum == UNW_REG_SP)
     return true;
   if (regNum >= UNW_ARM_R0 && regNum <= UNW_ARM_R15)
     return true;
+#if defined(__ARM_WMMX)
   if (regNum >= UNW_ARM_WC0 && regNum <= UNW_ARM_WC3)
     return true;
+#endif
   return false;
 }
 
 inline uint32_t Registers_arm::getRegister(int regNum) {
   if (regNum == UNW_REG_SP || regNum == UNW_ARM_SP)
     return _registers.__sp;
   if (regNum == UNW_ARM_LR)
     return _registers.__lr;
   if (regNum == UNW_REG_IP || regNum == UNW_ARM_IP)
     return _registers.__pc;
   if (regNum >= UNW_ARM_R0 && regNum <= UNW_ARM_R12)
     return _registers.__r[regNum];
+#if defined(__ARM_WMMX)
   if (regNum >= UNW_ARM_WC0 && regNum <= UNW_ARM_WC3) {
     if (!_saved_iwmmx_control) {
       _saved_iwmmx_control = true;
       saveiWMMXControl(_iwmmx_control);
     }
     return _iwmmx_control[regNum - UNW_ARM_WC0];
   }
+#endif
   _LIBUNWIND_ABORT("unsupported arm register");
 }
 
 inline void Registers_arm::setRegister(int regNum, uint32_t value) {
   if (regNum == UNW_REG_SP || regNum == UNW_ARM_SP)
     _registers.__sp = value;
   else if (regNum == UNW_ARM_LR)
     _registers.__lr = value;
   else if (regNum == UNW_REG_IP || regNum == UNW_ARM_IP)
     _registers.__pc = value;
   else if (regNum >= UNW_ARM_R0 && regNum <= UNW_ARM_R12)
     _registers.__r[regNum] = value;
+#if defined(__ARM_WMMX)
   else if (regNum >= UNW_ARM_WC0 && regNum <= UNW_ARM_WC3) {
     if (!_saved_iwmmx_control) {
       _saved_iwmmx_control = true;
       saveiWMMXControl(_iwmmx_control);
     }
     _iwmmx_control[regNum - UNW_ARM_WC0] = value;
-  } else
+  }
+#endif
+  else
     _LIBUNWIND_ABORT("unsupported arm register");
 }
 
 inline const char *Registers_arm::getRegisterName(int regNum) {
   switch (regNum) {
   case UNW_REG_IP:
   case UNW_ARM_IP: // UNW_ARM_R15 is alias
     return "pc";
default:
     return "unknown register";
   }
 }
 
 inline bool Registers_arm::validFloatRegister(int regNum) const {
   // NOTE: Consider the intel MMX registers floating points so the
   // unw_get_fpreg can be used to transmit the 64-bit data back.
   return ((regNum >= UNW_ARM_D0) && (regNum <= UNW_ARM_D31))
-      || ((regNum >= UNW_ARM_WR0) && (regNum <= UNW_ARM_WR15));
+#if defined(__ARM_WMMX)
+      || ((regNum >= UNW_ARM_WR0) && (regNum <= UNW_ARM_WR15))
+#endif
+      ;
 }
 
 inline unw_fpreg_t Registers_arm::getFloatRegister(int regNum) {
   if (regNum >= UNW_ARM_D0 && regNum <= UNW_ARM_D15) {
     if (!_saved_vfp_d0_d15) {
       _saved_vfp_d0_d15 = true;
       if (_use_X_for_vfp_save)
         saveVFPWithFSTMX(_vfp_d0_d15_pad);
       else
         saveVFPWithFSTMD(_vfp_d0_d15_pad);
     }
     return _vfp_d0_d15_pad[regNum - UNW_ARM_D0];
   } else if (regNum >= UNW_ARM_D16 && regNum <= UNW_ARM_D31) {
     if (!_saved_vfp_d16_d31) {
       _saved_vfp_d16_d31 = true;
       saveVFPv3(_vfp_d16_d31);
     }
     return _vfp_d16_d31[regNum - UNW_ARM_D16];
-  } else if (regNum >= UNW_ARM_WR0 && regNum <= UNW_ARM_WR15) {
+  }
+#if defined(__ARM_WMMX)
+  else if (regNum >= UNW_ARM_WR0 && regNum <= UNW_ARM_WR15) {
     if (!_saved_iwmmx) {
       _saved_iwmmx = true;
       saveiWMMX(_iwmmx);
     }
     return _iwmmx[regNum - UNW_ARM_WR0];
-  } else {
-    _LIBUNWIND_ABORT("Unknown ARM float register");
   }
+#endif
+  else
+    _LIBUNWIND_ABORT("Unknown ARM float register");
 }
 
 inline void Registers_arm::setFloatRegister(int regNum, unw_fpreg_t value) {
   if (regNum >= UNW_ARM_D0 && regNum <= UNW_ARM_D15) {
     if (!_saved_vfp_d0_d15) {
       _saved_vfp_d0_d15 = true;
       if (_use_X_for_vfp_save)
         saveVFPWithFSTMX(_vfp_d0_d15_pad);
       else
         saveVFPWithFSTMD(_vfp_d0_d15_pad);
     }
     _vfp_d0_d15_pad[regNum - UNW_ARM_D0] = value;
   } else if (regNum >= UNW_ARM_D16 && regNum <= UNW_ARM_D31) {
     if (!_saved_vfp_d16_d31) {
       _saved_vfp_d16_d31 = true;
       saveVFPv3(_vfp_d16_d31);
     }
     _vfp_d16_d31[regNum - UNW_ARM_D16] = value;
-  } else if (regNum >= UNW_ARM_WR0 && regNum <= UNW_ARM_WR15) {
+  }
+#if defined(__ARM_WMMX)
+  else if (regNum >= UNW_ARM_WR0 && regNum <= UNW_ARM_WR15) {
     if (!_saved_iwmmx) {
       _saved_iwmmx = true;
       saveiWMMX(_iwmmx);
     }
     _iwmmx[regNum - UNW_ARM_WR0] = value;
-  } else {
-    _LIBUNWIND_ABORT("Unknown ARM float register");
   }
+#endif
+  else
+    _LIBUNWIND_ABORT("Unknown ARM float register");
 }
 
 inline bool Registers_arm::validVectorRegister(int) const {
   return false;
 }
 
 inline v128 Registers_arm::getVectorRegister(int) const {
   _LIBUNWIND_ABORT("ARM vector support not implemented");

libunwind/trunk/src/Unwind-EHABI.cpp

if ((byte & 0x80) == 0) {
               _Unwind_VRS_Pop(context, _UVRSC_VFP,
                               RegisterRange(8, byte & 0x07), _UVRSD_VFPX);
               break;
           }
           break;
         }
         case 0xc0: {
           switch (byte) {
+#if defined(__ARM_WMMX)
             case 0xc0:
             case 0xc1:
             case 0xc2:
             case 0xc3:
             case 0xc4:
             case 0xc5:
               _Unwind_VRS_Pop(context, _UVRSC_WMMXD,
                               RegisterRange(10, byte & 0x7), _UVRSD_DOUBLE);
#if defined(__ARM_WMMX)
             }
             case 0xc7: {
               uint8_t v = getByte(data, offset++);
               if (!v || v & 0xf0)
                 return _URC_FAILURE;
               _Unwind_VRS_Pop(context, _UVRSC_WMMXC, v, _UVRSD_DOUBLE);
               break;
             }
+#endif
             case 0xc8:
             case 0xc9: {
               uint8_t v = getByte(data, offset++);
               uint8_t start =
                   static_cast<uint8_t>(((byte == 0xc8) ? 16 : 0) + (v >> 4));
               uint8_t count_minus_one = v & 0xf;
               if (start + count_minus_one >= 32)
                 return _URC_FAILURE;
_Unwind_VRS_Set(_Unwind_Context *context, _Unwind_VRS_RegClass regclass,
   switch (regclass) {
     case _UVRSC_CORE:
       if (representation != _UVRSD_UINT32 || regno > 15)
         return _UVRSR_FAILED;
       return unw_set_reg(cursor, (unw_regnum_t)(UNW_ARM_R0 + regno),
                          *(unw_word_t *)valuep) == UNW_ESUCCESS
                  ? _UVRSR_OK
                  : _UVRSR_FAILED;
-    case _UVRSC_WMMXC:
-      if (representation != _UVRSD_UINT32 || regno > 3)
-        return _UVRSR_FAILED;
-      return unw_set_reg(cursor, (unw_regnum_t)(UNW_ARM_WC0 + regno),
-                         *(unw_word_t *)valuep) == UNW_ESUCCESS
-                 ? _UVRSR_OK
-                 : _UVRSR_FAILED;
     case _UVRSC_VFP:
       if (representation != _UVRSD_VFPX && representation != _UVRSD_DOUBLE)
         return _UVRSR_FAILED;
       if (representation == _UVRSD_VFPX) {
         // Can only touch d0-15 with FSTMFDX.
         if (regno > 15)
           return _UVRSR_FAILED;
         unw_save_vfp_as_X(cursor);
       } else {
         if (regno > 31)
           return _UVRSR_FAILED;
       }
       return unw_set_fpreg(cursor, (unw_regnum_t)(UNW_ARM_D0 + regno),
                            *(unw_fpreg_t *)valuep) == UNW_ESUCCESS
                  ? _UVRSR_OK
                  : _UVRSR_FAILED;
+#if defined(__ARM_WMMX)
+    case _UVRSC_WMMXC:
+      if (representation != _UVRSD_UINT32 || regno > 3)
+        return _UVRSR_FAILED;
+      return unw_set_reg(cursor, (unw_regnum_t)(UNW_ARM_WC0 + regno),
+                         *(unw_word_t *)valuep) == UNW_ESUCCESS
+                 ? _UVRSR_OK
+                 : _UVRSR_FAILED;
     case _UVRSC_WMMXD:
       if (representation != _UVRSD_DOUBLE || regno > 31)
         return _UVRSR_FAILED;
       return unw_set_fpreg(cursor, (unw_regnum_t)(UNW_ARM_WR0 + regno),
                            *(unw_fpreg_t *)valuep) == UNW_ESUCCESS
                  ? _UVRSR_OK
                  : _UVRSR_FAILED;
+#endif
   }
   _LIBUNWIND_ABORT("unsupported register class");
 }
 
 static _Unwind_VRS_Result
 _Unwind_VRS_Get_Internal(_Unwind_Context *context,
                          _Unwind_VRS_RegClass regclass, uint32_t regno,
                          _Unwind_VRS_DataRepresentation representation,
                          void *valuep) {
   unw_cursor_t *cursor = (unw_cursor_t *)context;
   switch (regclass) {
     case _UVRSC_CORE:
       if (representation != _UVRSD_UINT32 || regno > 15)
         return _UVRSR_FAILED;
       return unw_get_reg(cursor, (unw_regnum_t)(UNW_ARM_R0 + regno),
                          (unw_word_t *)valuep) == UNW_ESUCCESS
                  ? _UVRSR_OK
                  : _UVRSR_FAILED;
-    case _UVRSC_WMMXC:
-      if (representation != _UVRSD_UINT32 || regno > 3)
-        return _UVRSR_FAILED;
-      return unw_get_reg(cursor, (unw_regnum_t)(UNW_ARM_WC0 + regno),
-                         (unw_word_t *)valuep) == UNW_ESUCCESS
-                 ? _UVRSR_OK
-                 : _UVRSR_FAILED;
     case _UVRSC_VFP:
       if (representation != _UVRSD_VFPX && representation != _UVRSD_DOUBLE)
         return _UVRSR_FAILED;
       if (representation == _UVRSD_VFPX) {
         // Can only touch d0-15 with FSTMFDX.
         if (regno > 15)
           return _UVRSR_FAILED;
         unw_save_vfp_as_X(cursor);
       } else {
         if (regno > 31)
           return _UVRSR_FAILED;
       }
       return unw_get_fpreg(cursor, (unw_regnum_t)(UNW_ARM_D0 + regno),
                            (unw_fpreg_t *)valuep) == UNW_ESUCCESS
                  ? _UVRSR_OK
                  : _UVRSR_FAILED;
+#if defined(__ARM_WMMX)
+    case _UVRSC_WMMXC:
+      if (representation != _UVRSD_UINT32 || regno > 3)
+        return _UVRSR_FAILED;
+      return unw_get_reg(cursor, (unw_regnum_t)(UNW_ARM_WC0 + regno),
+                         (unw_word_t *)valuep) == UNW_ESUCCESS
+                 ? _UVRSR_OK
+                 : _UVRSR_FAILED;
     case _UVRSC_WMMXD:
       if (representation != _UVRSD_DOUBLE || regno > 31)
         return _UVRSR_FAILED;
       return unw_get_fpreg(cursor, (unw_regnum_t)(UNW_ARM_WR0 + regno),
                            (unw_fpreg_t *)valuep) == UNW_ESUCCESS
                  ? _UVRSR_OK
                  : _UVRSR_FAILED;
+#endif
   }
   _LIBUNWIND_ABORT("unsupported register class");
 }
 
 _Unwind_VRS_Result _Unwind_VRS_Get(
     _Unwind_Context *context,
     _Unwind_VRS_RegClass regclass,
     uint32_t regno,

libunwind/trunk/src/UnwindRegistersRestore.S

 @  values pointer is in r0
 @
   .p2align 2
   .fpu vfpv3
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
   vldmia r0, {d16-d31}
   JMP(lr)
 
+#if defined(__ARM_WMMX)
+
 @
 @ static void libunwind::Registers_arm::restoreiWMMX(unw_fpreg_t* values)
 @
 @ On entry:
 @  values pointer is in r0
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreiWMMXEPy)
-#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || defined(__ARM_WMMX)
   ldcl p1, cr0, [r0], #8  @ wldrd wR0, [r0], #8
   ldcl p1, cr1, [r0], #8  @ wldrd wR1, [r0], #8
   ldcl p1, cr2, [r0], #8  @ wldrd wR2, [r0], #8
   ldcl p1, cr3, [r0], #8  @ wldrd wR3, [r0], #8
   ldcl p1, cr4, [r0], #8  @ wldrd wR4, [r0], #8
   ldcl p1, cr5, [r0], #8  @ wldrd wR5, [r0], #8
   ldcl p1, cr6, [r0], #8  @ wldrd wR6, [r0], #8
   ldcl p1, cr7, [r0], #8  @ wldrd wR7, [r0], #8
   ldcl p1, cr8, [r0], #8  @ wldrd wR8, [r0], #8
   ldcl p1, cr9, [r0], #8  @ wldrd wR9, [r0], #8
   ldcl p1, cr10, [r0], #8  @ wldrd wR10, [r0], #8
   ldcl p1, cr11, [r0], #8  @ wldrd wR11, [r0], #8
   ldcl p1, cr12, [r0], #8  @ wldrd wR12, [r0], #8
   ldcl p1, cr13, [r0], #8  @ wldrd wR13, [r0], #8
   ldcl p1, cr14, [r0], #8  @ wldrd wR14, [r0], #8
   ldcl p1, cr15, [r0], #8  @ wldrd wR15, [r0], #8
-#endif
   JMP(lr)
 
 @
 @ static void libunwind::Registers_arm::restoreiWMMXControl(unw_uint32_t* values)
 @
 @ On entry:
 @  values pointer is in r0
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreiWMMXControlEPj)
-#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || defined(__ARM_WMMX)
   ldc2 p1, cr8, [r0], #4  @ wldrw wCGR0, [r0], #4
   ldc2 p1, cr9, [r0], #4  @ wldrw wCGR1, [r0], #4
   ldc2 p1, cr10, [r0], #4  @ wldrw wCGR2, [r0], #4
   ldc2 p1, cr11, [r0], #4  @ wldrw wCGR3, [r0], #4
-#endif
   JMP(lr)
 
+#endif
+
 #elif defined(__or1k__)
 
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind14Registers_or1k6jumptoEv)
 #
 # void libunwind::Registers_or1k::jumpto()
 #
 # On entry:
 #  thread_state pointer is in r3

libunwind/trunk/src/UnwindRegistersSave.S

DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
   @ want the compiler to generate instructions that access those) but this is
   @ only accessed if the personality routine needs these registers. Use of
   @ these registers implies they are, actually, available on the target, so
   @ it's ok to execute.
   @ So, generate the instructions using the corresponding coprocessor mnemonic.
   vstmia r0, {d16-d31}
   JMP(lr)
 
+#if defined(_LIBUNWIND_ARM_WMMX)
+
 @
 @ static void libunwind::Registers_arm::saveiWMMX(unw_fpreg_t* values)
 @
 @ On entry:
 @  values pointer is in r0
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveiWMMXEPy)
-#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || defined(__ARM_WMMX)
   stcl p1, cr0, [r0], #8  @ wstrd wR0, [r0], #8
   stcl p1, cr1, [r0], #8  @ wstrd wR1, [r0], #8
   stcl p1, cr2, [r0], #8  @ wstrd wR2, [r0], #8
   stcl p1, cr3, [r0], #8  @ wstrd wR3, [r0], #8
   stcl p1, cr4, [r0], #8  @ wstrd wR4, [r0], #8
   stcl p1, cr5, [r0], #8  @ wstrd wR5, [r0], #8
   stcl p1, cr6, [r0], #8  @ wstrd wR6, [r0], #8
   stcl p1, cr7, [r0], #8  @ wstrd wR7, [r0], #8
   stcl p1, cr8, [r0], #8  @ wstrd wR8, [r0], #8
   stcl p1, cr9, [r0], #8  @ wstrd wR9, [r0], #8
   stcl p1, cr10, [r0], #8  @ wstrd wR10, [r0], #8
   stcl p1, cr11, [r0], #8  @ wstrd wR11, [r0], #8
   stcl p1, cr12, [r0], #8  @ wstrd wR12, [r0], #8
   stcl p1, cr13, [r0], #8  @ wstrd wR13, [r0], #8
   stcl p1, cr14, [r0], #8  @ wstrd wR14, [r0], #8
   stcl p1, cr15, [r0], #8  @ wstrd wR15, [r0], #8
-#endif
   JMP(lr)
 
 @
 @ static void libunwind::Registers_arm::saveiWMMXControl(unw_uint32_t* values)
 @
 @ On entry:
 @  values pointer is in r0
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControlEPj)
-#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || defined(__ARM_WMMX)
   stc2 p1, cr8, [r0], #4  @ wstrw wCGR0, [r0], #4
   stc2 p1, cr9, [r0], #4  @ wstrw wCGR1, [r0], #4
   stc2 p1, cr10, [r0], #4  @ wstrw wCGR2, [r0], #4
   stc2 p1, cr11, [r0], #4  @ wstrw wCGR3, [r0], #4
-#endif
   JMP(lr)
 
+#endif
+
 #elif defined(__or1k__)
 
 #
 # extern int unw_getcontext(unw_context_t* thread_state)
 #
 # On entry:
 #  thread_state pointer is in r3
 #