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[mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32
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Authored by zbuljan on Apr 15 2016, 12:14 AM.

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Summary

The patch implements microMIPSr6 LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32.

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rL LLVM

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zbuljan updated this revision to Diff 53850.Apr 15 2016, 12:14 AM
zbuljan retitled this revision from to [mips][microMIPS] Implement LL, SC, LWM32, SWM32, MOVEP, ROTR, ROTRV and SYSCALL instructions.
zbuljan updated this object.
zbuljan added subscribers: petarj, llvm-commits.
sdardis requested changes to this revision.Apr 15 2016, 3:12 AM
sdardis added a reviewer: sdardis.

Minor nits. When adding to the */(in)valid.s test files can you integrate the new instructions in alphabetical order with existing instructions? Also, group instructions of a similar size.

I know the files themselves aren't wholly consistent with this, so it doesn't have to be perfect.

lib/Target/Mips/Mips32r6InstrInfo.td
792–799 ↗(On Diff #53850)

Join these blocks together.

test/MC/Disassembler/Mips/micromips32r6/valid.txt
279–289 ↗(On Diff #53850)

As these are not ASE or floating point specific microMIPS instructions, can you place them between lines 31-100 in alphabetical order? It's more consistent that way.

The movep should be placed in one of the 16 bit instruction blocks.

test/MC/Disassembler/Mips/micromips64r6/valid.txt
218–228 ↗(On Diff #53850)

Here too, just place these instructions with the 32bit instructions? move should be with the 16bit instructions.

test/MC/Mips/micromips32r6/invalid.s
136 ↗(On Diff #53850)

Can you add rotrv with an immediate operand here, syscall with a register operand, syscall with an out of range immediate? Finally please place the instructions in alphabetical order with the existing instructions depending on whether their are 32bit or 16bit long.

test/MC/Mips/micromips32r6/valid.s
278–299 ↗(On Diff #53850)

Try to integrate these into the first 100~ lines alphabetically.

This revision now requires changes to proceed.Apr 15 2016, 3:12 AM
zbuljan updated this revision to Diff 54357.Apr 20 2016, 6:11 AM
zbuljan edited edge metadata.

Rebased to work with TOT.
All tests (valid.s/valid.txt/invalid.s) sorted in alphabetical order.
Added invalid test for rotrv with an immediate operand.
Invalid tests for syscall with a register operand and syscall with an out of range immediate placed in invalid-wrong-error.s because they currently emit wrong error messages.

Sorry, I should have been clearer, when I said "place the instructions in alphabetical order", I mean the instructions you were adding, not the entire test file.

Just place the new tests at the bottom of the test files. Then submit the tests from this diff (54357) as two separate review requests, one containing the invalid/invalid-wrong-error/valid files, and the other with the disassembly tests.

Secondly, you've added tests for swm32 and lwm32. If that's all you're doing can you update the commit message + title to reflect that?

Thanks.

zbuljan updated this revision to Diff 54467.Apr 21 2016, 1:57 AM
zbuljan retitled this revision from [mips][microMIPS] Implement LL, SC, LWM32, SWM32, MOVEP, ROTR, ROTRV and SYSCALL instructions to [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32.
zbuljan updated this object.
zbuljan edited edge metadata.

Rearranged tests according to comments from sdardis.

sdardis accepted this revision.Apr 21 2016, 2:56 AM
sdardis edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Apr 21 2016, 2:56 AM
This revision was automatically updated to reflect the committed changes.