Swift Calling Convention: add swiftself attribute

[manmanren]

Summary

Context can be found here:
RFC: Implementing the Swift calling convention in LLVM and Clang
https://groups.google.com/forum/#!topic/llvm-dev/epDd2w93kZ0

[manmanren]

Ping

[rnk]

Is this the special "context" argument that John mentioned? R10 is not a CSR on x86_64.

lib/Target/AArch64/AArch64CallingConvention.td

129

"A SwitfSelf" maybe?

lib/Target/ARM/ARMCallingConv.td

26

ditto, and elsewhere

test/CodeGen/X86/swiftself.ll

2

It seems you have no special rules for passing a 32-bit swiftself. That makes sense, I don't imagine you care about x86_32 swift performance. Can you add a RUN line that shows it being spilled to the stack as usual, though? I assume you'll want the ABI for it to be stable.

[manmanren]

Hi Reid,

Thanks for reviewing!

In D17866#372537, @rnk wrote:

Is this the special "context" argument that John mentioned? R10 is not a CSR on x86_64.

Yes, this is the "context/self" argument. This patch does not actually use a CSR because of the complications in the backend to use a CSR to pass an argument.
We are trying to improve this by improving the backend to handle this.

Cheers,
Manman

lib/Target/AArch64/AArch64CallingConvention.td

129

Will do :]

test/CodeGen/X86/swiftself.ll

2

You are right. I will make sure it works as designed on 32-bit.

[manmanren]

Ping :]

[mehdi_amini]

LGTM.

Reid, did you have anything else?

[mehdi_amini]

include/llvm/Target/TargetCallingConv.h

87

Typo here: Flags |= ...

[rnk]

Yep, looks good.

test/Bitcode/swiftself.ll

2

Can you merge this into attributes.ll? Each new test file has a small cost, and this fits in with the existing test there.

[MatzeB]

llvm/trunk/test/CodeGen/AArch64/swiftself.ll

1–2 ↗

(On Diff #51950)

CHECK-APPLE and CHECK-O0 appear to be checking the same why not just use CHECK? The same situations applies to the other tests.

docs/LangRef.rst

``dereferenceable_or_null(<n>)``
     For address space 0 ``dereferenceable_or_null(<n>)`` implies that
     a pointer is exactly one of ``dereferenceable(<n>)`` or ``null``,
     and in other address spaces ``dereferenceable_or_null(<n>)``
     implies that a pointer is at least one of ``dereferenceable(<n>)``
     or ``null`` (i.e. it may be both ``null`` and
     ``dereferenceable(<n>)``). This attribute may only be applied to
     pointer typed parameters.
 
+``swiftself``
+    This indicates that the parameter is the self/context parameter. This is not
+    a valid attribute for return values and can only be applied to one
+    parameter.
+
 .. _gc:
 
 Garbage Collector Strategy Names
 --------------------------------
 
 Each function may specify a garbage collector strategy name, which is simply a
 string:
 

include/llvm-c/Core.h

typedef enum {
     LLVMStackProtectStrongAttribute = 1ULL<<35,
     LLVMColdAttribute = 1ULL << 40,
     LLVMOptimizeNoneAttribute = 1ULL << 42,
     LLVMInAllocaAttribute = 1ULL << 43,
     LLVMNonNullAttribute = 1ULL << 44,
     LLVMJumpTableAttribute = 1ULL << 45,
     LLVMConvergentAttribute = 1ULL << 46,
     LLVMSafeStackAttribute = 1ULL << 47,
+    LLVMSwiftSelfAttribute = 1ULL << 48,
     */
 } LLVMAttribute;
 
 typedef enum {
   /* Terminator Instructions */
   LLVMRet            = 1,
   LLVMBr             = 2,
   LLVMSwitch         = 3,

include/llvm/CodeGen/FastISel.h

struct ArgListEntry {
     bool IsSExt : 1;
     bool IsZExt : 1;
     bool IsInReg : 1;
     bool IsSRet : 1;
     bool IsNest : 1;
     bool IsByVal : 1;
     bool IsInAlloca : 1;
     bool IsReturned : 1;
+    bool IsSwiftSelf : 1;
     uint16_t Alignment;
 
     ArgListEntry()
         : Val(nullptr), Ty(nullptr), IsSExt(false), IsZExt(false),
           IsInReg(false), IsSRet(false), IsNest(false), IsByVal(false),
-          IsInAlloca(false), IsReturned(false), Alignment(0) {}
+          IsInAlloca(false), IsReturned(false), IsSwiftSelf(false),
+          Alignment(0) {}
 
     /// \brief Set CallLoweringInfo attribute flags based on a call instruction
     /// and called function attributes.
     void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx);
   };
   typedef std::vector<ArgListEntry> ArgListTy;
 
   struct CallLoweringInfo {

include/llvm/IR/Argument.h

public:
   /// it in its containing function, return the number of bytes known to be
   /// dereferenceable. Otherwise, zero is returned.
   uint64_t getDereferenceableOrNullBytes() const;
 
   /// \brief Return true if this argument has the byval attribute on it in its
   /// containing function.
   bool hasByValAttr() const;
 
+  /// \brief Return true if this argument has the swiftself attribute.
+  bool hasSwiftSelfAttr() const;
+
   /// \brief Return true if this argument has the byval attribute or inalloca
   /// attribute on it in its containing function.  These attributes both
   /// represent arguments being passed by value.
   bool hasByValOrInAllocaAttr() const;
 
   /// \brief If this is a byval or inalloca argument, return its alignment.
   unsigned getParamAlignment() const;
 

include/llvm/IR/Attributes.td

 def SanitizeAddress : EnumAttr<"sanitize_address">;
 
 /// ThreadSanitizer is on.
 def SanitizeThread : EnumAttr<"sanitize_thread">;
 
 /// MemorySanitizer is on.
 def SanitizeMemory : EnumAttr<"sanitize_memory">;
 
+/// Argument is swift self/context.
+def SwiftSelf : EnumAttr<"swiftself">;
+
 /// Function must be in a unwind table.
 def UWTable : EnumAttr<"uwtable">;
 
 /// Zero extended before/after call.
 def ZExt : EnumAttr<"zeroext">;
 
 /// Target-independent string attributes.
 def LessPreciseFPMAD : StrBoolAttr<"less-precise-fpmad">;

include/llvm/Target/TargetCallingConv.h

private:
     static const uint64_t ByValAlign     = 0xFULL<<7; ///< Struct alignment
     static const uint64_t ByValAlignOffs = 7;
     static const uint64_t Split          = 1ULL<<11;
     static const uint64_t SplitOffs      = 11;
     static const uint64_t InAlloca       = 1ULL<<12; ///< Passed with inalloca
     static const uint64_t InAllocaOffs   = 12;
     static const uint64_t SplitEnd       = 1ULL<<13; ///< Last part of a split
     static const uint64_t SplitEndOffs   = 13;
+    static const uint64_t SwiftSelf      = 1ULL<<14; ///< Swift self parameter
+    static const uint64_t SwiftSelfOffs  = 14;
     static const uint64_t OrigAlign      = 0x1FULL<<27;
     static const uint64_t OrigAlignOffs  = 27;
     static const uint64_t ByValSize      = 0x3fffffffULL<<32; ///< Struct size
     static const uint64_t ByValSizeOffs  = 32;
     static const uint64_t InConsecutiveRegsLast      = 0x1ULL<<62; ///< Struct size
     static const uint64_t InConsecutiveRegsLastOffs  = 62;
     static const uint64_t InConsecutiveRegs      = 0x1ULL<<63; ///< Struct size
     static const uint64_t InConsecutiveRegsOffs  = 63;
public:
     void setSRet()     { Flags |= One << SRetOffs; }
 
     bool isByVal()     const { return Flags & ByVal; }
     void setByVal()    { Flags |= One << ByValOffs; }
 
     bool isInAlloca()  const { return Flags & InAlloca; }
     void setInAlloca() { Flags |= One << InAllocaOffs; }
 
+    bool isSwiftSelf() const { return Flags & SwiftSelf; }
+    void setSwiftSelf() { Flags = One << SwiftSelfOffs; }
+
     bool isNest()      const { return Flags & Nest; }
     void setNest()     { Flags |= One << NestOffs; }
 
     bool isReturned()  const { return Flags & Returned; }
     void setReturned() { Flags |= One << ReturnedOffs; }
 
     bool isInConsecutiveRegs()  const { return Flags & InConsecutiveRegs; }
     void setInConsecutiveRegs() { Flags |= One << InConsecutiveRegsOffs; }

include/llvm/Target/TargetCallingConv.td

class CCIf<string predicate, CCAction A> : CCPredicateAction<A> {
   string Predicate = predicate;
 }
 
 /// CCIfByVal - If the current argument has ByVal parameter attribute, apply
 /// Action A.
 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
 }
 
+/// CCIfSwiftSelf - If the current argument has swiftself parameter attribute,
+/// apply Action A.
+class CCIfSwiftSelf<CCAction A> : CCIf<"ArgFlags.isSwiftSelf()", A> {
+}
+
 /// CCIfConsecutiveRegs - If the current argument has InConsecutiveRegs
 /// parameter attribute, apply Action A.
 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> {
 }
 
 /// CCIfCC - Match if the current calling convention is 'CC'.
 class CCIfCC<string CC, CCAction A>
   : CCIf<!strconcat("State.getCallingConv() == ", CC), A> {}

include/llvm/Target/TargetLowering.h

struct ArgListEntry {
     bool isSExt     : 1;
     bool isZExt     : 1;
     bool isInReg    : 1;
     bool isSRet     : 1;
     bool isNest     : 1;
     bool isByVal    : 1;
     bool isInAlloca : 1;
     bool isReturned : 1;
+    bool isSwiftSelf : 1;
     uint16_t Alignment;
 
     ArgListEntry() : isSExt(false), isZExt(false), isInReg(false),
       isSRet(false), isNest(false), isByVal(false), isInAlloca(false),
-      isReturned(false), Alignment(0) { }
+      isReturned(false), isSwiftSelf(false), Alignment(0) { }
 
     void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx);
   };
   typedef std::vector<ArgListEntry> ArgListTy;
 
   /// This structure contains all information that is necessary for lowering
   /// calls. It is passed to TLI::LowerCallTo when the SelectionDAG builder
   /// needs to lower a call, and targets will see this struct in their LowerCall

lib/AsmParser/LLLexer.cpp

#define KEYWORD(STR)                                                           \
   KEYWORD(sret);
   KEYWORD(ssp);
   KEYWORD(sspreq);
   KEYWORD(sspstrong);
   KEYWORD(safestack);
   KEYWORD(sanitize_address);
   KEYWORD(sanitize_thread);
   KEYWORD(sanitize_memory);
+  KEYWORD(swiftself);
   KEYWORD(uwtable);
   KEYWORD(zeroext);
 
   KEYWORD(type);
   KEYWORD(opaque);
 
   KEYWORD(comdat);
 

lib/AsmParser/LLParser.cpp

while (true) {
     case lltok::kw_dereferenceable_or_null:
     case lltok::kw_inalloca:
     case lltok::kw_nest:
     case lltok::kw_noalias:
     case lltok::kw_nocapture:
     case lltok::kw_nonnull:
     case lltok::kw_returned:
     case lltok::kw_sret:
+    case lltok::kw_swiftself:
       HaveError |=
         Error(Lex.getLoc(),
               "invalid use of parameter-only attribute on a function");
       break;
     }
 
     Lex.Lex();
   }
while (1) {
     case lltok::kw_noalias:         B.addAttribute(Attribute::NoAlias); break;
     case lltok::kw_nocapture:       B.addAttribute(Attribute::NoCapture); break;
     case lltok::kw_nonnull:         B.addAttribute(Attribute::NonNull); break;
     case lltok::kw_readnone:        B.addAttribute(Attribute::ReadNone); break;
     case lltok::kw_readonly:        B.addAttribute(Attribute::ReadOnly); break;
     case lltok::kw_returned:        B.addAttribute(Attribute::Returned); break;
     case lltok::kw_signext:         B.addAttribute(Attribute::SExt); break;
     case lltok::kw_sret:            B.addAttribute(Attribute::StructRet); break;
+    case lltok::kw_swiftself:       B.addAttribute(Attribute::SwiftSelf); break;
     case lltok::kw_zeroext:         B.addAttribute(Attribute::ZExt); break;
 
     case lltok::kw_alignstack:
     case lltok::kw_alwaysinline:
     case lltok::kw_argmemonly:
     case lltok::kw_builtin:
     case lltok::kw_inlinehint:
     case lltok::kw_jumptable:
while (1) {
 
     // Error handling.
     case lltok::kw_byval:
     case lltok::kw_inalloca:
     case lltok::kw_nest:
     case lltok::kw_nocapture:
     case lltok::kw_returned:
     case lltok::kw_sret:
+    case lltok::kw_swiftself:
       HaveError |= Error(Lex.getLoc(), "invalid use of parameter-only attribute");
       break;
 
     case lltok::kw_alignstack:
     case lltok::kw_alwaysinline:
     case lltok::kw_argmemonly:
     case lltok::kw_builtin:
     case lltok::kw_cold:

lib/AsmParser/LLToken.h

enum Kind {
     kw_signext,
     kw_ssp,
     kw_sspreq,
     kw_sspstrong,
     kw_safestack,
     kw_sret,
     kw_sanitize_thread,
     kw_sanitize_memory,
+    kw_swiftself,
     kw_uwtable,
     kw_zeroext,
 
     kw_type,
     kw_opaque,
 
     kw_comdat,
 

lib/Bitcode/Reader/BitcodeReader.cpp

static Attribute::AttrKind getAttrFromCode(uint64_t Code) {
   case bitc::ATTR_KIND_STRUCT_RET:
     return Attribute::StructRet;
   case bitc::ATTR_KIND_SANITIZE_ADDRESS:
     return Attribute::SanitizeAddress;
   case bitc::ATTR_KIND_SANITIZE_THREAD:
     return Attribute::SanitizeThread;
   case bitc::ATTR_KIND_SANITIZE_MEMORY:
     return Attribute::SanitizeMemory;
+  case bitc::ATTR_KIND_SWIFT_SELF:
+    return Attribute::SwiftSelf;
   case bitc::ATTR_KIND_UW_TABLE:
     return Attribute::UWTable;
   case bitc::ATTR_KIND_Z_EXT:
     return Attribute::ZExt;
   }
 }
 
 std::error_code BitcodeReader::parseAlignmentValue(uint64_t Exponent,

lib/Bitcode/Writer/BitcodeWriter.cpp

static uint64_t getAttrKindEncoding(Attribute::AttrKind Kind) {
   case Attribute::StructRet:
     return bitc::ATTR_KIND_STRUCT_RET;
   case Attribute::SanitizeAddress:
     return bitc::ATTR_KIND_SANITIZE_ADDRESS;
   case Attribute::SanitizeThread:
     return bitc::ATTR_KIND_SANITIZE_THREAD;
   case Attribute::SanitizeMemory:
     return bitc::ATTR_KIND_SANITIZE_MEMORY;
+  case Attribute::SwiftSelf:
+    return bitc::ATTR_KIND_SWIFT_SELF;
   case Attribute::UWTable:
     return bitc::ATTR_KIND_UW_TABLE;
   case Attribute::ZExt:
     return bitc::ATTR_KIND_Z_EXT;
   case Attribute::EndAttrKinds:
     llvm_unreachable("Can not encode end-attribute kinds marker.");
   case Attribute::None:
     llvm_unreachable("Can not encode none-attribute.");

lib/CodeGen/SelectionDAG/FastISel.cpp

void FastISel::ArgListEntry::setAttributes(ImmutableCallSite *CS,
   IsSExt = CS->paramHasAttr(AttrIdx, Attribute::SExt);
   IsZExt = CS->paramHasAttr(AttrIdx, Attribute::ZExt);
   IsInReg = CS->paramHasAttr(AttrIdx, Attribute::InReg);
   IsSRet = CS->paramHasAttr(AttrIdx, Attribute::StructRet);
   IsNest = CS->paramHasAttr(AttrIdx, Attribute::Nest);
   IsByVal = CS->paramHasAttr(AttrIdx, Attribute::ByVal);
   IsInAlloca = CS->paramHasAttr(AttrIdx, Attribute::InAlloca);
   IsReturned = CS->paramHasAttr(AttrIdx, Attribute::Returned);
+  IsSwiftSelf = CS->paramHasAttr(AttrIdx, Attribute::SwiftSelf);
   Alignment = CS->getParamAlignment(AttrIdx);
 }
 
 /// Set the current block to which generated machine instructions will be
 /// appended, and clear the local CSE map.
 void FastISel::startNewBlock() {
   LocalValueMap.clear();
 
for (auto &Arg : CLI.getArgs()) {
     if (Arg.IsZExt)
       Flags.setZExt();
     if (Arg.IsSExt)
       Flags.setSExt();
     if (Arg.IsInReg)
       Flags.setInReg();
     if (Arg.IsSRet)
       Flags.setSRet();
+    if (Arg.IsSwiftSelf)
+      Flags.setSwiftSelf();
     if (Arg.IsByVal)
       Flags.setByVal();
     if (Arg.IsInAlloca) {
       Flags.setInAlloca();
       // Set the byval flag for CCAssignFn callbacks that don't know about
       // inalloca. This way we can know how many bytes we should've allocated
       // and how many bytes a callee cleanup function will pop.  If we port
       // inalloca to more targets, we'll have to add custom inalloca handling in

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

if (!CanLowerReturn) {
     Entry.Ty = StackSlotPtrType;
     Entry.isSExt = false;
     Entry.isZExt = false;
     Entry.isInReg = false;
     Entry.isSRet = true;
     Entry.isNest = false;
     Entry.isByVal = false;
     Entry.isReturned = false;
+    Entry.isSwiftSelf = false;
     Entry.Alignment = Align;
     CLI.getArgs().insert(CLI.getArgs().begin(), Entry);
     CLI.RetTy = Type::getVoidTy(CLI.RetTy->getContext());
 
     // sret demotion isn't compatible with tail-calls, since the sret argument
     // points into the callers stack frame.
     CLI.IsTailCall = false;
   } else {
for (unsigned Value = 0, NumValues = ValueVTs.size(); Value != NumValues;
       if (Args[i].isZExt)
         Flags.setZExt();
       if (Args[i].isSExt)
         Flags.setSExt();
       if (Args[i].isInReg)
         Flags.setInReg();
       if (Args[i].isSRet)
         Flags.setSRet();
+      if (Args[i].isSwiftSelf)
+        Flags.setSwiftSelf();
       if (Args[i].isByVal)
         Flags.setByVal();
       if (Args[i].isInAlloca) {
         Flags.setInAlloca();
         // Set the byval flag for CCAssignFn callbacks that don't know about
         // inalloca.  This way we can know how many bytes we should've allocated
         // and how many bytes a callee cleanup function will pop.  If we port
         // inalloca to more targets, we'll have to add custom inalloca handling
for (unsigned Value = 0, NumValues = ValueVTs.size();
       if (F.getAttributes().hasAttribute(Idx, Attribute::ZExt))
         Flags.setZExt();
       if (F.getAttributes().hasAttribute(Idx, Attribute::SExt))
         Flags.setSExt();
       if (F.getAttributes().hasAttribute(Idx, Attribute::InReg))
         Flags.setInReg();
       if (F.getAttributes().hasAttribute(Idx, Attribute::StructRet))
         Flags.setSRet();
+      if (F.getAttributes().hasAttribute(Idx, Attribute::SwiftSelf))
+        Flags.setSwiftSelf();
       if (F.getAttributes().hasAttribute(Idx, Attribute::ByVal))
         Flags.setByVal();
       if (F.getAttributes().hasAttribute(Idx, Attribute::InAlloca)) {
         Flags.setInAlloca();
         // Set the byval flag for CCAssignFn callbacks that don't know about
         // inalloca.  This way we can know how many bytes we should've allocated
         // and how many bytes a callee cleanup function will pop.  If we port
         // inalloca to more targets, we'll have to add custom inalloca handling

lib/CodeGen/SelectionDAG/TargetLowering.cpp

void TargetLowering::ArgListEntry::setAttributes(ImmutableCallSite *CS,
   isSExt     = CS->paramHasAttr(AttrIdx, Attribute::SExt);
   isZExt     = CS->paramHasAttr(AttrIdx, Attribute::ZExt);
   isInReg    = CS->paramHasAttr(AttrIdx, Attribute::InReg);
   isSRet     = CS->paramHasAttr(AttrIdx, Attribute::StructRet);
   isNest     = CS->paramHasAttr(AttrIdx, Attribute::Nest);
   isByVal    = CS->paramHasAttr(AttrIdx, Attribute::ByVal);
   isInAlloca = CS->paramHasAttr(AttrIdx, Attribute::InAlloca);
   isReturned = CS->paramHasAttr(AttrIdx, Attribute::Returned);
+  isSwiftSelf = CS->paramHasAttr(AttrIdx, Attribute::SwiftSelf);
   Alignment  = CS->getParamAlignment(AttrIdx);
 }
 
 /// Generate a libcall taking the given operands as arguments and returning a
 /// result of type RetVT.
 std::pair<SDValue, SDValue>
 TargetLowering::makeLibCall(SelectionDAG &DAG,
                             RTLIB::Libcall LC, EVT RetVT,

lib/IR/Attributes.cpp

std::string Attribute::getAsString(bool InAttrGrp) const {
   if (hasAttribute(Attribute::ArgMemOnly))
     return "argmemonly";
   if (hasAttribute(Attribute::Builtin))
     return "builtin";
   if (hasAttribute(Attribute::ByVal))
     return "byval";
   if (hasAttribute(Attribute::Convergent))
     return "convergent";
+  if (hasAttribute(Attribute::SwiftSelf))
+    return "swiftself";
   if (hasAttribute(Attribute::InaccessibleMemOnly))
     return "inaccessiblememonly";
   if (hasAttribute(Attribute::InaccessibleMemOrArgMemOnly))
     return "inaccessiblemem_or_argmemonly";
   if (hasAttribute(Attribute::InAlloca))
     return "inalloca";
   if (hasAttribute(Attribute::InlineHint))
     return "inlinehint";
uint64_t AttributeImpl::getAttrMask(Attribute::AttrKind Val) {
   case Attribute::InAlloca:        return 1ULL << 43;
   case Attribute::NonNull:         return 1ULL << 44;
   case Attribute::JumpTable:       return 1ULL << 45;
   case Attribute::Convergent:      return 1ULL << 46;
   case Attribute::SafeStack:       return 1ULL << 47;
   case Attribute::NoRecurse:       return 1ULL << 48;
   case Attribute::InaccessibleMemOnly:         return 1ULL << 49;
   case Attribute::InaccessibleMemOrArgMemOnly: return 1ULL << 50;
+  case Attribute::SwiftSelf:       return 1ULL << 51;
   case Attribute::Dereferenceable:
     llvm_unreachable("dereferenceable attribute not supported in raw format");
     break;
   case Attribute::DereferenceableOrNull:
     llvm_unreachable("dereferenceable_or_null attribute not supported in raw "
                      "format");
     break;
   case Attribute::ArgMemOnly:

lib/IR/Function.cpp

 /// hasByValAttr - Return true if this argument has the byval attribute on it
 /// in its containing function.
 bool Argument::hasByValAttr() const {
   if (!getType()->isPointerTy()) return false;
   return getParent()->getAttributes().
     hasAttribute(getArgNo()+1, Attribute::ByVal);
 }
 
+bool Argument::hasSwiftSelfAttr() const {
+  return getParent()->getAttributes().
+    hasAttribute(getArgNo()+1, Attribute::SwiftSelf);
+}
+
 /// \brief Return true if this argument has the inalloca attribute on it in
 /// its containing function.
 bool Argument::hasInAllocaAttr() const {
   if (!getType()->isPointerTy()) return false;
   return getParent()->getAttributes().
     hasAttribute(getArgNo()+1, Attribute::InAlloca);
 }
 

lib/IR/Verifier.cpp

void Verifier::verifyParameterAttrs(AttributeSet Attrs, unsigned Idx, Type *Ty,
   verifyAttributeTypes(Attrs, Idx, false, V);
 
   if (isReturnValue)
     Assert(!Attrs.hasAttribute(Idx, Attribute::ByVal) &&
                !Attrs.hasAttribute(Idx, Attribute::Nest) &&
                !Attrs.hasAttribute(Idx, Attribute::StructRet) &&
                !Attrs.hasAttribute(Idx, Attribute::NoCapture) &&
                !Attrs.hasAttribute(Idx, Attribute::Returned) &&
-               !Attrs.hasAttribute(Idx, Attribute::InAlloca),
-           "Attributes 'byval', 'inalloca', 'nest', 'sret', 'nocapture', and "
-           "'returned' do not apply to return values!",
+               !Attrs.hasAttribute(Idx, Attribute::InAlloca) &&
+               !Attrs.hasAttribute(Idx, Attribute::SwiftSelf),
+           "Attributes 'byval', 'inalloca', 'nest', 'sret', 'nocapture', "
+           "'returned', and 'swiftself' do not apply to return "
+           "values!",
            V);
 
   // Check for mutually incompatible attributes.  Only inreg is compatible with
   // sret.
   unsigned AttrCount = 0;
   AttrCount += Attrs.hasAttribute(Idx, Attribute::ByVal);
   AttrCount += Attrs.hasAttribute(Idx, Attribute::InAlloca);
   AttrCount += Attrs.hasAttribute(Idx, Attribute::StructRet) ||

 void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeSet Attrs,
                                    const Value *V) {
   if (Attrs.isEmpty())
     return;
 
   bool SawNest = false;
   bool SawReturned = false;
   bool SawSRet = false;
+  bool SawSwiftSelf = false;
 
   for (unsigned i = 0, e = Attrs.getNumSlots(); i != e; ++i) {
     unsigned Idx = Attrs.getSlotIndex(i);
 
     Type *Ty;
     if (Idx == 0)
       Ty = FT->getReturnType();
     else if (Idx-1 < FT->getNumParams())
for (unsigned i = 0, e = Attrs.getNumSlots(); i != e; ++i) {
 
     if (Attrs.hasAttribute(Idx, Attribute::StructRet)) {
       Assert(!SawSRet, "Cannot have multiple 'sret' parameters!", V);
       Assert(Idx == 1 || Idx == 2,
              "Attribute 'sret' is not on first or second parameter!", V);
       SawSRet = true;
     }
 
+    if (Attrs.hasAttribute(Idx, Attribute::SwiftSelf)) {
+      Assert(!SawSwiftSelf, "Cannot have multiple 'swiftself' parameters!", V);
+      SawSwiftSelf = true;
+    }
+
     if (Attrs.hasAttribute(Idx, Attribute::InAlloca)) {
       Assert(Idx == FT->getNumParams(), "inalloca isn't on the last parameter!",
              V);
     }
   }
 
   if (!Attrs.hasAttributes(AttributeSet::FunctionIndex))
     return;
static bool isTypeCongruent(Type *L, Type *R) {
   if (!PL || !PR)
     return false;
   return PL->getAddressSpace() == PR->getAddressSpace();
 }
 
 static AttrBuilder getParameterABIAttributes(int I, AttributeSet Attrs) {
   static const Attribute::AttrKind ABIAttrs[] = {
       Attribute::StructRet, Attribute::ByVal, Attribute::InAlloca,
-      Attribute::InReg, Attribute::Returned};
+      Attribute::InReg, Attribute::Returned, Attribute::SwiftSelf};
   AttrBuilder Copy;
   for (auto AK : ABIAttrs) {
     if (Attrs.hasAttribute(I + 1, AK))
       Copy.addAttribute(AK);
   }
   if (Attrs.hasAttribute(I + 1, Attribute::Alignment))
     Copy.addAlignmentAttr(Attrs.getParamAlignment(I + 1));
   return Copy;

lib/Target/AArch64/AArch64CallingConvention.td

def CC_AArch64_DarwinPCS : CallingConv<[
 
   // An SRet is passed in X8, not X0 like a normal pointer parameter.
   CCIfSRet<CCIfType<[i64], CCAssignToRegWithShadow<[X8], [W8]>>>,
 
   // Put ByVal arguments directly on the stack. Minimum size and alignment of a
   // slot is 64-bit.
   CCIfByVal<CCPassByVal<8, 8>>,
 
+  // An SwiftSelf is passed in X9.
+  CCIfSwiftSelf<CCIfType<[i64], CCAssignToRegWithShadow<[X9], [W9]>>>,
+
   CCIfConsecutiveRegs<CCCustom<"CC_AArch64_Custom_Block">>,
 
   // Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers,
   // up to eight each of GPR and FPR.
   CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
   CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
                                           [X0, X1, X2, X3, X4, X5, X6, X7]>>,
   // i128 is split to two i64s, we can't fit half to register X7.

lib/Target/AArch64/AArch64FastISel.cpp

bool AArch64FastISel::fastLowerArguments() {
   unsigned FPRCnt = 0;
   unsigned Idx = 0;
   for (auto const &Arg : F->args()) {
     // The first argument is at index 1.
     ++Idx;
     if (F->getAttributes().hasAttribute(Idx, Attribute::ByVal) ||
         F->getAttributes().hasAttribute(Idx, Attribute::InReg) ||
         F->getAttributes().hasAttribute(Idx, Attribute::StructRet) ||
+        F->getAttributes().hasAttribute(Idx, Attribute::SwiftSelf) ||
         F->getAttributes().hasAttribute(Idx, Attribute::Nest))
       return false;
 
     Type *ArgTy = Arg.getType();
     if (ArgTy->isStructTy() || ArgTy->isArrayTy())
       return false;
 
     EVT ArgVT = TLI.getValueType(DL, ArgTy);
bool AArch64FastISel::fastLowerCall(CallLoweringInfo &CLI) {
   // FIXME: Only handle *simple* calls for now.
   MVT RetVT;
   if (CLI.RetTy->isVoidTy())
     RetVT = MVT::isVoid;
   else if (!isTypeLegal(CLI.RetTy, RetVT))
     return false;
 
   for (auto Flag : CLI.OutFlags)
-    if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal())
+    if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal() ||
+        Flag.isSwiftSelf())
       return false;
 
   // Set up the argument vectors.
   SmallVector<MVT, 16> OutVTs;
   OutVTs.reserve(CLI.OutVals.size());
 
   for (auto *Val : CLI.OutVals) {
     MVT VT;

lib/Target/ARM/ARMCallingConv.td

 //===----------------------------------------------------------------------===//
 def CC_ARM_APCS : CallingConv<[
 
   // Handles byval parameters.
   CCIfByVal<CCPassByVal<4, 4>>,
     
   CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
 
+  // An SwiftSelf is passed in R9.
+  CCIfSwiftSelf<CCIfType<[i32], CCAssignToReg<[R9]>>>,
+
   // Handle all vector types as either f64 or v2f64.
   CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
   CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
 
   // f64 and v2f64 are passed in adjacent GPRs, possibly split onto the stack
   CCIfType<[f64, v2f64], CCCustom<"CC_ARM_APCS_Custom_f64">>,
 
   CCIfType<[f32], CCBitConvertToType<i32>>,
def CC_ARM_AAPCS : CallingConv<[
 
   // The 'nest' parameter, if any, is passed in R12.
   CCIfNest<CCAssignToReg<[R12]>>,
 
   // Handle all vector types as either f64 or v2f64.
   CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
   CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
 
+  // An SwiftSelf is passed in R9.
+  CCIfSwiftSelf<CCIfType<[i32], CCAssignToReg<[R9]>>>,
+
   CCIfType<[f64, v2f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>,
   CCIfType<[f32], CCBitConvertToType<i32>>,
   CCDelegateTo<CC_ARM_AAPCS_Common>
 ]>;
 
 def RetCC_ARM_AAPCS : CallingConv<[
   // Handle all vector types as either f64 or v2f64.
   CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,

 def CC_ARM_AAPCS_VFP : CallingConv<[
   // Handles byval parameters.
   CCIfByVal<CCPassByVal<4, 4>>,
 
   // Handle all vector types as either f64 or v2f64.
   CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
   CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
 
+  // An SwiftSelf is passed in R9.
+  CCIfSwiftSelf<CCIfType<[i32], CCAssignToReg<[R9]>>>,
+
   // HFAs are passed in a contiguous block of registers, or on the stack
   CCIfConsecutiveRegs<CCCustom<"CC_ARM_AAPCS_Custom_Aggregate">>,
 
   CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
   CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
   CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
                                  S9, S10, S11, S12, S13, S14, S15]>>,
   CCDelegateTo<CC_ARM_AAPCS_Common>

lib/Target/ARM/ARMFastISel.cpp

for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
     if (CS.paramHasAttr(AttrInd, Attribute::SExt))
       Flags.setSExt();
     if (CS.paramHasAttr(AttrInd, Attribute::ZExt))
       Flags.setZExt();
 
     // FIXME: Only handle *easy* calls for now.
     if (CS.paramHasAttr(AttrInd, Attribute::InReg) ||
         CS.paramHasAttr(AttrInd, Attribute::StructRet) ||
+        CS.paramHasAttr(AttrInd, Attribute::SwiftSelf) ||
         CS.paramHasAttr(AttrInd, Attribute::Nest) ||
         CS.paramHasAttr(AttrInd, Attribute::ByVal))
       return false;
 
     Type *ArgTy = (*i)->getType();
     MVT ArgVT;
     if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8 &&
         ArgVT != MVT::i1)
bool ARMFastISel::fastLowerArguments() {
   unsigned Idx = 1;
   for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
        I != E; ++I, ++Idx) {
     if (Idx > 4)
       return false;
 
     if (F->getAttributes().hasAttribute(Idx, Attribute::InReg) ||
         F->getAttributes().hasAttribute(Idx, Attribute::StructRet) ||
+        F->getAttributes().hasAttribute(Idx, Attribute::SwiftSelf) ||
         F->getAttributes().hasAttribute(Idx, Attribute::ByVal))
       return false;
 
     Type *ArgTy = I->getType();
     if (ArgTy->isStructTy() || ArgTy->isArrayTy() || ArgTy->isVectorTy())
       return false;
 
     EVT ArgVT = TLI.getValueType(DL, ArgTy);

lib/Target/X86/X86CallingConv.td

def CC_X86_64_C : CallingConv<[
 
   // Promote i1/i8/i16 arguments to i32.
   CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
 
   // The 'nest' parameter, if any, is passed in R10.
   CCIfNest<CCIfSubtarget<"isTarget64BitILP32()", CCAssignToReg<[R10D]>>>,
   CCIfNest<CCAssignToReg<[R10]>>,
 
+  // An SwiftSelf is passed in R10.
+  CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10]>>>,
+
   // The first 6 integer arguments are passed in integer registers.
   CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
   CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
 
   // The first 8 MMX vector arguments are passed in XMM registers on Darwin.
   CCIfType<[x86mmx],
             CCIfSubtarget<"isTargetDarwin()",
             CCIfSubtarget<"hasSSE2()",

lib/Target/X86/X86FastISel.cpp

bool X86FastISel::fastLowerArguments() {
   unsigned FPRCnt = 0;
   unsigned Idx = 0;
   for (auto const &Arg : F->args()) {
     // The first argument is at index 1.
     ++Idx;
     if (F->getAttributes().hasAttribute(Idx, Attribute::ByVal) ||
         F->getAttributes().hasAttribute(Idx, Attribute::InReg) ||
         F->getAttributes().hasAttribute(Idx, Attribute::StructRet) ||
+        F->getAttributes().hasAttribute(Idx, Attribute::SwiftSelf) ||
         F->getAttributes().hasAttribute(Idx, Attribute::Nest))
       return false;
 
     Type *ArgTy = Arg.getType();
     if (ArgTy->isStructTy() || ArgTy->isArrayTy() || ArgTy->isVectorTy())
       return false;
 
     EVT ArgVT = TLI.getValueType(DL, ArgTy);

test/Bitcode/swiftself.ll

+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
+
+define void @test(i8* swiftself)
+; CHECK: define void @test(i8* swiftself)
+{
+        ret void;
+}

test/CodeGen/AArch64/swiftself.ll

+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-apple-ios | FileCheck --check-prefix=CHECK-APPLE %s
+; RUN: llc -O0 -verify-machineinstrs < %s -mtriple=aarch64-apple-ios | FileCheck --check-prefix=CHECK-O0 %s
+
+; Parameter with swiftself should be allocated to x9.
+define void @check_swiftself(i32* swiftself %addr0) {
+; CHECK-APPLE-LABEL: check_swiftself:
+; CHECK-O0-LABEL: check_swiftself:
+
+    %val0 = load volatile i32, i32* %addr0
+; CHECK-APPLE: ldr w{{.*}}, [x9]
+; CHECK-O0: ldr w{{.*}}, [x9]
+    ret void
+}
+
+@var8_3 = global i8 0
+declare void @take_swiftself(i8* swiftself %addr0)
+
+define void @simple_args() {
+; CHECK-APPLE-LABEL: simple_args:
+; CHECK-O0-LABEL: simple_args:
+
+  call void @take_swiftself(i8* @var8_3)
+; CHECK-APPLE: add x9,
+; CHECK-APPLE: bl {{_?}}take_swiftself
+; CHECK-O0: add x9,
+; CHECK-O0: bl {{_?}}take_swiftself
+
+  ret void
+}

test/CodeGen/ARM/swiftself.ll

+; RUN: llc -verify-machineinstrs < %s -mtriple=armv7k-apple-ios8.0 -mcpu=cortex-a7 | FileCheck --check-prefix=CHECK-APPLE %s
+; RUN: llc -O0 -verify-machineinstrs < %s -mtriple=armv7k-apple-ios8.0 -mcpu=cortex-a7 | FileCheck --check-prefix=CHECK-O0 %s
+
+; RUN: llc -verify-machineinstrs < %s -mtriple=armv7-apple-ios | FileCheck --check-prefix=CHECK-APPLE %s
+; RUN: llc -O0 -verify-machineinstrs < %s -mtriple=armv7-apple-ios | FileCheck --check-prefix=CHECK-O0 %s
+
+; Parameter with swiftself should be allocated to r9.
+define void @check_swiftself(i32* swiftself %addr0) {
+; CHECK-APPLE-LABEL: check_swiftself:
+; CHECK-O0-LABEL: check_swiftself:
+
+    %val0 = load volatile i32, i32* %addr0
+; CHECK-APPLE: ldr r{{.*}}, [r9]
+; CHECK-O0: ldr r{{.*}}, [r9]
+    ret void
+}
+
+@var8_3 = global i8 0
+declare void @take_swiftself(i8* swiftself %addr0)
+
+define void @simple_args() {
+; CHECK-APPLE-LABEL: simple_args:
+; CHECK-O0-LABEL: simple_args:
+
+  call void @take_swiftself(i8* @var8_3)
+; CHECK-APPLE: add r9, pc
+; CHECK-APPLE: bl {{_?}}take_swiftself
+; CHECK-O0: add r9, pc
+; CHECK-O0: bl {{_?}}take_swiftself
+
+  ret void
+}

test/CodeGen/X86/swiftself.ll

+; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -O0 -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-O0 %s
+; RUN: llc -verify-machineinstrs < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck --check-prefix=CHECK-i386 %s
+; RUN: llc -O0 -verify-machineinstrs < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck --check-prefix=CHECK-i386-O0 %s
+
+; Parameter with swiftself should be allocated to r10.
+define void @check_swiftself(i32* swiftself %addr0) {
+; CHECK-LABEL: check_swiftself:
+; CHECK-O0-LABEL: check_swiftself:
+; CHECK-i386-LABEL: check_swiftself:
+; CHECK-i386-O0-LABEL: check_swiftself:
+
+  %val0 = load volatile i32, i32* %addr0
+; CHECK: movl (%r10),
+; CHECK-O0: movl (%r10),
+; CHECK-i386: movl {{[0-9a-f]+}}(%esp)
+; CHECK-i386-O0: movl {{[0-9a-f]+}}(%esp)
+  ret void
+}
+
+@var8_3 = global i8 0
+declare void @take_swiftself(i8* swiftself %addr0)
+
+define void @simple_args() {
+; CHECK-LABEL: simple_args:
+; CHECK-O0-LABEL: simple_args:
+; CHECK-i386-LABEL: simple_args:
+; CHECK-i386-O0-LABEL: simple_args:
+
+  call void @take_swiftself(i8* @var8_3)
+; CHECK: movl {{.*}}, %r10d
+; CHECK: callq {{_?}}take_swiftself
+; CHECK-O0: movabsq {{.*}}, %r10
+; CHECK-O0: callq {{_?}}take_swiftself
+; CHECK-i386: movl {{.*}}, (%esp)
+; CHECK-i386: calll {{.*}}take_swiftself
+; CHECK-i386-O0: movl {{.*}}, (%esp)
+; CHECK-i386-O0: calll {{.*}}take_swiftself
+
+  ret void
+}

test/Verifier/swiftself.ll

+; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
+
+declare void @a(i32* swiftself %a, i32* swiftself %b)
+; CHECK: Cannot have multiple 'swiftself' parameters!