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[X86][AVX] Better support for the variable mask form of VPERMILPD/VPERMILPS
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Authored by RKSimon on Feb 27 2016, 5:27 AM.

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Summary

The variable mask form of VPERMILPD/VPERMILPS were only partially implemented, with much of it still performed as an intrinsic.

This patch properly defines the instructions in terms of X86ISD::VPERMILPV, permitting the opcode to be easily combined as a target shuffle.

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rL LLVM

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RKSimon updated this revision to Diff 49294.Feb 27 2016, 5:27 AM
RKSimon retitled this revision from to [X86][AVX] Better support for the variable mask form of VPERMILPD/VPERMILPS.
RKSimon updated this object.
RKSimon added reviewers: qcolombet, ab, andreadb, spatel.
RKSimon set the repository for this revision to rL LLVM.
RKSimon added a subscriber: llvm-commits.
ab edited edge metadata.Feb 29 2016, 4:53 PM

This has the same problem as VPERMV, so probably needs to wait for D17041?

lib/Target/X86/X86IntrinsicsInfo.h
332 ↗(On Diff #49294)

Maybe align the columns?

In D17681#364823, @ab wrote:

This has the same problem as VPERMV, so probably needs to wait for D17041?

I think variable mask VPERMILPS does have the 'normal' order (mask at the end) but I'm happy to wait until D17041 is dealt with.

lib/Target/X86/X86IntrinsicsInfo.h
332 ↗(On Diff #49294)

No problem.

ab accepted this revision.Mar 1 2016, 2:47 PM
ab edited edge metadata.
In D17681#364823, @ab wrote:

This has the same problem as VPERMV, so probably needs to wait for D17041?

I think variable mask VPERMILPS does have the 'normal' order (mask at the end) but I'm happy to wait until D17041 is dealt with.

Sorry, you're right.

LGTM!

This revision is now accepted and ready to land.Mar 1 2016, 2:47 PM
This revision was automatically updated to reflect the committed changes.