Consider regmasks when computing register-based DBG_VALUE live ranges

[rnk]

Summary

Now register parameters that aren't saved to the stack or CSRs are
considered dead after the first call. Previously the debugger would show
whatever was in the register.

Fixes PR26589

[aprantl]

Couple of high-level comments; still need to look at the actual changes.

test/DebugInfo/MIR/X86/live-debug-values.mir

37

Could you explain this change?
Was the original just wrong, or is there a different DBG_VALUE to check for now?

test/DebugInfo/X86/dbg-value-regmask-clobber.ll

3

We should consider rewriting this as a MIR testcase (http://llvm.org/docs/MIRLangRef.html).
(It might be easier to understand the testcase if we can see the DBG_VALUEs that are the input for DbgValueHistoryCalulator.)

70

We often strip all irrelevant attributes (~everything in quotes) from testcases.

[aprantl]

lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp

165

Together with the code, could you also inline the relevant bits of the doxygen comment?
Would be nice to have a line describing each case in the if-statement.

195

same here. More comments appreciated.

lib/CodeGen/LiveDebugValues.cpp

229

typo :-)

test/DebugInfo/X86/array.ll

19

Is there a place in the LLVM sources we could move/clone this comment to?

[rnk]

test/DebugInfo/MIR/X86/live-debug-values.mir

37

The original check was wrong. This BB is after the call to 'change', and it is claiming that 'argv' is still live in RSI, which is not true. There aren't any other DBG_VALUEs in this block.

test/DebugInfo/X86/array.ll

19

It would be somewhere in the interaction between the register allocator and live debug variables. In other words, I have very little idea. =/

test/DebugInfo/X86/dbg-value-regmask-clobber.ll

3

The IR testcase helped discover that I needed to update the LiveDebugValues pass, though. This feels like a pretty targeted IR test case for the backend: four basic blocks, some stores, one call. I guess I'd rather leave it as it is or have both tests. WDYT?

[rnk]

• Address Adrian's comments

[aprantl]

test/DebugInfo/X86/dbg-value-regmask-clobber.ll

80

What happened to those backslashes? Frontend bug, or are they supposed to be encoded this way?

[aprantl]

Couple more formatting issues, but otherwise this looks plausible. Thanks!

lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp

160–170

continue; to reduce nesting?

168

So a RegMask means everything outside the mask is clobbered -
probably doesn't hurt to add a comment?

170

we can at least get rid of the innermost {} of those 6 nesting levels :-)

191

"clobber some debug values" sounds funny :-)

195

thanks!

lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp

 #include "DbgValueHistoryCalculator.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/IR/DebugInfo.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
 #include <algorithm>
 #include <map>
 using namespace llvm;
 
 #define DEBUG_TYPE "dwarfdebug"
 
 // \brief If @MI is a DBG_VALUE with debug value described by a
 // defined register, returns the number of this register.
static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
                                 DbgValueHistoryMap &HistMap,
                                 const MachineInstr &ClobberingInstr) {
   const auto &I = RegVars.find(RegNo);
   if (I == RegVars.end())
     return;
   clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
 }
 
-// \brief Collect all registers clobbered by @MI and apply the functor
-// @Func to their RegNo.
-// @Func should be a functor with a void(unsigned) signature. We're
-// not using std::function here for performance reasons. It has a
-// small but measurable impact. By using a functor instead of a
-// std::set& here, we can avoid the overhead of constructing
-// temporaries in calculateDbgValueHistory, which has a significant
-// performance impact.
-template<typename Callable>
-static void applyToClobberedRegisters(const MachineInstr &MI,
-                                      const TargetRegisterInfo *TRI,
-                                      Callable Func) {
-  for (const MachineOperand &MO : MI.operands()) {
-    if (!MO.isReg() || !MO.isDef() || !MO.getReg())
-      continue;
-    for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
-      Func(*AI);
-  }
-}
-
 // \brief Returns the first instruction in @MBB which corresponds to
 // the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
 static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
   auto LastMI = MBB.getLastNonDebugInstr();
   if (LastMI == MBB.end() || !LastMI->isReturn())
     return nullptr;
   // Assume that epilogue starts with instruction having the same debug location
   // as the return instruction.
static void collectChangingRegs(const MachineFunction *MF,
                                 const TargetRegisterInfo *TRI,
                                 BitVector &Regs) {
   for (const auto &MBB : *MF) {
     auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
 
     for (const auto &MI : MBB) {
       if (&MI == FirstEpilogueInst)
         break;
-      if (!MI.getFlag(MachineInstr::FrameSetup))
-        applyToClobberedRegisters(MI, TRI, [&](unsigned r) { Regs.set(r); });
+      if (!MI.getFlag(MachineInstr::FrameSetup)) {
+        for (const MachineOperand &MO : MI.operands()) {
+          if (MO.isReg() && MO.isDef() && MO.getReg()) {
+            for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
+                 ++AI)
+              Regs.set(*AI);
+          } else if (MO.isRegMask()) {
+            Regs.setBitsNotInMask(MO.getRegMask());
+          }
+        }
+      }
     }
   }
 }
 
 void llvm::calculateDbgValueHistory(const MachineFunction *MF,
                                     const TargetRegisterInfo *TRI,
                                     DbgValueHistoryMap &Result) {
   BitVector ChangingRegs(TRI->getNumRegs());
   collectChangingRegs(MF, TRI, ChangingRegs);
 
+  const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
+  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
   RegDescribedVarsMap RegVars;
   for (const auto &MBB : *MF) {
     for (const auto &MI : MBB) {
       if (!MI.isDebugValue()) {
         // Not a DBG_VALUE instruction. It may clobber registers which describe
         // some variables.
-        applyToClobberedRegisters(MI, TRI, [&](unsigned RegNo) {
-          if (ChangingRegs.test(RegNo))
-            clobberRegisterUses(RegVars, RegNo, Result, MI);
-        });
+        for (const MachineOperand &MO : MI.operands()) {
+          if (MO.isReg() && MO.isDef() && MO.getReg()) {
+            for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
+                 ++AI)
+              if (ChangingRegs.test(*AI))
+                clobberRegisterUses(RegVars, *AI, Result, MI);
+          } else if (MO.isRegMask()) {
+            for (int I = ChangingRegs.find_first(); I != -1;
+                 I = ChangingRegs.find_next(I)) {
+              // Don't consider SP to be clobbered by register masks.
+              if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
+                  MO.clobbersPhysReg(I)) {
+                clobberRegisterUses(RegVars, I, Result, MI);
+              }
+            }
+          }
+        }
         continue;
       }
 
       assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
       // Use the base variable (without any DW_OP_piece expressions)
       // as index into History. The full variables including the
       // piece expressions are attached to the MI.
       const DILocalVariable *RawVar = MI.getDebugVariable();

lib/CodeGen/LiveDebugValues.cpp

 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
 #include <queue>
 #include <list>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "live-debug-values"
if (isDescribedByReg(MI)) {
     VarLoc V(Var, &MI);
     OpenRanges.push_back(std::move(V));
   }
 }
 
 /// A definition of a register may mark the end of a range.
 void LiveDebugValues::transferRegisterDef(MachineInstr &MI,
                                           VarLocList &OpenRanges) {
+  MachineFunction *MF = MI.getParent()->getParent();
+  const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
+  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
   for (const MachineOperand &MO : MI.operands()) {
-    if (!(MO.isReg() && MO.isDef() && MO.getReg() &&
-          TRI->isPhysicalRegister(MO.getReg())))
-      continue;
+    if (MO.isReg() && MO.isDef() && MO.getReg() &&
+        TRI->isPhysicalRegister(MO.getReg())) {
       // Remove ranges of all aliased registers.
       for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI)
         OpenRanges.erase(std::remove_if(OpenRanges.begin(), OpenRanges.end(),
                                         [&](const VarLoc &V) {
                                           return (*RAI ==
                                                   isDescribedByReg(*V.MI));
                                         }),
                          OpenRanges.end());
+    } else if (MO.isRegMask()) {
+      // Remove ranges of all clobbered registers. Register masks don't usually
+      // list SP as preserved.  While the debug info may be off for an
+      // instruction or two around callee-cleanup calls, tranfering the
+      // DEBUG_VALUE across the call is still a better user experience.
+      OpenRanges.erase(std::remove_if(OpenRanges.begin(), OpenRanges.end(),
+                                      [&](const VarLoc &V) {
+                                        unsigned Reg = isDescribedByReg(*V.MI);
+                                        return Reg && Reg != SP &&
+                                               MO.clobbersPhysReg(Reg);
+                                      }),
+                       OpenRanges.end());
+    }
   }
 }
 
 /// Terminate all open ranges at the end of the current basic block.
 bool LiveDebugValues::transferTerminatorInst(MachineInstr &MI,
                                              VarLocList &OpenRanges,
                                              VarLocInMBB &OutLocs) {
   bool Changed = false;

test/DebugInfo/MIR/X86/live-debug-values.mir

 # This case will also produce multiple locations but only the debug range
 # extension is tested here. This test case is tested with DWARF information under
 # llvm/test/DebugInfo/live-debug-values.ll and present here for testing under
 # MIR->MIR serialization.
 
 # DBG_VALUE for variable "n" is extended into BB#5 from its predecessors BB#3
 # and BB#4.
 # CHECK:      bb.5.if.end.7:
-# CHECK:      DBG_VALUE debug-use %rsi, debug-use _, !13, !20, debug-location !22
-# CHECK-NEXT: DBG_VALUE debug-use %ebx, debug-use _, !14, !20, debug-location !33
+# CHECK:        DBG_VALUE debug-use %ebx, debug-use _, !14, !20, debug-location !33
 
 
 --- |
   ; ModuleID = 'live-debug-values.ll'
   target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
   
   @m = common global i32 0, align 4

test/DebugInfo/Mips/dsr-fixed-objects.ll

 ;   return x;
 ; }
 
 declare void @llvm.lifetime.start(i64, i8* nocapture)
 declare void @llvm.lifetime.end(i64, i8* nocapture)
 
 declare void @foo(i32*)
 
-; F0: DW_AT_location [DW_FORM_sec_offset]   (0x00000014)
-; F0: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
+; F0: .debug_info contents:
+; F0:   DW_TAG_subprogram
+; F0:     DW_AT_name [DW_FORM_strp]       {{.*}} "f0"
+; F0: DW_TAG_variable
+; F0-NEXT: DW_AT_location [DW_FORM_sec_offset]   ([[loc_offset:0x.*]])
+; F0-NEXT: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
 ;
 ; x -> DW_OP_reg1(51)
-; F0: 0x00000014: Beginning address offset: 0x0000000000000028
-; F0:                Ending address offset: 0x0000000000000030
-; F0:                 Location description: 51
+; F0: [[loc_offset]]: Beginning address offset: 0x0000000000000028
+; F0:                    Ending address offset: 0x0000000000000030
+; F0:                     Location description: 51
 
 define i32 @f0(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !4 {
 entry:
   %x = alloca i32, align 4
   tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !9,  metadata !DIExpression()), !dbg !27
   tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !10, metadata !DIExpression()), !dbg !28
   tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !11, metadata !DIExpression()), !dbg !29
   tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !12, metadata !DIExpression()), !dbg !30
entry:
   tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !14, metadata !26), !dbg !37
   call void @foo(i32* nonnull %x) #4, !dbg !42
   call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !14, metadata !26), !dbg !37
   %1 = load i32, i32* %x, align 4, !dbg !43, !tbaa !38
   call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !44
   ret i32 %1, !dbg !45
 }
 
-
-; F1: DW_AT_location [DW_FORM_sec_offset]   (0x00000033)
-; F1: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
+; F1: .debug_info contents:
+; F1:   DW_TAG_subprogram
+; F1:     DW_AT_name [DW_FORM_strp]       {{.*}} "f0"
+; F1:   DW_TAG_subprogram
+; F1:     DW_AT_name [DW_FORM_strp]       {{.*}} "f1"
+; F1: DW_TAG_variable
+; F1-NEXT: DW_AT_location [DW_FORM_sec_offset]   ([[loc_offset:0x.*]])
+; F1-NEXT: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
 
 ; x -> DW_OP_reg1(51)
-; F1: 0x00000033: Beginning address offset: 0x0000000000000080
-; F1:                Ending address offset: 0x0000000000000088
-; F1:                 Location description: 51
+; F1:      [[loc_offset]]: Beginning address offset: 0x0000000000000080
+; F1-NEXT:                    Ending address offset: 0x0000000000000088
+; F1-NEXT:                     Location description: 51
 
 define i32 @f1(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !15 {
 entry:
   %x = alloca i32, align 16
   tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !17, metadata !DIExpression()), !dbg !46
   tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !18, metadata !DIExpression()), !dbg !47
   tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !19, metadata !DIExpression()), !dbg !48
   tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !20, metadata !DIExpression()), !dbg !49

test/DebugInfo/X86/array.ll

 ;   f(array);
 ;   return array[0];
 ; }
 ;
 ; RUN: llc -filetype=asm %s -o - | FileCheck %s
 ; Test that we only emit register-indirect locations for the array array.
 ; rdar://problem/14874886
 ;
-; CHECK:     ##DEBUG_VALUE: main:array <- [%R{{.*}}+0]
-; CHECK:     ##DEBUG_VALUE: main:array <- [%R{{.*}}+0]
-; CHECK:     ##DEBUG_VALUE: main:array <- [%R{{.*}}+0]
+; FIXME: If we described this location as RSP-relative instead of RDI-relative
+; the live range would be larger.
+; CHECK:     ##DEBUG_VALUE: main:array <- [%RDI+0]
 ; CHECK-NOT: ##DEBUG_VALUE: main:array <- %R{{.*}}
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"
 
 @main.array = private unnamed_addr constant [4 x i32] [i32 0, i32 1, i32 2, i32 3], align 16
 
 ; Function Attrs: nounwind ssp uwtable
 define void @f(i32* nocapture %p) #0 !dbg !4 {

test/DebugInfo/X86/bbjoin.ll

 ; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \
 ; RUN:   -o %t.s | FileCheck %s
 ; Generated from:
 ; void g(int *);
 ; int f() {
 ;   int x = 23;
 ;   g(&x);
 ;   if (x == 42)
 ;     ++x;
 ;   return x; // check that x is not a constant here.
 ; }
 ; CHECK: ![[X:.*]] = !DILocalVariable(name: "x",
 ; CHECK: bb.0.entry:
 ; CHECK:   DBG_VALUE 23, 0, ![[X]],
 ; CHECK:   DBG_VALUE debug-use %rdi, debug-use _, ![[X]]
 ; CHECK: bb.1.if.then:
-; CHECK:   DBG_VALUE debug-use %rdi, debug-use _, ![[X]],
+; CHECK:   DBG_VALUE 43, 0, ![[X]],
 ; CHECK: bb.2.if.end:
 ; CHECK-NOT:  DBG_VALUE 23, 0, ![[X]],
 ; CHECK:   RETQ %eax
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.11.0"
 
 ; Function Attrs: nounwind ssp uwtable

test/DebugInfo/X86/dbg-value-regmask-clobber.ll

+; RUN: llc < %s | FileCheck %s --check-prefix=ASM
+; RUN: llc < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s --check-prefix=DWARF
+
+; Values in registers should be clobbered by calls, which use a regmask instead
+; of individual register def operands.
+
+; ASM: main: # @main
+; ASM: #DEBUG_VALUE: main:argc <- %ECX
+; ASM: movl $1, x(%rip)
+; ASM: callq clobber
+; ASM-NEXT: [[argc_range_end:.Ltmp[0-9]+]]:
+; Previously LiveDebugValues would claim argc was still in ECX after the call.
+; ASM-NOT: #DEBUG_VALUE: main:argc
+
+; argc is the first debug location.
+; ASM: .Ldebug_loc1:
+; ASM-NEXT: .quad   .Lfunc_begin0-.Lfunc_begin0
+; ASM-NEXT: .quad   [[argc_range_end]]-.Lfunc_begin0
+; ASM-NEXT: .short  3                       # Loc expr size
+; ASM-NEXT: .byte   82                      # super-register DW_OP_reg2
+; ASM-NEXT: .byte   147                     # DW_OP_piece
+; ASM-NEXT: .byte   4                       # 4
+
+; argc is the first formal parameter.
+; DWARF: .debug_info contents:
+; DWARF:  DW_TAG_formal_parameter
+; DWARF-NEXT:    DW_AT_location [DW_FORM_sec_offset]   ([[argc_loc_offset:0x.*]])
+; DWARF-NEXT:    DW_AT_name [DW_FORM_strp]     {{.*}} "argc"
+
+; DWARF: .debug_loc contents:
+; DWARF: [[argc_loc_offset]]: Beginning address offset: 0x0000000000000000
+; DWARF-NEXT:                    Ending address offset: 0x0000000000000013
+; DWARF-NEXT:                     Location description: 52 93 04
+
+; ModuleID = 't.cpp'
+target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-windows-msvc18.0.0"
+
+@x = common global i32 0, align 4
+
+; Function Attrs: nounwind uwtable
+define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 !dbg !4 {
+entry:
+  tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !12, metadata !21), !dbg !22
+  tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !13, metadata !21), !dbg !23
+  store volatile i32 1, i32* @x, align 4, !dbg !24, !tbaa !25
+  tail call void @clobber() #3, !dbg !29
+  store volatile i32 2, i32* @x, align 4, !dbg !30, !tbaa !25
+  %0 = load volatile i32, i32* @x, align 4, !dbg !31, !tbaa !25
+  %tobool = icmp eq i32 %0, 0, !dbg !31
+  br i1 %tobool, label %if.else, label %if.then, !dbg !33
+
+if.then:                                          ; preds = %entry
+  store volatile i32 3, i32* @x, align 4, !dbg !34, !tbaa !25
+  br label %if.end, !dbg !36
+
+if.else:                                          ; preds = %entry
+  store volatile i32 4, i32* @x, align 4, !dbg !37, !tbaa !25
+  br label %if.end
+
+if.end:                                           ; preds = %if.else, %if.then
+  ret i32 0, !dbg !39
+}
+
+declare void @clobber() #1
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
+
+attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #2 = { nounwind readnone }
+attributes #3 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!17, !18, !19}
+!llvm.ident = !{!20}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.9.0 (trunk 260617) (llvm/trunk 260619)", isOptimized: true, runtimeVersion: 0, emissionKind: 1, enums: !2, subprograms: !3, globals: !14)
+!1 = !DIFile(filename: "t.cpp", directory: "D:\5Csrc\5Cllvm\5Cbuild")
+!2 = !{}
+!3 = !{!4}
+!4 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 4, type: !5, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: true, variables: !11)
+!5 = !DISubroutineType(types: !6)
+!6 = !{!7, !7, !8}
+!7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
+!8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 64, align: 64)
+!9 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !10, size: 64, align: 64)
+!10 = !DIBasicType(name: "char", size: 8, align: 8, encoding: DW_ATE_signed_char)
+!11 = !{!12, !13}
+!12 = !DILocalVariable(name: "argv", arg: 2, scope: !4, file: !1, line: 4, type: !8)
+!13 = !DILocalVariable(name: "argc", arg: 1, scope: !4, file: !1, line: 4, type: !7)
+!14 = !{!15}
+!15 = !DIGlobalVariable(name: "x", scope: !0, file: !1, line: 1, type: !16, isLocal: false, isDefinition: true, variable: i32* @x)
+!16 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !7)
+!17 = !{i32 2, !"Dwarf Version", i32 4}
+!18 = !{i32 2, !"Debug Info Version", i32 3}
+!19 = !{i32 1, !"PIC Level", i32 2}
+!20 = !{!"clang version 3.9.0 (trunk 260617) (llvm/trunk 260619)"}
+!21 = !DIExpression()
+!22 = !DILocation(line: 4, column: 27, scope: !4)
+!23 = !DILocation(line: 4, column: 14, scope: !4)
+!24 = !DILocation(line: 5, column: 5, scope: !4)
+!25 = !{!26, !26, i64 0}
+!26 = !{!"int", !27, i64 0}
+!27 = !{!"omnipotent char", !28, i64 0}
+!28 = !{!"Simple C/C++ TBAA"}
+!29 = !DILocation(line: 6, column: 3, scope: !4)
+!30 = !DILocation(line: 7, column: 5, scope: !4)
+!31 = !DILocation(line: 8, column: 7, scope: !32)
+!32 = distinct !DILexicalBlock(scope: !4, file: !1, line: 8, column: 7)
+!33 = !DILocation(line: 8, column: 7, scope: !4)
+!34 = !DILocation(line: 9, column: 7, scope: !35)
+!35 = distinct !DILexicalBlock(scope: !32, file: !1, line: 8, column: 10)
+!36 = !DILocation(line: 10, column: 3, scope: !35)
+!37 = !DILocation(line: 11, column: 7, scope: !38)
+!38 = distinct !DILexicalBlock(scope: !32, file: !1, line: 10, column: 10)
+!39 = !DILocation(line: 13, column: 1, scope: !4)

test/DebugInfo/X86/debug-loc-asan.ll

 ; with "clang++ -S -emit-llvm -mllvm -asan-skip-promotable-allocas=0 -fsanitize=address -O0 -g test.cc"
 
 ; The address of the (potentially now malloc'ed) alloca ends up
 ; in RDI, after which it is spilled to the stack. We record the
 ; spill OFFSET on the stack for checking the debug info below.
 ; CHECK: #DEBUG_VALUE: bar:y <- [%RDI+0]
 ; CHECK: movq %rdi, [[OFFSET:[0-9]+]](%rsp)
 ; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
+; CHECK-NEXT: #DEBUG_VALUE: bar:y <- [complex expression]
 ; This location should be valid until the end of the function.
 
+; CHECK:        movq    %rbp, %rsp
+; CHECK-NEXT: [[END_LABEL:.Ltmp[0-9]+]]:
+
 ; CHECK: .Ldebug_loc{{[0-9]+}}:
 ; We expect two location ranges for the variable.
 
 ; First, its address is stored in %rdi:
 ; CHECK:      .quad .Lfunc_begin0-.Lfunc_begin0
 ; CHECK-NEXT: .quad [[START_LABEL]]-.Lfunc_begin0
 ; CHECK: DW_OP_breg5
 
 ; Then it's addressed via %rsp:
 ; CHECK:      .quad [[START_LABEL]]-.Lfunc_begin0
-; CHECK-NEXT: .Lfunc_end0-.Lfunc_begin0
+; CHECK-NEXT: .quad [[END_LABEL]]-.Lfunc_begin0
 ; CHECK: DW_OP_breg7
 ; CHECK-NEXT: [[OFFSET]]
 ; CHECK: DW_OP_deref
 
 ; ModuleID = 'test.cc'
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 

test/DebugInfo/X86/live-debug-values.ll

 ; with clang -g -O3 -emit-llvm -c LiveDebugValues.c -S -o live-debug-values.ll
 ; This case will also produce multiple locations but only the debug range
 ; extension is tested here.
 
 ; DBG_VALUE for variable "n" is extended into BB#5 from its predecessors BB#3
 ; and BB#4.
 ; CHECK:       .LBB0_5:
 ; CHECK-NEXT:  #DEBUG_VALUE: main:n <- %EBX
-; CHECK-NEXT:  #DEBUG_VALUE: main:argv <- %RSI
+;   Other register values have been clobbered.
+; CHECK-NOT:   #DEBUG_VALUE:
+; CHECK:         movl    %ecx, m(%rip)
 
 ; ModuleID = 'LiveDebugValues.c'
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 @m = common global i32 0, align 4
 @.str = private unnamed_addr constant [13 x i8] c"m(main): %d\0A\00", align 1
 

test/DebugInfo/X86/pr19307.ll

 ; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
 
 ; Generated from the source file pr19307.cc:
 ; #include <string>
 ; void parse_range(unsigned long long &offset, unsigned long long &limit,
 ;                  std::string range) {
 ;   if (range.compare(0, 6, "items=") != 0 || range[6] == '-')
 ;     offset = 1;
 ;   range.erase(0, 6);
 ;   limit = 2;
 ; }
 ; with "clang++ -S -emit-llvm -O0 -g pr19307.cc"
 
 ; Location of "range" string is spilled from %rdx to stack and is
 ; addressed via %rbp.
 ; CHECK: movq %rdx, {{[-0-9]+}}(%rbp)
-; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
+; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]:
 ; This location should be valid until the end of the function.
 
 ; Verify that we have proper range in debug_loc section:
 ; CHECK: .Ldebug_loc{{[0-9]+}}:
 ; CHECK: DW_OP_breg1
 ; CHECK:      .quad [[START_LABEL]]-.Lfunc_begin0
 ; CHECK-NEXT: .quad .Lfunc_end0-.Lfunc_begin0
 ; CHECK: DW_OP_breg6

test/DebugInfo/X86/subregisters.ll

 ; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t.o -filetype=obj -O0
 ; RUN: llvm-dwarfdump %t.o | FileCheck %s
 ;
 ; Test that on x86_64, the 32-bit subregister esi is emitted as
 ; DW_OP_piece 32 of the 64-bit rsi.
 ;
 ; rdar://problem/16015314
 ;
-; CHECK:  DW_AT_location [DW_FORM_block1]       (<0x03> 54 93 04 )
-; CHECK:  DW_AT_name [DW_FORM_strp]{{.*}} "a"
+; CHECK: DW_TAG_variable
+; CHECK:  DW_AT_location [DW_FORM_data4]       (0x00000000)
+; CHECK-NEXT:  DW_AT_name [DW_FORM_strp]{{.*}} "a"
+;
+; CHECK: .debug_loc contents:
+; CHECK: 0x00000000: Beginning address offset: 0x0000000000000002
+; CHECK:                Ending address offset: 0x0000000000000014
+; CHECK:                 Location description: 54 93 04
 ;
 ; struct bar {
 ;   int a;
 ;   int b;
 ; };
 ;
 ; void doSomething() __attribute__ ((noinline));
 ;