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[lldb][AArch64] Add testing for SME's ZA and SVG registers

Authored by DavidSpickett on Sep 12 2023, 4:49 AM.



An SME enabled program has the following extra state:

  • Streaming mode or non-streaming mode.
  • ZA enabled or disabled.
  • The active vector length.

Covering the transition between all possible states and all other
possible states is not viable, therefore the testing added here is a cross
section of that, all of which found real bugs in LLDB and the Linux
Kernel during development.

Many of those transitions will not be possible via LLDB
(e.g. disabling ZA) and many more are possible but unlikely to be
used in normal use.

Added testing:

  • TestSVEThreadedDynamic now checks for correct SVG values.
  • New test TestZAThreadedDynamic creates 3 threads with different ZA sizes and states and switches between them verifying the register value (derived from the existing threaded SVE test).
  • New test TestZARegisterSaveRestore starts in a given SME state, runs a set of expressions in various orders, then checks that the original state has been restored.
  • TestArm64DynamicRegsets has ZA and SVG checks added, including writing to ZA to enable it.

Running these tests will as usual require QEMU as there is no
real SME hardware available at this time, and a very recent

Diff Detail

Event Timeline

DavidSpickett created this revision.Sep 12 2023, 4:49 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 12 2023, 4:49 AM
DavidSpickett requested review of this revision.Sep 12 2023, 4:50 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 12 2023, 4:50 AM

This patch requires rebasing does not apply cleanly on top of its parent.

Should all be updated now.

Rebase after changes to previous patch to arm64 regsets test.

Update tests now that ZA is part of SME register set.

Reformat changes with black.

I'll hold off landing any of the prior patches until this is reviewed, in case I have to go back and move things.

omjavaid added inline comments.Sep 19 2023, 12:49 AM

How can we differentiate between disabled ZA (read as all zeros) and enabled ZA actually set to all zeros?


is there a reference somewhere in clang or gcc documentation for USE_SSVE flag?


is USE_SSVE a subset of sve+sme?

DavidSpickett added inline comments.Sep 19 2023, 1:01 AM

In this specific test we write a non-zero value to avoid that issue, but I assume you mean generally.

The user should refer to the SVCR register, SVCR.ZA specifically, to know if the value they're seeing is the active ZA or not. You can see an example of that if you look at the changes to this file in

Again, the user has to know what bit to look for but I'll eventually address that with the register fields work.


It's a define I made up for the purposes of the test, it's in the existing tests but not well documented. I'll push something to address that in the existing tests and check the new ones here for this and other defines I've added.

We need sve to update sve registers and sme to be able to move into the za register (/the rows of the za register).

DavidSpickett marked 2 inline comments as done.Sep 19 2023, 1:59 AM
DavidSpickett added inline comments.

USE_SSVE and friends are just defines -D... made up for specific tests.

omjavaid accepted this revision.Sep 19 2023, 3:03 AM

this looks good


Is this a kernel requirement or just the way ptrace is implemented.?

This revision is now accepted and ready to land.Sep 19 2023, 3:03 AM
DavidSpickett added inline comments.Sep 19 2023, 3:15 AM

It's an architecture decision, I'll clarify the comment.

Clarify comment about SIGILL from inactive ZA.

Fix some leftover clang-format issues.

DavidSpickett marked an inline comment as done.Sep 19 2023, 3:18 AM

Fix some python formatting.