[AMDGPU] Move add64/sub64 to VALU

[rampitec]

Summary

This is NFCI as far as I can tell, but I see no reason not to do it.

[arsenm]

Is this even reachable?

[rampitec]

In D159077#4624459, @arsenm wrote:

Is this even reachable?

I did not succeed to write a test reaching this.

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
   MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
   unsigned Opcode = Inst.getOpcode();
   unsigned NewOpcode = getVALUOp(Inst);
   // Handle some special cases
   switch (Opcode) {
   default:
     break;
   case AMDGPU::S_ADD_U64_PSEUDO:
+    NewOpcode = AMDGPU::V_ADD_U64_PSEUDO;
+    break;
   case AMDGPU::S_SUB_U64_PSEUDO:
-    splitScalar64BitAddSub(Worklist, Inst, MDT);
-    Inst.eraseFromParent();
-    return;
+    NewOpcode = AMDGPU::V_SUB_U64_PSEUDO;
+    break;
   case AMDGPU::S_ADD_I32:
   case AMDGPU::S_SUB_I32: {
     // FIXME: The u32 versions currently selected use the carry.
     bool Changed;
     MachineBasicBlock *CreatedBBTmp = nullptr;
     std::tie(Changed, CreatedBBTmp) = moveScalarAddSub(Worklist, Inst, MDT);
     if (Changed)
       return;