[InstCombine] optimized implementations of min/max for bool

[Qi-Hu]

Summary

umin.i1 -> and : https://alive2.llvm.org/ce/z/6FNH6k
smin.i1 -> or : https://alive2.llvm.org/ce/z/h96S6o
umax.i1 -> or : https://alive2.llvm.org/ce/z/XHdeVk
smax.i1 -> and : https://alive2.llvm.org/ce/z/fkxKJx
umin.v4i1 -> and : https://alive2.llvm.org/ce/z/yV4VgP
smin.v4i1 -> or : https://alive2.llvm.org/ce/z/e9TF68
umax.v4i1 -> or : https://alive2.llvm.org/ce/z/tfNyfK
smax.v4i1 -> and : https://alive2.llvm.org/ce/z/0__Af2

[goldstein.w.n]

Can you precommitnthe tests?

[nikic]

llvm/test/Transforms/InstCombine/fold-minmax-i1.ll

1

Use update_test_checks.py.

34

Missing vector test.

[nikic]

Please attach alive2 proofs to the patch description.

[Qi-Hu]

In D158915#4619131, @goldstein.w.n wrote:

Can you precommitnthe tests?

The pre-commit test is here: D159129.

[goldstein.w.n]

In D158915#4626484, @Qi-Hu wrote:

In D158915#4619131, @goldstein.w.n wrote:

Can you precommitnthe tests?

The pre-commit test is here: D159129.

Can you put it in a series.

Go to the "Edit Related Revisions" tab and set the test commit as the parent of this one.

[RKSimon]

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

1619

remove superfluous brackets: II->getType()->isIntOrIntVectorTy(1)

1626

remove superfluous brackets: II->getType()->isIntOrIntVectorTy(1)

[goldstein.w.n]

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

1630

If you remove the bracket, can you move the comments to before the if. Non-bracket if with multiline comments before statement are a bit error-prone imo.

[goldstein.w.n]

LGTM.

[bryanpkc]

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

1621

This line is not indented correctly; please clang-format the if statement.

1628

This line is not indented correctly; please clang-format the if statement.

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

if (match(I0, m_SExt(m_Value(X))) && match(I1, m_Constant(C)) &&
         I0->hasOneUse()) {
       Constant *NarrowC = ConstantExpr::getTrunc(C, X->getType());
       if (ConstantExpr::getSExt(NarrowC, II->getType()) == C) {
         Value *NarrowMaxMin = Builder.CreateBinaryIntrinsic(IID, X, NarrowC);
         return CastInst::Create(Instruction::SExt, NarrowMaxMin, II->getType());
       }
     }
 
+    // umin(i1 X, i1 Y) -> and i1 X, Y
+    // smax(i1 X, i1 Y) -> and i1 X, Y
+    if ((IID == Intrinsic::umin || IID == Intrinsic::smax) &&
+        II->getType()->isIntOrIntVectorTy(1)) {
+      return BinaryOperator::CreateAnd(I0, I1);
+    }
+
+    // umax(i1 X, i1 Y) -> or i1 X, Y
+    // smin(i1 X, i1 Y) -> or i1 X, Y
+    if ((IID == Intrinsic::umax || IID == Intrinsic::smin) &&
+        II->getType()->isIntOrIntVectorTy(1)) {
+      return BinaryOperator::CreateOr(I0, I1);
+    }
+
     if (IID == Intrinsic::smax || IID == Intrinsic::smin) {
       // smax (neg nsw X), (neg nsw Y) --> neg nsw (smin X, Y)
       // smin (neg nsw X), (neg nsw Y) --> neg nsw (smax X, Y)
       // TODO: Canonicalize neg after min/max if I1 is constant.
       if (match(I0, m_NSWNeg(m_Value(X))) && match(I1, m_NSWNeg(m_Value(Y))) &&
           (I0->hasOneUse() || I1->hasOneUse())) {
         Intrinsic::ID InvID = getInverseMinMaxIntrinsic(IID);
         Value *InvMaxMin = Builder.CreateBinaryIntrinsic(InvID, X, Y);

llvm/test/Transforms/InstCombine/fold-minmax-i1.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
 ;------------------------------------------------------------------------------;
 ; Scalar tests
 ;------------------------------------------------------------------------------;
 
 define i1 @umin_scalar(i1 %0, i1 %1) {
 ; CHECK-LABEL: define i1 @umin_scalar
 ; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call i1 @llvm.umin.i1(i1 [[TMP0]], i1 [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = and i1 [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret i1 [[TMP3]]
 ;
   %3 = call i1 @llvm.umin.i1(i1 %0, i1 %1)
   ret i1 %3
 }
 
 define i1 @smin_scalar(i1 %0, i1 %1) {
 ; CHECK-LABEL: define i1 @smin_scalar
 ; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call i1 @llvm.smin.i1(i1 [[TMP0]], i1 [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = or i1 [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret i1 [[TMP3]]
 ;
   %3 = call i1 @llvm.smin.i1(i1 %0, i1 %1)
   ret i1 %3
 }
 
 define i1 @umax_scalar(i1 %0, i1 %1) {
 ; CHECK-LABEL: define i1 @umax_scalar
 ; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call i1 @llvm.umax.i1(i1 [[TMP0]], i1 [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = or i1 [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret i1 [[TMP3]]
 ;
   %3 = call i1 @llvm.umax.i1(i1 %0, i1 %1)
   ret i1 %3
 }
 
 define i1 @smax_scalar(i1 %0, i1 %1) {
 ; CHECK-LABEL: define i1 @smax_scalar
 ; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call i1 @llvm.smax.i1(i1 [[TMP0]], i1 [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = and i1 [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret i1 [[TMP3]]
 ;
   %3 = call i1 @llvm.smax.i1(i1 %0, i1 %1)
   ret i1 %3
 }
 
 ;------------------------------------------------------------------------------;
 ; Vector tests
 ;------------------------------------------------------------------------------;
 
 define <4 x i1> @umin_vector(<4 x i1> %0, <4 x i1> %1) {
 ; CHECK-LABEL: define <4 x i1> @umin_vector
 ; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x i1> @llvm.umin.v4i1(<4 x i1> [[TMP0]], <4 x i1> [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = and <4 x i1> [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret <4 x i1> [[TMP3]]
 ;
   %3 = call <4 x i1> @llvm.umin.v4i1(<4 x i1> %0, <4 x i1> %1)
   ret <4 x i1> %3
 }
 
 define <4 x i1> @smin_vector(<4 x i1> %0, <4 x i1> %1) {
 ; CHECK-LABEL: define <4 x i1> @smin_vector
 ; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x i1> @llvm.smin.v4i1(<4 x i1> [[TMP0]], <4 x i1> [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = or <4 x i1> [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret <4 x i1> [[TMP3]]
 ;
   %3 = call <4 x i1> @llvm.smin.v4i1(<4 x i1> %0, <4 x i1> %1)
   ret <4 x i1> %3
 }
 
 define <4 x i1> @umax_vector(<4 x i1> %0, <4 x i1> %1) {
 ; CHECK-LABEL: define <4 x i1> @umax_vector
 ; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x i1> @llvm.umax.v4i1(<4 x i1> [[TMP0]], <4 x i1> [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = or <4 x i1> [[TMP0]], [[TMP1]] 
 ; CHECK-NEXT:    ret <4 x i1> [[TMP3]]
 ;
   %3 = call <4 x i1> @llvm.umax.v4i1(<4 x i1> %0, <4 x i1> %1)
   ret <4 x i1> %3
 }
 
 define <4 x i1> @smax_vector(<4 x i1> %0, <4 x i1> %1) {
 ; CHECK-LABEL: define <4 x i1> @smax_vector
 ; CHECK-SAME: (<4 x i1> [[TMP0:%.*]], <4 x i1> [[TMP1:%.*]]) {
-; CHECK-NEXT:    [[TMP3:%.*]] = call <4 x i1> @llvm.smax.v4i1(<4 x i1> [[TMP0]], <4 x i1> [[TMP1]])
+; CHECK-NEXT:    [[TMP3:%.*]] = and <4 x i1> [[TMP0]], [[TMP1]]
 ; CHECK-NEXT:    ret <4 x i1> [[TMP3]]
 ;
   %3 = call <4 x i1> @llvm.smax.v4i1(<4 x i1> %0, <4 x i1> %1)
   ret <4 x i1> %3
 }
 
 declare i1 @llvm.umin.i1(i1, i1)
 declare i1 @llvm.smin.i1(i1, i1)
 declare i1 @llvm.umax.i1(i1, i1)
 declare i1 @llvm.smax.i1(i1, i1)
 declare <4 x i1> @llvm.umin.v4i1(<4 x i1>, <4 x i1>)
 declare <4 x i1> @llvm.smin.v4i1(<4 x i1>, <4 x i1>)
 declare <4 x i1> @llvm.umax.v4i1(<4 x i1>, <4 x i1>)
 declare <4 x i1> @llvm.smax.v4i1(<4 x i1>, <4 x i1>)