[CodeGen][DebugInfo] Add x86 entry value tests

[fdeazeve]

Summary

We should also test the x86 target, since it has different backend defaults from
ARM.

[vvereschaka]

Hi @fdeazeve,

the test gets failed on Aarch64 builders

• https://lab.llvm.org/buildbot/#/builders/119/builds/14812
• https://lab.llvm.org/buildbot/#/builders/119/builds/14813

please note, this builder supports only Arm/Aarch64 targets and it does not support x86_64 and any other targets.

[fdeazeve]

In D158636#4614890, @vvereschaka wrote:

Hi @fdeazeve,

the test gets failed on Aarch64 builders

• https://lab.llvm.org/buildbot/#/builders/119/builds/14812
• https://lab.llvm.org/buildbot/#/builders/119/builds/14813

please note, this builder supports only Arm/Aarch64 targets and it does not support x86_64 and any other targets.

Ohhh that explains a lot!
Thank you, I'll have a fix in a few minutes

[fdeazeve]

Pushed a quick fix

[fdeazeve]

Argh, I added one more test along the same lines, gotta fix that one too

llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll

-; RUN: llc -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
-; RUN: llc -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s
-; RUN: llc -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s
-
-; CHECK-NOT:  DBG_VALUE
-; CHECK:      DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
-; CHECK-NEXT: DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
-; CHECK-NOT:  DBG_VALUE
+; RUN: llc --mtriple="aarch64-" -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AARCH
+; RUN: llc --mtriple="aarch64-" -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=AARCH
+; RUN: llc --mtriple="aarch64-" -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=AARCH
+
+
+; RUN: llc --mtriple="x86_64-" -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc --mtriple="x86_64-" -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
+
+; AARCH-NOT:  DBG_VALUE
+; AARCH:      DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; AARCH-NEXT: DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; AARCH-NOT:  DBG_VALUE
+
+; X86-NOT:  DBG_VALUE
+; X86:      DBG_VALUE $r14, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; X86-NEXT: DBG_VALUE $r14, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; X86-NOT:  DBG_VALUE
 
-target triple="aarch64--"
 
 define void @foo(ptr %unused_arg, ptr swiftasync %async_arg) !dbg !6 {
   call void @llvm.dbg.value(metadata ptr %async_arg, metadata !12, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !14
   call void @llvm.dbg.value(metadata ptr %async_arg, metadata !12, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !14
   call void @consume(ptr %async_arg)
   ret void, !dbg !15
 }