This is an archive of the discontinued LLVM Phabricator instance.

[mips] added support for trunc macro
ClosedPublic

Authored by obucina on Dec 23 2015, 6:32 AM.

Diff Detail

Repository
rL LLVM

Event Timeline

obucina updated this revision to Diff 43530.Dec 23 2015, 6:32 AM
obucina retitled this revision from to [mips] added support for trunc macro.
obucina updated this object.
obucina added reviewers: dsanders, zoran.jovanovic.
dsanders accepted this revision.Feb 10 2016, 1:58 AM
dsanders edited edge metadata.

LGTM with a few nits

lib/Target/Mips/AsmParser/MipsAsmParser.cpp
3060 ↗(On Diff #43530)

Shouldn't the `hasShortDelaySlot(Inst.getOpcode())` part be based on the properties of CFC1 rather than Inst? Also, it's not really a delay slot, it's a hazard. hasShortDelaySlot() will always return false for CFC1 and the trunc macros.
I think we should just hard code it to true/false (with a comment explaining why) until we represent hazards in tablegen

3064 ↗(On Diff #43530)

Likewise

3069 ↗(On Diff #43530)

Likewise

test/MC/Mips/mips64/valid.s
288–289 ↗(On Diff #43530)

Indentation

test/MC/Mips/mips64r2/valid.s
314–315 ↗(On Diff #43530)

Indentation

test/MC/Mips/mips64r3/valid.s
314–315 ↗(On Diff #43530)

Indentation

test/MC/Mips/mips64r5/valid.s
315–316 ↗(On Diff #43530)

Indentation

This revision is now accepted and ready to land.Feb 10 2016, 1:58 AM
obucina updated this revision to Diff 47645.Feb 11 2016, 7:23 AM
obucina edited edge metadata.
obucina marked 7 inline comments as done.

Changes according to last feedback

This revision was automatically updated to reflect the committed changes.