[CodeGen] Fix typo in comments

llvm/include/llvm/CodeGen/LiveRangeCalc.h

class LiveRangeCalc {
   ///
   /// For every basic block, MBB, one of these conditions shall be true:
   ///
   ///  1. !Seen.count(MBB->getNumber())
   ///     Blocks without a Seen bit are ignored.
   ///  2. LiveOut[MBB].second.getNode() == MBB
   ///     The live-out value is defined in MBB.
   ///  3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
-  ///     The live-out value passses through MBB. All predecessors must carry
+  ///     The live-out value passes through MBB. All predecessors must carry
   ///     the same value.
   ///
   /// The domtree node may be null, it can be computed.
   ///
   /// The map can be shared by multiple live ranges as long as no two are
   /// live-out of the same block.
   LiveOutMap Map;
 

llvm/include/llvm/CodeGen/PBQP/Graph.h

public:
     GraphMetadata& getMetadata() { return Metadata; }
 
     /// Get a const-reference to the graph metadata.
     const GraphMetadata& getMetadata() const { return Metadata; }
 
     /// Lock this graph to the given solver instance in preparation
     /// for running the solver. This method will call solver.handleAddNode for
     /// each node in the graph, and handleAddEdge for each edge, to give the
-    /// solver an opportunity to set up any requried metadata.
+    /// solver an opportunity to set up any required metadata.
     void setSolver(SolverT &S) {
       assert(!Solver && "Solver already set. Call unsetSolver().");
       Solver = &S;
       for (auto NId : nodeIds())
         Solver->handleAddNode(NId);
       for (auto EId : edgeIds())
         Solver->handleAddEdge(EId);
     }

llvm/include/llvm/CodeGen/SelectionDAG.h

   SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op);
 
   /// Expand the specified \c ISD::VAARG node as the Legalize pass would.
   SDValue expandVAArg(SDNode *Node);
 
   /// Expand the specified \c ISD::VACOPY node as the Legalize pass would.
   SDValue expandVACopy(SDNode *Node);
 
-  /// Returs an GlobalAddress of the function from the current module with
+  /// Returns a GlobalAddress of the function from the current module with
   /// name matching the given ExternalSymbol. Additionally can provide the
   /// matched function.
   /// Panics the function doesn't exists.
   SDValue getSymbolFunctionGlobalAddress(SDValue Op,
                                          Function **TargetFunction = nullptr);
 
   /// *Mutate* the specified node in-place to have the
   /// specified operands.  If the resultant node already exists in the DAG,

llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp

LiveDebugValues::LiveDebugValues() : MachineFunctionPass(ID) {
   initializeLiveDebugValuesPass(*PassRegistry::getPassRegistry());
   InstrRefImpl =
       std::unique_ptr<LDVImpl>(llvm::makeInstrRefBasedLiveDebugValues());
   VarLocImpl = std::unique_ptr<LDVImpl>(llvm::makeVarLocBasedLiveDebugValues());
 }
 
 bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
   // Except for Wasm, all targets should be only using physical register at this
-  // point. Wasm only use virtual registers throught its pipeline, but its
+  // point. Wasm only use virtual registers throughout its pipeline, but its
   // virtual registers don't participate  in this LiveDebugValues analysis; only
   // its target indices do.
   assert(MF.getTarget().getTargetTriple().isWasm() ||
          MF.getProperties().hasProperty(
              MachineFunctionProperties::Property::NoVRegs));
 
   bool InstrRefBased = MF.useDebugInstrRef();
   // Allow the user to force selection of InstrRef LDV.

llvm/lib/CodeGen/MachineBasicBlock.cpp

 void MachineBasicBlock::setSuccProbability(succ_iterator I,
                                            BranchProbability Prob) {
   assert(!Prob.isUnknown());
   if (Probs.empty())
     return;
   *getProbabilityIterator(I) = Prob;
 }
 
-/// Return probability iterator corresonding to the I successor iterator
+/// Return probability iterator corresponding to the I successor iterator
 MachineBasicBlock::const_probability_iterator
 MachineBasicBlock::getProbabilityIterator(
     MachineBasicBlock::const_succ_iterator I) const {
   assert(Probs.size() == Successors.size() && "Async probability list!");
   const size_t index = std::distance(Successors.begin(), I);
   assert(index < Probs.size() && "Not a current successor!");
   return Probs.begin() + index;
 }
 
-/// Return probability iterator corresonding to the I successor iterator.
+/// Return probability iterator corresponding to the I successor iterator.
 MachineBasicBlock::probability_iterator
 MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
   assert(Probs.size() == Successors.size() && "Async probability list!");
   const size_t index = std::distance(Successors.begin(), I);
   assert(index < Probs.size() && "Not a current successor!");
   return Probs.begin() + index;
 }
 

llvm/test/CodeGen/AMDGPU/sign_extend.ll

 ; VI-NEXT:    s_endpgm
   %cmp = icmp eq i32 %a, %b
   %sext = sext i1 %cmp to i16
   store i16 %sext, ptr addrspace(1) %out
   ret void
 }
 
 ; This purpose of this test is to make sure the i16 = sign_extend i1 node
-; makes it all the way throught the legalizer/optimizer to make sure
+; makes it all the way through the legalizer/optimizer to make sure
 ; we select this correctly.  In the s_sext_i1_to_i16, the sign_extend node
 ; is optimized to a select very early.
 define amdgpu_kernel void @s_sext_i1_to_i16_with_and(ptr addrspace(1) %out, i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
 ; SI-LABEL: s_sext_i1_to_i16_with_and:
 ; SI:       ; %bb.0:
 ; SI-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0xb
 ; SI-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
 ; SI-NEXT:    s_mov_b32 s3, 0xf000