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Differential D156617

[SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf.
ClosedPublic

Authored by DianQK on Jul 30 2023, 7:16 AM.

Details

Reviewers
nikic
xbolva00
XChy
Commits
rG40b0ab287f9f: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf.
Summary

Pre-commit test for D155711.

Diff Detail

Unit TestsFailed

TimeTest
14,670 msx64 debian > Clang.Driver::fsanitize.c

Event Timeline

DianQK created this revision.Jul 30 2023, 7:16 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 30 2023, 7:16 AM
Herald added subscribers: khei4, StephenFan. · View Herald Transcript
DianQK requested review of this revision.Jul 30 2023, 7:16 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 30 2023, 7:16 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
DianQK added a child revision: D155711: [SimplifyCFG] Hoist common instructions on Switch..Jul 30 2023, 7:18 AM
DianQK mentioned this in D155711: [SimplifyCFG] Hoist common instructions on Switch..Jul 30 2023, 7:28 AM
Harbormaster completed remote builds in B249047: Diff 545436.Jul 30 2023, 8:13 AM
DianQK updated this revision to Diff 549700.Aug 13 2023, 6:17 AM

Add more tests.

Harbormaster completed remote builds in B252182: Diff 549700.Aug 13 2023, 7:05 AM
DianQK updated this revision to Diff 555206.Aug 31 2023, 5:31 PM

Rebase.

This revision was not accepted when it landed; it landed in state Needs Review.Sep 19 2023, 4:22 PM
This revision was landed with ongoing or failed builds.
Closed by commit rG40b0ab287f9f: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf. (authored by DianQK). · Explain Why
This revision was automatically updated to reflect the committed changes.
DianQK added a commit: rG40b0ab287f9f: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf..
DianQK mentioned this in rG96ea48ff5dcb: [SimplifyCFG] Hoist common instructions on Switch..

Revision Contents

PathSize
llvm/
test/
Transforms/
SimplifyCFG/
99 lines
85 lines

Diff 545436

llvm/test/Transforms/SimplifyCFG/hoist-common-code-with-unreachable.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes='simplifycfg<hoist-common-insts;no-sink-common-insts>' -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
define i1 @common_instr_with_unreachable(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @common_instr_with_unreachable(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[UNREACHABLE:%.*]] [
; CHECK-NEXT: i64 0, label [[BB0:%.*]]
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: unreachable:
; CHECK-NEXT: unreachable
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %unreachable [
i64 0, label %bb0
i64 1, label %bb1
i64 2, label %bb2
]
unreachable:
unreachable
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp eq i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}
define i1 @common_instr_with_unreachable_2(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @common_instr_with_unreachable_2(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB1:%.*]] [
; CHECK-NEXT: i64 0, label [[BB0:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %bb1 [
i64 0, label %bb0
i64 1, label %unreachable
i64 2, label %bb2
]
unreachable:
unreachable
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp eq i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}

llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll

Show All 18 LinesT: ; preds = %0
ret void ret void
F: ; preds = %0 F: ; preds = %0
store i32 1, ptr %Q store i32 1, ptr %Q
%B = load i32, ptr %Q ; <i32> [#uses=1] %B = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %B ) call void @bar( i32 %B )
ret void ret void
} }
define i1 @common_instr_on_switch(i64 %a, i64 %b, i64 %c) unnamed_addr {
; CHECK-LABEL: @common_instr_on_switch(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp eq i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}
define i1 @partial_common_instr_on_switch(i64 %a, i64 %b, i64 %c) unnamed_addr {
; CHECK-LABEL: @partial_common_instr_on_switch(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp ne i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}