This is an archive of the discontinued LLVM Phabricator instance.

Differential D156617

[SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf.
ClosedPublic

Authored by DianQK on Jul 30 2023, 7:16 AM.

Details

Reviewers
nikic
xbolva00
XChy
Commits
rG40b0ab287f9f: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf.
Summary

Pre-commit test for D155711.

Diff Detail

Event Timeline

DianQK created this revision.Jul 30 2023, 7:16 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 30 2023, 7:16 AM
Herald added subscribers: khei4, StephenFan. · View Herald Transcript
DianQK requested review of this revision.Jul 30 2023, 7:16 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 30 2023, 7:16 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
DianQK added a child revision: D155711: [SimplifyCFG] Hoist common instructions on Switch..Jul 30 2023, 7:18 AM
DianQK mentioned this in D155711: [SimplifyCFG] Hoist common instructions on Switch..Jul 30 2023, 7:28 AM
Harbormaster completed remote builds in B249047: Diff 545436.Jul 30 2023, 8:13 AM
DianQK updated this revision to Diff 549700.Aug 13 2023, 6:17 AM

Add more tests.

Harbormaster completed remote builds in B252182: Diff 549700.Aug 13 2023, 7:05 AM
DianQK updated this revision to Diff 555206.Aug 31 2023, 5:31 PM

Rebase.

This revision was not accepted when it landed; it landed in state Needs Review.Sep 19 2023, 4:22 PM
This revision was landed with ongoing or failed builds.
Closed by commit rG40b0ab287f9f: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf. (authored by DianQK). · Explain Why
This revision was automatically updated to reflect the committed changes.
DianQK added a commit: rG40b0ab287f9f: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf..
DianQK mentioned this in rG96ea48ff5dcb: [SimplifyCFG] Hoist common instructions on Switch..

Revision Contents

PathSize
llvm/
test/
Transforms/
SimplifyCFG/
68 lines
99 lines
130 lines
243 lines

Diff 557084

llvm/test/Transforms/SimplifyCFG/HoistCode.ll

Show All 11 Lines
T: ; preds = %0 T: ; preds = %0
store i32 7, ptr %P store i32 7, ptr %P
ret void ret void
F: ; preds = %0 F: ; preds = %0
store i32 7, ptr %P store i32 7, ptr %P
ret void ret void
} }
define void @foo_switch(i64 %C, ptr %P) {
; CHECK-LABEL: @foo_switch(
; CHECK-NEXT: switch i64 [[C:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: bb0:
; CHECK-NEXT: store i32 7, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: bb1:
; CHECK-NEXT: store i32 7, ptr [[P]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
; CHECK: bb2:
; CHECK-NEXT: store i32 7, ptr [[P]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
;
switch i64 %C, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0: ; preds = %0
store i32 7, ptr %P
ret void
bb1: ; preds = %0
store i32 7, ptr %P
ret void
bb2: ; preds = %0
store i32 7, ptr %P
ret void
}
define float @PR39535min(float %x) { define float @PR39535min(float %x) {
; CHECK-LABEL: @PR39535min( ; CHECK-LABEL: @PR39535min(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = fcmp une float [[X:%.*]], 0.000000e+00 ; CHECK-NEXT: [[TOBOOL:%.*]] = fcmp une float [[X:%.*]], 0.000000e+00
; CHECK-NEXT: [[DOTX:%.*]] = select fast i1 [[TOBOOL]], float 0.000000e+00, float [[X]] ; CHECK-NEXT: [[DOTX:%.*]] = select fast i1 [[TOBOOL]], float 0.000000e+00, float [[X]]
; CHECK-NEXT: ret float [[DOTX]] ; CHECK-NEXT: ret float [[DOTX]]
; ;
entry: entry:
%tobool = fcmp une float %x, 0.0 %tobool = fcmp une float %x, 0.0
br i1 %tobool, label %cond.true, label %cond.false br i1 %tobool, label %cond.true, label %cond.false
cond.true: cond.true:
br label %cond.end br label %cond.end
cond.false: cond.false:
br label %cond.end br label %cond.end
cond.end: cond.end:
%cond = phi fast float [ 0.0, %cond.true ], [ %x, %cond.false ] %cond = phi fast float [ 0.0, %cond.true ], [ %x, %cond.false ]
ret float %cond ret float %cond
} }
define float @PR39535min_switch(i64 %i, float %x) {
; CHECK-LABEL: @PR39535min_switch(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i64 [[I:%.*]], label [[END:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb1:
; CHECK-NEXT: br label [[END]]
; CHECK: bb2:
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[COND:%.*]] = phi fast float [ [[X:%.*]], [[BB1]] ], [ [[X]], [[BB2]] ], [ 0.000000e+00, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret float [[COND]]
;
entry:
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
br label %end
bb1:
br label %end
bb2:
br label %end
end:
%cond = phi fast float [ 0.0, %bb0 ], [ %x, %bb1 ], [ %x, %bb2 ]
ret float %cond
}

llvm/test/Transforms/SimplifyCFG/hoist-common-code-with-unreachable.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes='simplifycfg<hoist-common-insts;no-sink-common-insts>' -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
define i1 @common_instr_with_unreachable(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @common_instr_with_unreachable(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[UNREACHABLE:%.*]] [
; CHECK-NEXT: i64 0, label [[BB0:%.*]]
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: unreachable:
; CHECK-NEXT: unreachable
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %unreachable [
i64 0, label %bb0
i64 1, label %bb1
i64 2, label %bb2
]
unreachable:
unreachable
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp eq i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}
define i1 @common_instr_with_unreachable_2(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @common_instr_with_unreachable_2(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB1:%.*]] [
; CHECK-NEXT: i64 0, label [[BB0:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %bb1 [
i64 0, label %bb0
i64 1, label %unreachable
i64 2, label %bb2
]
unreachable:
unreachable
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp eq i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}

llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll

Show All 18 LinesT: ; preds = %0
ret void ret void
F: ; preds = %0 F: ; preds = %0
store i32 1, ptr %Q store i32 1, ptr %Q
%B = load i32, ptr %Q ; <i32> [#uses=1] %B = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %B ) call void @bar( i32 %B )
ret void ret void
} }
define void @test_switch(i64 %i, ptr %Q) {
; CHECK-LABEL: @test_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: bb0:
; CHECK-NEXT: store i32 1, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: call void @bar(i32 [[A]])
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: bb1:
; CHECK-NEXT: store i32 1, ptr [[Q]], align 4
; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: call void @bar(i32 [[B]])
; CHECK-NEXT: br label [[COMMON_RET]]
; CHECK: bb2:
; CHECK-NEXT: store i32 1, ptr [[Q]], align 4
; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: call void @bar(i32 [[C]])
; CHECK-NEXT: br label [[COMMON_RET]]
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0: ; preds = %0
store i32 1, ptr %Q
%A = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %A )
ret void
bb1: ; preds = %0
store i32 1, ptr %Q
%B = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %B )
ret void
bb2: ; preds = %0
store i32 1, ptr %Q
%C = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %C )
ret void
}
define i1 @common_instr_on_switch(i64 %a, i64 %b, i64 %c) unnamed_addr {
; CHECK-LABEL: @common_instr_on_switch(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp eq i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}
define i1 @partial_common_instr_on_switch(i64 %a, i64 %b, i64 %c) unnamed_addr {
; CHECK-LABEL: @partial_common_instr_on_switch(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i64 [[A:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[B]], [[C]]
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RESULT:%.*]] = phi i1 [ [[TMP0]], [[BB0]] ], [ [[TMP1]], [[BB1]] ], [ [[TMP2]], [[BB2]] ]
; CHECK-NEXT: ret i1 [[RESULT]]
;
start:
switch i64 %a, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0: ; preds = %start
%0 = icmp eq i64 %b, %c
br label %exit
bb1: ; preds = %start
%1 = icmp ne i64 %b, %c
br label %exit
bb2: ; preds = %start
%2 = icmp eq i64 %b, %c
br label %exit
exit: ; preds = %bb2, %bb1, %bb0
%result = phi i1 [ %0, %bb0 ], [ %1, %bb1 ], [ %2, %bb2 ]
ret i1 %result
}

llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll

Show All 13 Linesthen:
br label %out br label %out
else: else:
%e = load i8, ptr %p, !range !1 %e = load i8, ptr %p, !range !1
br label %out br label %out
out: out:
ret void ret void
} }
define void @hoist_range_switch(i64 %i, ptr %p) {
; CHECK-LABEL: @hoist_range_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG1:![0-9]+]]
; CHECK-NEXT: br label [[OUT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[E:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG2:![0-9]+]]
; CHECK-NEXT: br label [[OUT]]
; CHECK: bb2:
; CHECK-NEXT: [[F:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG3:![0-9]+]]
; CHECK-NEXT: br label [[OUT]]
; CHECK: out:
; CHECK-NEXT: ret void
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
%t = load i8, ptr %p, !range !0
br label %out
bb1:
%e = load i8, ptr %p, !range !1
br label %out
bb2:
%f = load i8, ptr %p, !range !3
br label %out
out:
ret void
}
define void @hoist_both_noundef(i1 %c, ptr %p) { define void @hoist_both_noundef(i1 %c, ptr %p) {
; CHECK-LABEL: @hoist_both_noundef( ; CHECK-LABEL: @hoist_both_noundef(
; CHECK-NEXT: if: ; CHECK-NEXT: if:
; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1, !noundef !1 ; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1, !noundef !4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
if: if:
br i1 %c, label %then, label %else br i1 %c, label %then, label %else
then: then:
%t = load i8, ptr %p, !noundef !2 %t = load i8, ptr %p, !noundef !2
br label %out br label %out
else: else:
%e = load i8, ptr %p, !noundef !2 %e = load i8, ptr %p, !noundef !2
br label %out br label %out
out: out:
ret void ret void
} }
define void @hoist_both_noundef_switch(i64 %i, ptr %p) {
; CHECK-LABEL: @hoist_both_noundef_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1, !noundef !4
; CHECK-NEXT: br label [[OUT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[E:%.*]] = load i8, ptr [[P]], align 1, !noundef !4
; CHECK-NEXT: br label [[OUT]]
; CHECK: bb2:
; CHECK-NEXT: [[F:%.*]] = load i8, ptr [[P]], align 1, !noundef !4
; CHECK-NEXT: br label [[OUT]]
; CHECK: out:
; CHECK-NEXT: ret void
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
%t = load i8, ptr %p, !noundef !2
br label %out
bb1:
%e = load i8, ptr %p, !noundef !2
br label %out
bb2:
%f = load i8, ptr %p, !noundef !2
br label %out
out:
ret void
}
define void @hoist_one_noundef(i1 %c, ptr %p) { define void @hoist_one_noundef(i1 %c, ptr %p) {
; CHECK-LABEL: @hoist_one_noundef( ; CHECK-LABEL: @hoist_one_noundef(
; CHECK-NEXT: if: ; CHECK-NEXT: if:
; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1 ; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
if: if:
br i1 %c, label %then, label %else br i1 %c, label %then, label %else
then: then:
%t = load i8, ptr %p, !noundef !2 %t = load i8, ptr %p, !noundef !2
br label %out br label %out
else: else:
%e = load i8, ptr %p %e = load i8, ptr %p
br label %out br label %out
out: out:
ret void ret void
} }
define void @hoist_one_noundef_switch(i64 %i, ptr %p) {
; CHECK-LABEL: @hoist_one_noundef_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[T:%.*]] = load i8, ptr [[P:%.*]], align 1, !noundef !4
; CHECK-NEXT: br label [[OUT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[E:%.*]] = load i8, ptr [[P]], align 1
; CHECK-NEXT: br label [[OUT]]
; CHECK: bb2:
; CHECK-NEXT: [[F:%.*]] = load i8, ptr [[P]], align 1, !noundef !4
; CHECK-NEXT: br label [[OUT]]
; CHECK: out:
; CHECK-NEXT: ret void
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
%t = load i8, ptr %p, !noundef !2
br label %out
bb1:
%e = load i8, ptr %p
br label %out
bb2:
%f = load i8, ptr %p, !noundef !2
br label %out
out:
ret void
}
define void @hoist_dereferenceable(i1 %c, ptr %p) { define void @hoist_dereferenceable(i1 %c, ptr %p) {
; CHECK-LABEL: @hoist_dereferenceable( ; CHECK-LABEL: @hoist_dereferenceable(
; CHECK-NEXT: if: ; CHECK-NEXT: if:
; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[P:%.*]], align 8, !dereferenceable !2 ; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[P:%.*]], align 8, !dereferenceable !5
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
if: if:
br i1 %c, label %then, label %else br i1 %c, label %then, label %else
then: then:
%t = load ptr, ptr %p, !dereferenceable !{i64 10} %t = load ptr, ptr %p, !dereferenceable !{i64 10}
br label %out br label %out
else: else:
%e = load ptr, ptr %p, !dereferenceable !{i64 20} %e = load ptr, ptr %p, !dereferenceable !{i64 20}
br label %out br label %out
out: out:
ret void ret void
} }
define void @hoist_dereferenceable_switch(i64 %i, ptr %p) {
; CHECK-LABEL: @hoist_dereferenceable_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[P:%.*]], align 8, !dereferenceable !5
; CHECK-NEXT: br label [[OUT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[E:%.*]] = load ptr, ptr [[P]], align 8, !dereferenceable !6
; CHECK-NEXT: br label [[OUT]]
; CHECK: bb2:
; CHECK-NEXT: [[F:%.*]] = load ptr, ptr [[P]], align 8, !dereferenceable !7
; CHECK-NEXT: br label [[OUT]]
; CHECK: out:
; CHECK-NEXT: ret void
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
%t = load ptr, ptr %p, !dereferenceable !{i64 10}
br label %out
bb1:
%e = load ptr, ptr %p, !dereferenceable !{i64 20}
br label %out
bb2:
%f = load ptr, ptr %p, !dereferenceable !{i64 30}
br label %out
out:
ret void
}
define void @hoist_dereferenceable_or_null(i1 %c, ptr %p) { define void @hoist_dereferenceable_or_null(i1 %c, ptr %p) {
; CHECK-LABEL: @hoist_dereferenceable_or_null( ; CHECK-LABEL: @hoist_dereferenceable_or_null(
; CHECK-NEXT: if: ; CHECK-NEXT: if:
; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[P:%.*]], align 8, !dereferenceable_or_null !2 ; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[P:%.*]], align 8, !dereferenceable_or_null !5
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
if: if:
br i1 %c, label %then, label %else br i1 %c, label %then, label %else
then: then:
%t = load ptr, ptr %p, !dereferenceable_or_null !{i64 20} %t = load ptr, ptr %p, !dereferenceable_or_null !{i64 20}
br label %out br label %out
else: else:
%e = load ptr, ptr %p, !dereferenceable_or_null !{i64 10} %e = load ptr, ptr %p, !dereferenceable_or_null !{i64 10}
br label %out br label %out
out: out:
ret void ret void
} }
define void @hoist_dereferenceable_or_null_switch(i64 %i, ptr %p) {
; CHECK-LABEL: @hoist_dereferenceable_or_null_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[P:%.*]], align 8, !dereferenceable_or_null !6
; CHECK-NEXT: br label [[OUT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[E:%.*]] = load ptr, ptr [[P]], align 8, !dereferenceable_or_null !5
; CHECK-NEXT: br label [[OUT]]
; CHECK: bb2:
; CHECK-NEXT: [[F:%.*]] = load ptr, ptr [[P]], align 8, !dereferenceable_or_null !7
; CHECK-NEXT: br label [[OUT]]
; CHECK: out:
; CHECK-NEXT: ret void
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
%t = load ptr, ptr %p, !dereferenceable_or_null !{i64 20}
br label %out
bb1:
%e = load ptr, ptr %p, !dereferenceable_or_null !{i64 10}
br label %out
bb2:
%f = load ptr, ptr %p, !dereferenceable_or_null !{i64 30}
br label %out
out:
ret void
}
; !range violation only returns poison, and is thus safe to speculate. ; !range violation only returns poison, and is thus safe to speculate.
define i32 @speculate_range(i1 %c, ptr dereferenceable(8) align 8 %p) { define i32 @speculate_range(i1 %c, ptr dereferenceable(8) align 8 %p) {
; CHECK-LABEL: @speculate_range( ; CHECK-LABEL: @speculate_range(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG3:![0-9]+]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG8:![0-9]+]]
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], i32 [[V]], i32 0 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], i32 [[V]], i32 0
; CHECK-NEXT: ret i32 [[SPEC_SELECT]] ; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
; ;
entry: entry:
br i1 %c, label %if, label %join br i1 %c, label %if, label %join
if: if:
%v = load i32, ptr %p, !range !{i32 0, i32 10} %v = load i32, ptr %p, !range !{i32 0, i32 10}
br label %join br label %join
join: join:
%phi = phi i32 [ %v, %if ], [ 0, %entry ] %phi = phi i32 [ %v, %if ], [ 0, %entry ]
ret i32 %phi ret i32 %phi
} }
; !nonnull is safe to speculate, but !noundef is not, as the latter causes ; !nonnull is safe to speculate, but !noundef is not, as the latter causes
; immediate undefined behavior. ; immediate undefined behavior.
define ptr @speculate_nonnull(i1 %c, ptr dereferenceable(8) align 8 %p) { define ptr @speculate_nonnull(i1 %c, ptr dereferenceable(8) align 8 %p) {
; CHECK-LABEL: @speculate_nonnull( ; CHECK-LABEL: @speculate_nonnull(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P:%.*]], align 8, !nonnull !1 ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P:%.*]], align 8, !nonnull !4
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], ptr [[V]], ptr null ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], ptr [[V]], ptr null
; CHECK-NEXT: ret ptr [[SPEC_SELECT]] ; CHECK-NEXT: ret ptr [[SPEC_SELECT]]
; ;
entry: entry:
br i1 %c, label %if, label %join br i1 %c, label %if, label %join
if: if:
%v = load ptr, ptr %p, !nonnull !{}, !noundef !{} %v = load ptr, ptr %p, !nonnull !{}, !noundef !{}
br label %join br label %join
join: join:
%phi = phi ptr [ %v, %if ], [ null, %entry ] %phi = phi ptr [ %v, %if ], [ null, %entry ]
ret ptr %phi ret ptr %phi
} }
; !align is safe to speculate, but !dereferenceable is not, as the latter causes ; !align is safe to speculate, but !dereferenceable is not, as the latter causes
; immediate undefined behavior. ; immediate undefined behavior.
define ptr @speculate_align(i1 %c, ptr dereferenceable(8) align 8 %p) { define ptr @speculate_align(i1 %c, ptr dereferenceable(8) align 8 %p) {
; CHECK-LABEL: @speculate_align( ; CHECK-LABEL: @speculate_align(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P:%.*]], align 8, !align !4 ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P:%.*]], align 8, !align !9
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], ptr [[V]], ptr null ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], ptr [[V]], ptr null
; CHECK-NEXT: ret ptr [[SPEC_SELECT]] ; CHECK-NEXT: ret ptr [[SPEC_SELECT]]
; ;
entry: entry:
br i1 %c, label %if, label %join br i1 %c, label %if, label %join
if: if:
%v = load ptr, ptr %p, !align !{i64 4}, !dereferenceable !{i64 4} %v = load ptr, ptr %p, !align !{i64 4}, !dereferenceable !{i64 4}
br label %join br label %join
join: join:
%phi = phi ptr [ %v, %if ], [ null, %entry ] %phi = phi ptr [ %v, %if ], [ null, %entry ]
ret ptr %phi ret ptr %phi
} }
define void @hoist_fpmath(i1 %c, double %x) { define void @hoist_fpmath(i1 %c, double %x) {
; CHECK-LABEL: @hoist_fpmath( ; CHECK-LABEL: @hoist_fpmath(
; CHECK-NEXT: if: ; CHECK-NEXT: if:
; CHECK-NEXT: [[T:%.*]] = fadd double [[X:%.*]], 1.000000e+00, !fpmath !5 ; CHECK-NEXT: [[T:%.*]] = fadd double [[X:%.*]], 1.000000e+00, !fpmath !10
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
if: if:
br i1 %c, label %then, label %else br i1 %c, label %then, label %else
then: then:
%t = fadd double %x, 1.0, !fpmath !{ float 2.5 } %t = fadd double %x, 1.0, !fpmath !{ float 2.5 }
br label %out br label %out
else: else:
%e = fadd double %x, 1.0, !fpmath !{ float 5.0 } %e = fadd double %x, 1.0, !fpmath !{ float 5.0 }
br label %out br label %out
out: out:
ret void ret void
} }
define void @hoist_fpmath_switch(i64 %i, double %x) {
; CHECK-LABEL: @hoist_fpmath_switch(
; CHECK-NEXT: switch i64 [[I:%.*]], label [[BB0:%.*]] [
; CHECK-NEXT: i64 1, label [[BB1:%.*]]
; CHECK-NEXT: i64 2, label [[BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: bb0:
; CHECK-NEXT: [[T:%.*]] = fadd double [[X:%.*]], 1.000000e+00, !fpmath !10
; CHECK-NEXT: br label [[OUT:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[E:%.*]] = fadd double [[X]], 1.000000e+00, !fpmath !11
; CHECK-NEXT: br label [[OUT]]
; CHECK: bb2:
; CHECK-NEXT: [[F:%.*]] = fadd double [[X]], 1.000000e+00, !fpmath !12
; CHECK-NEXT: br label [[OUT]]
; CHECK: out:
; CHECK-NEXT: ret void
;
switch i64 %i, label %bb0 [
i64 1, label %bb1
i64 2, label %bb2
]
bb0:
%t = fadd double %x, 1.0, !fpmath !{ float 2.5 }
br label %out
bb1:
%e = fadd double %x, 1.0, !fpmath !{ float 5.0 }
br label %out
bb2:
%f = fadd double %x, 1.0, !fpmath !{ float 7.5 }
br label %out
out:
ret void
}
!0 = !{ i8 0, i8 1 } !0 = !{ i8 0, i8 1 }
!1 = !{ i8 3, i8 5 } !1 = !{ i8 3, i8 5 }
!2 = !{} !2 = !{}
!3 = !{ i8 7, i8 9 }
;. ;.
; CHECK: [[RNG0]] = !{i8 0, i8 1, i8 3, i8 5} ; CHECK: [[RNG0]] = !{i8 0, i8 1, i8 3, i8 5}
; CHECK: [[META1:![0-9]+]] = !{} ; CHECK: [[RNG1]] = !{i8 0, i8 1}
; CHECK: [[META2:![0-9]+]] = !{i64 10} ; CHECK: [[RNG2]] = !{i8 3, i8 5}
; CHECK: [[RNG3]] = !{i32 0, i32 10} ; CHECK: [[RNG3]] = !{i8 7, i8 9}
; CHECK: [[META4:![0-9]+]] = !{i64 4} ; CHECK: [[META4:![0-9]+]] = !{}
; CHECK: [[META5:![0-9]+]] = !{float 2.500000e+00} ; CHECK: [[META5:![0-9]+]] = !{i64 10}
; CHECK: [[META6:![0-9]+]] = !{i64 20}
; CHECK: [[META7:![0-9]+]] = !{i64 30}
; CHECK: [[RNG8]] = !{i32 0, i32 10}
; CHECK: [[META9:![0-9]+]] = !{i64 4}
; CHECK: [[META10:![0-9]+]] = !{float 2.500000e+00}
; CHECK: [[META11:![0-9]+]] = !{float 5.000000e+00}
; CHECK: [[META12:![0-9]+]] = !{float 7.500000e+00}
;. ;.