[amdgpu] Delete elide-module-lds attribute

[JonChesterfield]

Summary

Requires D155190

[JonChesterfield]

• rebase

[JonChesterfield]

• whitespace

llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp

 // memory to save LDS. "Kernel" is as fast as kernel allocation but only works
 // for variables that are known reachable from a single kernel. "Hybrid" picks
 // between all three. When forced to choose between LDS and cycles we minimise
 // LDS use.
 
 // The "module" lowering implemented here finds LDS variables which are used by
 // non-kernel functions and creates a new struct with a field for each of those
 // LDS variables. Variables that are only used from kernels are excluded.
-// Kernels that do not use this struct are annoteated with the attribute
-// amdgpu-elide-module-lds which allows the back end to elide the allocation.
 //
 // The "table" lowering implemented here has three components.
 // First kernels are assigned a unique integer identifier which is available in
 // functions it calls through the intrinsic amdgcn_lds_kernel_id. The integer
 // is passed through a specific SGPR, thus works with indirect calls.
 // Second, each kernel allocates LDS variables independent of other kernels and
 // writes the addresses it chose for each variable into an array in consistent
 // order. If the kernel does not allocate a given variable, it writes undef to
for (Function &Func : M.functions()) {
               if (!I) {
                 return false;
               }
               Function *F = I->getFunction();
               return F == &Func;
             });
 
         markUsedByKernel(Builder, &Func, ModuleScopeReplacement.SGV);
-
-      } else {
-        markElideModuleLDS(Func);
       }
     }
 
     return ModuleScopeReplacement.SGV;
   }
 
   static DenseMap<Function *, LDSVariableReplacement>
   lowerKernelScopeStructVariables(
if (!KernelsThatIndirectlyAllocateDynamicLDS.empty()) {
 
           replaceUseWithTableLookup(M, Builder, table, GV, U, nullptr);
         }
       }
     }
     return KernelToCreatedDynamicLDS;
   }
 
-  // This attribute is no longer used by the backend. TODO: Delete it in favour
-  // of pass-local state and update the tests to remove the string.
-  static bool canElideModuleLDS(const Function &F) {
-    return F.hasFnAttribute("amdgpu-elide-module-lds");
-  }
-
-  static void markElideModuleLDS(Function &F) {
-    F.addFnAttr("amdgpu-elide-module-lds");
-  }
-
   bool runOnModule(Module &M) override {
     CallGraph CG = CallGraph(M);
     bool Changed = superAlignLDSGlobals(M);
 
     Changed |= eliminateConstantExprUsesOfLDSFromAllInstructions(M);
 
     Changed = true; // todo: narrow this down
 
// addresses.
         //  module.lds
         //  alignment padding
         //  kernel instance
         //  alignment padding
         //  dynamic lds variables
         //}
 
         const bool AllocateModuleScopeStruct =
-            MaybeModuleScopeStruct && !canElideModuleLDS(Func);
+            MaybeModuleScopeStruct && KernelsThatAllocateModuleLDS.contains(&Func);
 
         auto Replacement = KernelToReplacement.find(&Func);
         const bool AllocateKernelScopeStruct =
             Replacement != KernelToReplacement.end();
 
         const bool AllocateDynamicVariable =
             KernelToCreatedDynamicLDS.contains(&Func);
 

llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll

 
 
 ; First 2^3 of 2^4 cases encoded into function names
 ; no use of extern variable from nested function
 ; module_variable used/not-used
 ; kernel variable normal/overaligned
 ; extern variable normal/overaligned
 
-define amdgpu_kernel void @module_0_kernel_normal_extern_normal(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_normal_extern_normal(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_normal_extern_normal:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_load_dword s0, s[4:5], 0x0
 ; CHECK-NEXT:    v_mov_b32_e32 v0, 0
 ; CHECK-NEXT:    v_mov_b32_e32 v1, 2
 ; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
 ; CHECK-NEXT:    s_lshl_b32 s0, s0, 2
 ; CHECK-NEXT:    s_add_i32 s0, s0, 4
; CHECK-NEXT:    s_endpgm
 
   store i16 2, ptr addrspace(3) @kernel_normal
 
   %arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_normal, i32 0, i32 %idx
   store float 0.0, ptr addrspace(3) %arrayidx1
   ret void
 }
 
-define amdgpu_kernel void @module_0_kernel_overalign_extern_normal(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_overalign_extern_normal(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_overalign_extern_normal:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_load_dword s0, s[4:5], 0x0
 ; CHECK-NEXT:    v_mov_b32_e32 v0, 0
 ; CHECK-NEXT:    v_mov_b32_e32 v1, 2
 ; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
 ; CHECK-NEXT:    s_lshl_b32 s0, s0, 2
 ; CHECK-NEXT:    s_add_i32 s0, s0, 4
; CHECK-NEXT:    s_endpgm
 
   store i16 2, ptr addrspace(3) @kernel_overalign
 
   %arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_normal, i32 0, i32 %idx
   store float 0.0, ptr addrspace(3) %arrayidx1
   ret void
 }
 
-define amdgpu_kernel void @module_0_kernel_normal_extern_overalign(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_normal_extern_overalign(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_normal_extern_overalign:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_load_dword s0, s[4:5], 0x0
 ; CHECK-NEXT:    v_mov_b32_e32 v0, 0
 ; CHECK-NEXT:    v_mov_b32_e32 v1, 2
 ; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
 ; CHECK-NEXT:    s_lshl_b32 s0, s0, 2
 ; CHECK-NEXT:    s_add_i32 s0, s0, 8
; CHECK-NEXT:    s_endpgm
 
   store i16 2, ptr addrspace(3) @kernel_normal
 
   %arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_overalign, i32 0, i32 %idx
   store float 0.0, ptr addrspace(3) %arrayidx1
   ret void
 }
 
-define amdgpu_kernel void @module_0_kernel_overalign_extern_overalign(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_overalign_extern_overalign(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_overalign_extern_overalign:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_load_dword s0, s[4:5], 0x0
 ; CHECK-NEXT:    v_mov_b32_e32 v0, 0
 ; CHECK-NEXT:    v_mov_b32_e32 v1, 2
 ; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
 ; CHECK-NEXT:    s_lshl_b32 s0, s0, 2
 ; CHECK-NEXT:    s_add_i32 s0, s0, 8

 
 
 ;; Second 2^3 of 2^4 cases encoded into function names
 ; with extern variable from nested function
 ; module_variable used/not-used
 ; kernel variable normal/overaligned
 ; extern variable normal/overaligned
 
-define amdgpu_kernel void @module_0_kernel_normal_indirect_extern_normal(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_normal_indirect_extern_normal(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_normal_indirect_extern_normal:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_add_u32 s8, s8, s11
 ; CHECK-NEXT:    s_mov_b32 s32, 0
 ; CHECK-NEXT:    s_addc_u32 s9, s9, 0
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
 ; CHECK-NEXT:    s_add_u32 s0, s0, s11
; CHECK-NEXT:    s_endpgm
   store i16 1, ptr addrspace(3) @module_variable
 
   store i16 2, ptr addrspace(3) @kernel_normal
 
   call void @use_extern_normal()
   ret void
 }
 
-define amdgpu_kernel void @module_0_kernel_overalign_indirect_extern_normal(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_overalign_indirect_extern_normal(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_overalign_indirect_extern_normal:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_add_u32 s8, s8, s11
 ; CHECK-NEXT:    s_mov_b32 s32, 0
 ; CHECK-NEXT:    s_addc_u32 s9, s9, 0
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
 ; CHECK-NEXT:    s_add_u32 s0, s0, s11
; CHECK-NEXT:    s_endpgm
   store i16 1, ptr addrspace(3) @module_variable
 
   store i16 2, ptr addrspace(3) @kernel_overalign
 
   call void @use_extern_normal()
   ret void
 }
 
-define amdgpu_kernel void @module_0_kernel_normal_indirect_extern_overalign(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_normal_indirect_extern_overalign(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_normal_indirect_extern_overalign:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_add_u32 s8, s8, s11
 ; CHECK-NEXT:    s_mov_b32 s32, 0
 ; CHECK-NEXT:    s_addc_u32 s9, s9, 0
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
 ; CHECK-NEXT:    s_add_u32 s0, s0, s11
; CHECK-NEXT:    s_endpgm
   store i16 1, ptr addrspace(3) @module_variable
 
   store i16 2, ptr addrspace(3) @kernel_normal
 
   call void @use_extern_overalign()
   ret void
 }
 
-define amdgpu_kernel void @module_0_kernel_overalign_indirect_extern_overalign(i32 %idx) #1 {
+define amdgpu_kernel void @module_0_kernel_overalign_indirect_extern_overalign(i32 %idx) {
 ; CHECK-LABEL: module_0_kernel_overalign_indirect_extern_overalign:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    s_add_u32 s8, s8, s11
 ; CHECK-NEXT:    s_mov_b32 s32, 0
 ; CHECK-NEXT:    s_addc_u32 s9, s9, 0
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
 ; CHECK-NEXT:    s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
 ; CHECK-NEXT:    s_add_u32 s0, s0, s11
; CHECK-NEXT:    s_endpgm
   store i16 2, ptr addrspace(3) @kernel_overalign
 
   call void @use_extern_overalign()
   ret void
 }
 
 
 attributes #0 = { noinline }
-attributes #1 = { "amdgpu-elide-module-lds" }

llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll

 ; CHECK-NEXT: ret void
   store i8 1, ptr addrspace(3) @lds.size.1.align.1, align 1
 
   store i8 8, ptr addrspace(3) @lds.size.8.align.8, align 4
 
   ret void
 }
 
-; CHECK: attributes #0 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="23" }
-; CHECK: attributes #1 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="22" }
-; CHECK: attributes #2 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="2" }
-; CHECK: attributes #3 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="4" }
+; CHECK: attributes #0 = { "amdgpu-lds-size"="23" }
+; CHECK: attributes #1 = { "amdgpu-lds-size"="22" }
+; CHECK: attributes #2 = { "amdgpu-lds-size"="2" }
+; CHECK: attributes #3 = { "amdgpu-lds-size"="4" }
 ; CHECK: attributes #4 = { "amdgpu-lds-size"="9" }
 
 ; CHECK: !0 = !{i64 0, i64 1}

llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll

 ; CHECK:      %0 = addrspacecast ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.module.lds.t, ptr addrspace(3) @llvm.amdgcn.module.lds, i32 0, i32 1) to ptr
 ; CHECK:      %1 = ptrtoint ptr %0 to i64
 ; CHECK:      %2 = addrspacecast ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.module.lds.t, ptr addrspace(3) @llvm.amdgcn.module.lds, i32 0, i32 1) to ptr
 ; CHECK:      %3 = ptrtoint ptr %2 to i64
 ; CHECK:      %4 = add i64 %1, %3
 ; CHECK:      %5 = inttoptr i64 %4 to ptr
 ; CHECK:      store i32 %x, ptr %5, align 4
 ; CHECK:      ret void
-define void @set_func(i32 %x) local_unnamed_addr #1 {
+define void @set_func(i32 %x) {
 entry:
   store i32 %x, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64)) to ptr), align 4
   ret void
 }
 
-; CHECK-LABEL: @timestwo() #1
+; CHECK-LABEL: @timestwo() #0
 ; CHECK-NOT: call void @llvm.donothing()
 
 ; CHECK:      %1 = addrspacecast ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds to ptr
 ; CHECK:      %2 = ptrtoint ptr %1 to i64
 ; CHECK:      %3 = addrspacecast ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.kernel.timestwo.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds, i32 0, i32 1) to ptr
 ; CHECK:      %4 = ptrtoint ptr %3 to i64
 ; CHECK:      %5 = add i64 %2, %4
 ; CHECK:      %6 = inttoptr i64 %5 to ptr
 ; CHECK:      %ld = load i32, ptr %6, align 4
 ; CHECK:      %mul = mul i32 %ld, 2
 ; CHECK:      %7 = addrspacecast ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.kernel.timestwo.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds, i32 0, i32 1) to ptr
 ; CHECK:      %8 = ptrtoint ptr %7 to i64
 ; CHECK:      %9 = addrspacecast ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds to ptr
 ; CHECK:      %10 = ptrtoint ptr %9 to i64
 ; CHECK:      %11 = add i64 %8, %10
 ; CHECK:      %12 = inttoptr i64 %11 to ptr
 ; CHECK:      store i32 %mul, ptr %12, align 4
 ; CHECK:      ret void
-define amdgpu_kernel void @timestwo() #1 {
+define amdgpu_kernel void @timestwo() {
   %ld = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @kern to ptr) to i64)) to ptr), align 4
   %mul = mul i32 %ld, 2
   store i32 %mul, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @kern to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64)) to ptr), align 4
   ret void
 }
 
-; CHECK-LABEL: @through_functions() #2
+; CHECK-LABEL: @through_functions() #0
 define amdgpu_kernel void @through_functions() {
   %ld = call i32 @get_func()
   %mul = mul i32 %ld, 4
   call void @set_func(i32 %mul)
   ret void
 }
 
-attributes #0 = { "amdgpu-elide-module-lds" }
-; CHECK: attributes #0 = { "amdgpu-elide-module-lds" }
-; CHECK: attributes #1 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="8" }
-; CHECK: attributes #2 = { "amdgpu-lds-size"="8" }
+; CHECK: attributes #0 = { "amdgpu-lds-size"="8" }

llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck %s
 
-
 ; Not reached by a non-kernel function and therefore not changed by this pass
 @dynamic_kernel_only = external addrspace(3) global [0 x double]
 
 ; shared8 is used directly by a kernel so remains in the outbout
 ; the other three are only used by functions and will be replaced with
 ; table lookups and dropped from the IR
 @dynamic_shared1 = external addrspace(3) global [0 x i8], align 1
 @dynamic_shared2 = external addrspace(3) global [0 x i16], align 2

 ; CHECK: @llvm.amdgcn.expect_max_of_2_and_4.dynlds = external addrspace(3) global [0 x i8], align 4, !absolute_symbol !1
 
 ; Builds a lookup table out of the newly created (suffixed .dynlds) variables in kernel.id order
 ; CHECK: @llvm.amdgcn.dynlds.offset.table = internal addrspace(4) constant [5 x i32] [i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.expect_align1.dynlds to i32), i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.expect_align2.dynlds to i32), i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.expect_align4.dynlds to i32), i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.expect_align8.dynlds to i32), i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.expect_max_of_2_and_4.dynlds to i32)]
 
 
 
 define amdgpu_kernel void @kernel_only() {
-; CHECK-LABEL: @kernel_only() #0 {
+; CHECK-LABEL: @kernel_only() {
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x double], ptr addrspace(3) @dynamic_kernel_only, i32 0, i32 0
 ; CHECK-NEXT:    store double 3.140000e+00, ptr addrspace(3) [[ARRAYIDX]], align 8
 ; CHECK-NEXT:    ret void
 ;
   %arrayidx = getelementptr inbounds [0 x double], ptr addrspace(3) @dynamic_kernel_only, i32 0, i32 0
   store double 3.140000e+00, ptr addrspace(3) %arrayidx
   ret void
 }
 
 ; The accesses from functions are rewritten to go through the llvm.amdgcn.dynlds.offset.table
-define void @use_shared1() #0 {
-; CHECK-LABEL: @use_shared1() #1 {
+define void @use_shared1() {
+; CHECK-LABEL: @use_shared1() {
 ; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
 ; CHECK-NEXT:    [[DYNAMIC_SHARED1:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED1]], align 4
 ; CHECK-NEXT:    [[DYNAMIC_SHARED11:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x i8], ptr addrspace(3) [[DYNAMIC_SHARED11]], i32 0, i32 1
 ; CHECK-NEXT:    store i8 0, ptr addrspace(3) [[ARRAYIDX]], align 1
 ; CHECK-NEXT:    ret void
 ;
   %arrayidx = getelementptr inbounds [0 x i8], ptr addrspace(3) @dynamic_shared1, i32 0, i32 1
   store i8 0, ptr addrspace(3) %arrayidx
   ret void
 }
 
 define void @use_shared2() #0 {
-; CHECK-LABEL: @use_shared2() #1 {
+; CHECK-LABEL: @use_shared2() #0 {
 ; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
 ; CHECK-NEXT:    [[DYNAMIC_SHARED2:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED2]], align 4
 ; CHECK-NEXT:    [[DYNAMIC_SHARED21:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x i16], ptr addrspace(3) [[DYNAMIC_SHARED21]], i32 0, i32 3
 ; CHECK-NEXT:    store i16 1, ptr addrspace(3) [[ARRAYIDX]], align 2
 ; CHECK-NEXT:    ret void
 ;
   %arrayidx = getelementptr inbounds [0 x i16], ptr addrspace(3) @dynamic_shared2, i32 0, i32 3
   store i16 1, ptr addrspace(3) %arrayidx
   ret void
 }
 
 ; Include a normal variable so that the new variables aren't all at the same absolute_symbol
 @static_shared = addrspace(3) global i32 undef
 define void @use_shared4() #0 {
-; CHECK-LABEL: @use_shared4() #1 {
+; CHECK-LABEL: @use_shared4() #0 {
 ; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
 ; CHECK-NEXT:    store i32 4, ptr addrspace(3) @llvm.amdgcn.module.lds, align 4
 ; CHECK-NEXT:    [[DYNAMIC_SHARED4:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED4]], align 4
 ; CHECK-NEXT:    [[DYNAMIC_SHARED41:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x i32], ptr addrspace(3) [[DYNAMIC_SHARED41]], i32 0, i32 5
 ; CHECK-NEXT:    store i32 2, ptr addrspace(3) [[ARRAYIDX]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 4, ptr addrspace(3) @static_shared
   %arrayidx = getelementptr inbounds [0 x i32], ptr addrspace(3) @dynamic_shared4, i32 0, i32 5
   store i32 2, ptr addrspace(3) %arrayidx
   ret void
 }
 
 define void @use_shared8() #0 {
-; CHECK-LABEL: @use_shared8() #1 {
+; CHECK-LABEL: @use_shared8() #0 {
 ; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
 ; CHECK-NEXT:    [[DYNAMIC_SHARED8:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED8]], align 4
 ; CHECK-NEXT:    [[DYNAMIC_SHARED81:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x i64], ptr addrspace(3) [[DYNAMIC_SHARED81]], i32 0, i32 7
 ; CHECK-NEXT:    store i64 3, ptr addrspace(3) [[ARRAYIDX]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %arrayidx = getelementptr inbounds [0 x i64], ptr addrspace(3) @dynamic_shared8, i32 0, i32 7
   store i64 3, ptr addrspace(3) %arrayidx
   ret void
 }
 
 ; The kernels are annotated with kernel.id and llvm.donothing use of the corresponding variable
 define amdgpu_kernel void @expect_align1() {
-; CHECK-LABEL: @expect_align1() #0 !llvm.amdgcn.lds.kernel.id !2
+; CHECK-LABEL: @expect_align1() !llvm.amdgcn.lds.kernel.id !2
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align1.dynlds) ]
 ; CHECK-NEXT:    call void @use_shared1()
 ; CHECK-NEXT:    ret void
 ;
   call void @use_shared1()
   ret void
 }
 
 define amdgpu_kernel void @expect_align2() {
-; CHECK-LABEL: @expect_align2() #0 !llvm.amdgcn.lds.kernel.id !3
+; CHECK-LABEL: @expect_align2() !llvm.amdgcn.lds.kernel.id !3
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align2.dynlds) ]
 ; CHECK-NEXT:    call void @use_shared2()
 ; CHECK-NEXT:    ret void
 ;
   call void @use_shared2()
   ret void
 }
 
 define amdgpu_kernel void @expect_align4() {
-; CHECK-LABEL: @expect_align4() #2 !llvm.amdgcn.lds.kernel.id !4 {
+; CHECK-LABEL: @expect_align4() #1 !llvm.amdgcn.lds.kernel.id !4 {
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align4.dynlds) ]
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]
 ; CHECK-NEXT:    call void @use_shared4()
 ; CHECK-NEXT:    ret void
 ;
   call void @use_shared4()
   ret void
 }
 
-; Use dynamic_shared directly too. Can elide module lds (#0) 
+; Use dynamic_shared directly too.
 define amdgpu_kernel void @expect_align8() {
-; CHECK-LABEL: @expect_align8() #0 !llvm.amdgcn.lds.kernel.id !5 {
+; CHECK-LABEL: @expect_align8() !llvm.amdgcn.lds.kernel.id !5 {
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align8.dynlds) ]
 ; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x i64], ptr addrspace(3) @dynamic_shared8, i32 0, i32 9
 ; CHECK-NEXT:    store i64 3, ptr addrspace(3) [[ARRAYIDX]], align 4
 ; CHECK-NEXT:    call void @use_shared8()
 ; CHECK-NEXT:    ret void
 ;
   %arrayidx = getelementptr inbounds [0 x i64], ptr addrspace(3) @dynamic_shared8, i32 0, i32 9
   store i64 3, ptr addrspace(3) %arrayidx
   call void @use_shared8()
   ret void
 }
 
 ; Note: use_shared4 uses module.lds so this will allocate at offset 4
 define amdgpu_kernel void @expect_max_of_2_and_4() {
-; CHECK-LABEL: @expect_max_of_2_and_4() #2 !llvm.amdgcn.lds.kernel.id !6 {
+; CHECK-LABEL: @expect_max_of_2_and_4() #1 !llvm.amdgcn.lds.kernel.id !6 {
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_max_of_2_and_4.dynlds) ]
 ; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]
 ; CHECK-NEXT:    call void @use_shared2()
 ; CHECK-NEXT:    call void @use_shared4()
 ; CHECK-NEXT:    ret void
 ;
   call void @use_shared2()
   call void @use_shared4()
   ret void
 }
 
 
 attributes #0 = { noinline }
 
 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
-; CHECK: declare void @llvm.donothing() #3
+; CHECK: declare void @llvm.donothing() #2
 
 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
-; CHECK: declare i32 @llvm.amdgcn.lds.kernel.id() #4
+; CHECK: declare i32 @llvm.amdgcn.lds.kernel.id() #3
 
-; CHECK: attributes #0 = { "amdgpu-elide-module-lds" }
-; CHECK: attributes #1 = { noinline }
-; CHECK: attributes #2 = { "amdgpu-lds-size"="4" }
-; CHECK: attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
-; CHECK: attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+; CHECK: attributes #0 = { noinline }
+; CHECK: attributes #1 = { "amdgpu-lds-size"="4" }
+; CHECK: attributes #2 = { nocallback nofree nosync nounwind willreturn memory(none) }
+; CHECK: attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
 
 ; CHECK: !0 = !{i64 0, i64 1}
 ; CHECK: !1 = !{i64 4, i64 5}
 ; CHECK: !2 = !{i32 0}
 ; CHECK: !3 = !{i32 1}
 ; CHECK: !4 = !{i32 2}
 ; CHECK: !5 = !{i32 3}
 ; CHECK: !6 = !{i32 4}

llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll

 define void @f0() {
 ; OPT-LABEL: @f0() {
 ; OPT-NEXT:    store i8 3, ptr addrspace(3) @llvm.amdgcn.module.lds, align 1
 ; OPT-NEXT:    ret void
 ;
   store i8 3, ptr addrspace(3) @lds.size.1.align.1, align 1
   ret void
 }
-
-attributes #0 = { "amdgpu-elide-module-lds" }
-; CHECK: attributes #0 = { "amdgpu-elide-module-lds" }

llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll

 
 ; OPT: declare i32 @llvm.amdgcn.lds.kernel.id()
 
 !0 = !{i32 0}
 !1 = !{i32 2}
 !2 = !{i32 1}
 
 
-; OPT: attributes #0 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="8" }
-; OPT: attributes #1 = { "amdgpu-lds-size"="8" }
-; OPT: attributes #2 = { "amdgpu-elide-module-lds" "amdgpu-lds-size"="12" }
-; OPT: attributes #3 = { "amdgpu-lds-size"="20" }
-; OPT: attributes #4 = { nocallback nofree nosync nounwind willreturn memory(none) }
-; OPT: attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+; OPT: attributes #0 = { "amdgpu-lds-size"="8" }
+; OPT: attributes #1 = { "amdgpu-lds-size"="12" }
+; OPT: attributes #2 = { "amdgpu-lds-size"="20" }
+; OPT: attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
+; OPT: attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
 
 ; OPT: !0 = !{i64 0, i64 1}
 ; OPT: !1 = !{i64 4, i64 5}
 ; OPT: !2 = !{i64 8, i64 9}
 ; OPT: !3 = !{i32 1}
 ; OPT: !4 = !{!5}
 ; OPT: !5 = distinct !{!5, !6}
 ; OPT: !6 = distinct !{!6}

llvm/test/CodeGen/AMDGPU/lower-module-lds.ll

 ; CHECK: %dec = atomicrmw fsub ptr addrspace(3) @llvm.amdgcn.module.lds, float 2.000000e+00 monotonic, align 8
 define amdgpu_kernel void @kern_call() {
   call void @func()
   %dec = atomicrmw fsub ptr addrspace(3) @var0, float 2.0 monotonic
   ret void
 }
 
 ; This kernel does alloc the LDS block as it makes no calls
-; CHECK-LABEL: @kern_empty() #1
+; CHECK-LABEL: @kern_empty()
 ; CHECK-NOT: call void @llvm.donothing()
-define spir_kernel void @kern_empty() #0{
+define spir_kernel void @kern_empty() {
   ret void
 }
 
 ; Make sure we don't crash trying to insert code into a kernel
 ; declaration.
 declare amdgpu_kernel void @kernel_declaration()
 
-attributes #0 = { "amdgpu-elide-module-lds" }
-
 ; CHECK: attributes #0 = { "amdgpu-lds-size"="12" }
-; CHECK: attributes #1 = { "amdgpu-elide-module-lds" }