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Differential D155097

[mlir][spirv] NFC: use CHECK-LABEL to make test boundary clear
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Authored by antiagainst on Jul 12 2023, 9:16 AM.

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kuhar
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rG715731bbd2a7: [mlir][spirv] NFC: use CHECK-LABEL to make test boundary clear

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antiagainst created this revision.Jul 12 2023, 9:16 AM
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antiagainst updated this revision to Diff 539598.Jul 12 2023, 9:21 AM

Update test name

Harbormaster completed remote builds in B244823: Diff 539598.Jul 12 2023, 12:48 PM
kuhar accepted this revision.Jul 12 2023, 1:04 PM
This revision is now accepted and ready to land.Jul 12 2023, 1:04 PM
Closed by commit rG715731bbd2a7: [mlir][spirv] NFC: use CHECK-LABEL to make test boundary clear (authored by antiagainst). · Explain WhyJul 12 2023, 2:34 PM
This revision was automatically updated to reflect the committed changes.
antiagainst added a commit: rG715731bbd2a7: [mlir][spirv] NFC: use CHECK-LABEL to make test boundary clear.

Revision Contents

PathSize
mlir/
test/
Conversion/
MemRefToSPIRV/
64 lines

Diff 539737

mlir/test/Conversion/MemRefToSPIRV/alloc.mlir

// RUN: mlir-opt -split-input-file -convert-memref-to-spirv -canonicalize -verify-diagnostics %s -o - | FileCheck %s // RUN: mlir-opt -split-input-file -convert-memref-to-spirv -canonicalize -verify-diagnostics %s -o - | FileCheck %s
module attributes { module attributes {
spirv.target_env = #spirv.target_env< spirv.target_env = #spirv.target_env<
#spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
} }
{ {
func.func @alloc_dealloc_workgroup_mem(%arg0 : index, %arg1 : index) { func.func @alloc_dealloc_workgroup_mem_shader_f32(%arg0 : index, %arg1 : index) {
%0 = memref.alloc() : memref<4x5xf32, #spirv.storage_class<Workgroup>> %0 = memref.alloc() : memref<4x5xf32, #spirv.storage_class<Workgroup>>
%1 = memref.load %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>> %1 = memref.load %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>>
memref.store %1, %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>> memref.store %1, %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>>
memref.dealloc %0 : memref<4x5xf32, #spirv.storage_class<Workgroup>> memref.dealloc %0 : memref<4x5xf32, #spirv.storage_class<Workgroup>>
return return
} }
} }
// CHECK: spirv.GlobalVariable @[[VAR:.+]] : !spirv.ptr<!spirv.struct<(!spirv.array<20 x f32>)>, Workgroup> // CHECK: spirv.GlobalVariable @[[$VAR:.+]] : !spirv.ptr<!spirv.struct<(!spirv.array<20 x f32>)>, Workgroup>
// CHECK: func @alloc_dealloc_workgroup_mem // CHECK-LABEL: func @alloc_dealloc_workgroup_mem_shader_f32
// CHECK-NOT: memref.alloc // CHECK-NOT: memref.alloc
// CHECK: %[[PTR:.+]] = spirv.mlir.addressof @[[VAR]] // CHECK: %[[PTR:.+]] = spirv.mlir.addressof @[[$VAR]]
// CHECK: %[[LOADPTR:.+]] = spirv.AccessChain %[[PTR]] // CHECK: %[[LOADPTR:.+]] = spirv.AccessChain %[[PTR]]
// CHECK: %[[VAL:.+]] = spirv.Load "Workgroup" %[[LOADPTR]] : f32 // CHECK: %[[VAL:.+]] = spirv.Load "Workgroup" %[[LOADPTR]] : f32
// CHECK: %[[STOREPTR:.+]] = spirv.AccessChain %[[PTR]] // CHECK: %[[STOREPTR:.+]] = spirv.AccessChain %[[PTR]]
// CHECK: spirv.Store "Workgroup" %[[STOREPTR]], %[[VAL]] : f32 // CHECK: spirv.Store "Workgroup" %[[STOREPTR]], %[[VAL]] : f32
// CHECK-NOT: memref.dealloc // CHECK-NOT: memref.dealloc
// ----- // -----
module attributes { module attributes {
spirv.target_env = #spirv.target_env< spirv.target_env = #spirv.target_env<
#spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
} }
{ {
func.func @alloc_dealloc_workgroup_mem(%arg0 : index, %arg1 : index) { func.func @alloc_dealloc_workgroup_mem_shader_i16(%arg0 : index, %arg1 : index) {
%0 = memref.alloc() : memref<4x5xi16, #spirv.storage_class<Workgroup>> %0 = memref.alloc() : memref<4x5xi16, #spirv.storage_class<Workgroup>>
%1 = memref.load %0[%arg0, %arg1] : memref<4x5xi16, #spirv.storage_class<Workgroup>> %1 = memref.load %0[%arg0, %arg1] : memref<4x5xi16, #spirv.storage_class<Workgroup>>
memref.store %1, %0[%arg0, %arg1] : memref<4x5xi16, #spirv.storage_class<Workgroup>> memref.store %1, %0[%arg0, %arg1] : memref<4x5xi16, #spirv.storage_class<Workgroup>>
memref.dealloc %0 : memref<4x5xi16, #spirv.storage_class<Workgroup>> memref.dealloc %0 : memref<4x5xi16, #spirv.storage_class<Workgroup>>
return return
} }
} }
// CHECK: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}} // CHECK: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}}
// CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<10 x i32>)>, Workgroup> // CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<10 x i32>)>, Workgroup>
// CHECK: func @alloc_dealloc_workgroup_mem // CHECK-LABEL: func @alloc_dealloc_workgroup_mem_shader_i16
// CHECK: %[[VAR:.+]] = spirv.mlir.addressof @__workgroup_mem__0 // CHECK: %[[VAR:.+]] = spirv.mlir.addressof @__workgroup_mem__0
// CHECK: %[[LOC:.+]] = spirv.SDiv // CHECK: %[[LOC:.+]] = spirv.SDiv
// CHECK: %[[PTR:.+]] = spirv.AccessChain %[[VAR]][%{{.+}}, %[[LOC]]] // CHECK: %[[PTR:.+]] = spirv.AccessChain %[[VAR]][%{{.+}}, %[[LOC]]]
// CHECK: %{{.+}} = spirv.Load "Workgroup" %[[PTR]] : i32 // CHECK: %{{.+}} = spirv.Load "Workgroup" %[[PTR]] : i32
// CHECK: %[[LOC:.+]] = spirv.SDiv // CHECK: %[[LOC:.+]] = spirv.SDiv
// CHECK: %[[PTR:.+]] = spirv.AccessChain %[[VAR]][%{{.+}}, %[[LOC]]] // CHECK: %[[PTR:.+]] = spirv.AccessChain %[[VAR]][%{{.+}}, %[[LOC]]]
// CHECK: %{{.+}} = spirv.AtomicAnd "Workgroup" "AcquireRelease" %[[PTR]], %{{.+}} : !spirv.ptr<i32, Workgroup> // CHECK: %{{.+}} = spirv.AtomicAnd "Workgroup" "AcquireRelease" %[[PTR]], %{{.+}} : !spirv.ptr<i32, Workgroup>
// CHECK: %{{.+}} = spirv.AtomicOr "Workgroup" "AcquireRelease" %[[PTR]], %{{.+}} : !spirv.ptr<i32, Workgroup> // CHECK: %{{.+}} = spirv.AtomicOr "Workgroup" "AcquireRelease" %[[PTR]], %{{.+}} : !spirv.ptr<i32, Workgroup>
// ----- // -----
module attributes { module attributes {
spirv.target_env = #spirv.target_env< spirv.target_env = #spirv.target_env<
#spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
} }
{ {
func.func @two_allocs() { func.func @two_allocs() {
%0 = memref.alloc() : memref<4x5xf32, #spirv.storage_class<Workgroup>> %0 = memref.alloc() : memref<4x5xf32, #spirv.storage_class<Workgroup>>
%1 = memref.alloc() : memref<2x3xi32, #spirv.storage_class<Workgroup>> %1 = memref.alloc() : memref<2x3xi32, #spirv.storage_class<Workgroup>>
return return
} }
} }
// CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}} // CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}}
// CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<6 x i32>)>, Workgroup> // CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<6 x i32>)>, Workgroup>
// CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}} // CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}}
// CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<20 x f32>)>, Workgroup> // CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<20 x f32>)>, Workgroup>
// CHECK: func @two_allocs() // CHECK-LABEL: func @two_allocs()
// ----- // -----
module attributes { module attributes {
spirv.target_env = #spirv.target_env< spirv.target_env = #spirv.target_env<
#spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
} }
{ {
func.func @two_allocs_vector() { func.func @two_allocs_vector() {
%0 = memref.alloc() : memref<4xvector<4xf32>, #spirv.storage_class<Workgroup>> %0 = memref.alloc() : memref<4xvector<4xf32>, #spirv.storage_class<Workgroup>>
%1 = memref.alloc() : memref<2xvector<2xi32>, #spirv.storage_class<Workgroup>> %1 = memref.alloc() : memref<2xvector<2xi32>, #spirv.storage_class<Workgroup>>
return return
} }
} }
// CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}} // CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}}
// CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<2 x vector<2xi32>>)>, Workgroup> // CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<2 x vector<2xi32>>)>, Workgroup>
// CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}} // CHECK-DAG: spirv.GlobalVariable @__workgroup_mem__{{[0-9]+}}
// CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<4 x vector<4xf32>>)>, Workgroup> // CHECK-SAME: !spirv.ptr<!spirv.struct<(!spirv.array<4 x vector<4xf32>>)>, Workgroup>
// CHECK: func @two_allocs_vector() // CHECK-LABEL: func @two_allocs_vector()
// ----- // -----
module attributes { module attributes {
spirv.target_env = #spirv.target_env< spirv.target_env = #spirv.target_env<
#spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
} }
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} }
// ----- // -----
module attributes { module attributes {
spirv.target_env = #spirv.target_env< spirv.target_env = #spirv.target_env<
#spirv.vce<v1.0, [Kernel], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> #spirv.vce<v1.0, [Kernel], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
} }
{ {
func.func @alloc_dealloc_workgroup_mem(%arg0 : index, %arg1 : index) { func.func @alloc_dealloc_workgroup_mem_kernel(%arg0 : index, %arg1 : index) {
%0 = memref.alloc() : memref<4x5xf32, #spirv.storage_class<Workgroup>> %0 = memref.alloc() : memref<4x5xf32, #spirv.storage_class<Workgroup>>
%1 = memref.load %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>> %1 = memref.load %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>>
memref.store %1, %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>> memref.store %1, %0[%arg0, %arg1] : memref<4x5xf32, #spirv.storage_class<Workgroup>>
memref.dealloc %0 : memref<4x5xf32, #spirv.storage_class<Workgroup>> memref.dealloc %0 : memref<4x5xf32, #spirv.storage_class<Workgroup>>
return return
} }
} }
// CHECK: spirv.GlobalVariable @[[VAR:.+]] : !spirv.ptr<!spirv.array<20 x f32>, Workgroup> // CHECK: spirv.GlobalVariable @[[$VAR:.+]] : !spirv.ptr<!spirv.array<20 x f32>, Workgroup>
// CHECK: func @alloc_dealloc_workgroup_mem // CHECK-LABEL: func @alloc_dealloc_workgroup_mem_kernel
// CHECK-NOT: memref.alloc // CHECK-NOT: memref.alloc
// CHECK: %[[PTR:.+]] = spirv.mlir.addressof @[[VAR]] // CHECK: %[[PTR:.+]] = spirv.mlir.addressof @[[$VAR]]
// CHECK: %[[LOADPTR:.+]] = spirv.AccessChain %[[PTR]] // CHECK: %[[LOADPTR:.+]] = spirv.AccessChain %[[PTR]]
// CHECK: %[[VAL:.+]] = spirv.Load "Workgroup" %[[LOADPTR]] : f32 // CHECK: %[[VAL:.+]] = spirv.Load "Workgroup" %[[LOADPTR]] : f32
// CHECK: %[[STOREPTR:.+]] = spirv.AccessChain %[[PTR]] // CHECK: %[[STOREPTR:.+]] = spirv.AccessChain %[[PTR]]
// CHECK: spirv.Store "Workgroup" %[[STOREPTR]], %[[VAL]] : f32 // CHECK: spirv.Store "Workgroup" %[[STOREPTR]], %[[VAL]] : f32
// CHECK-NOT: memref.dealloc // CHECK-NOT: memref.dealloc