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Differential D152780

[MLIR][Tests] Update tests so they require assertions
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Authored by rogfer01 on Jun 13 2023, 12:49 AM.

Details

Reviewers
dtzSiFive
ftynse
dcaballe
nicolasvasilache
Commits
rG666a56f1f168: [MLIR][Tests] Update tests so they require assertions
Summary

These tests are currently failing under BUILD_TYPE=Release or BUILD_TYPE=RelWithDebInfo.

As explained in https://github.com/llvm/llvm-project/issues/63208#issuecomment-1587390013 statistics are gated to LLVM_ENABLE_STATS which needs REQUIRES: asserts to work.

This change adds the REQUIRES lines.

Diff Detail

Event Timeline

rogfer01 created this revision.Jun 13 2023, 12:49 AM
Herald added a reviewer: ftynse. · View Herald TranscriptJun 13 2023, 12:49 AM
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rogfer01 requested review of this revision.Jun 13 2023, 12:49 AM
Herald added a reviewer: nicolasvasilache. · View Herald TranscriptJun 13 2023, 12:49 AM
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ftynse accepted this revision.Jun 13 2023, 1:04 AM
This revision is now accepted and ready to land.Jun 13 2023, 1:04 AM
Harbormaster completed remote builds in B238409: Diff 530799.Jun 13 2023, 1:48 AM
Closed by commit rG666a56f1f168: [MLIR][Tests] Update tests so they require assertions (authored by rogfer01). · Explain WhyJun 13 2023, 9:01 AM
This revision was automatically updated to reflect the committed changes.
rogfer01 added a commit: rG666a56f1f168: [MLIR][Tests] Update tests so they require assertions.

Revision Contents

PathSize
mlir/
test/
Dialect/
LLVMIR/
1 line
MemRef/
1 line

Diff 530928

mlir/test/Dialect/LLVMIR/sroa-statistics.mlir

// REQUIRES: asserts
// RUN: mlir-opt %s --pass-pipeline="builtin.module(llvm.func(sroa))" --split-input-file --mlir-pass-statistics 2>&1 >/dev/null | FileCheck %s // RUN: mlir-opt %s --pass-pipeline="builtin.module(llvm.func(sroa))" --split-input-file --mlir-pass-statistics 2>&1 >/dev/null | FileCheck %s
// CHECK: SROA // CHECK: SROA
// CHECK-NEXT: (S) 1 destructured slots // CHECK-NEXT: (S) 1 destructured slots
// CHECK-NEXT: (S) 2 max subelement number // CHECK-NEXT: (S) 2 max subelement number
// CHECK-NEXT: (S) 1 slots with memory benefit // CHECK-NEXT: (S) 1 slots with memory benefit
llvm.func @basic() -> i32 { llvm.func @basic() -> i32 {
%0 = llvm.mlir.constant(1 : i32) : i32 %0 = llvm.mlir.constant(1 : i32) : i32
▲ Show 20 Lines • Show All 53 Lines • Show Last 20 Lines

mlir/test/Dialect/MemRef/mem2reg-statistics.mlir

// REQUIRES: asserts
// RUN: mlir-opt %s --pass-pipeline='builtin.module(func.func(mem2reg))' --split-input-file --mlir-pass-statistics 2>&1 >/dev/null | FileCheck %s // RUN: mlir-opt %s --pass-pipeline='builtin.module(func.func(mem2reg))' --split-input-file --mlir-pass-statistics 2>&1 >/dev/null | FileCheck %s
// CHECK: Mem2Reg // CHECK: Mem2Reg
// CHECK-NEXT: (S) 0 new block args // CHECK-NEXT: (S) 0 new block args
// CHECK-NEXT: (S) 1 promoted slots // CHECK-NEXT: (S) 1 promoted slots
func.func @basic() -> i32 { func.func @basic() -> i32 {
%0 = arith.constant 5 : i32 %0 = arith.constant 5 : i32
%1 = memref.alloca() : memref<i32> %1 = memref.alloca() : memref<i32>
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines