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Differential D152703

[MISched] Require asserts and AArch64 registered target for test.
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Authored by fpetrogalli on Jun 12 2023, 4:44 AM.

Details

Reviewers
fhahn
Commits
rG45902a25fa19: [MISched] Require asserts and AArch64 registered target for test.
Summary

Fixes failure at https://lab.llvm.org/buildbot/#/builders/124/builds/7472:

llc: Unknown command line argument '-debug-only=machine-scheduler'. Try: '/home/buildbot/as-worker-91/clang-with-lto-ubuntu/build/stage1/bin/llc --help'

Diff Detail

Event Timeline

fpetrogalli created this revision.Jun 12 2023, 4:44 AM
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fpetrogalli requested review of this revision.Jun 12 2023, 4:44 AM
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fhahn accepted this revision.Jun 12 2023, 4:49 AM
fhahn added a subscriber: fhahn.

LGTM, thanks!

This revision is now accepted and ready to land.Jun 12 2023, 4:49 AM
Herald added a subscriber: StephenFan. · View Herald TranscriptJun 12 2023, 4:49 AM
This revision was landed with ongoing or failed builds.Jun 12 2023, 4:52 AM
Closed by commit rG45902a25fa19: [MISched] Require asserts and AArch64 registered target for test. (authored by fpetrogalli). · Explain Why
This revision was automatically updated to reflect the committed changes.
fpetrogalli added a commit: rG45902a25fa19: [MISched] Require asserts and AArch64 registered target for test..
fpetrogalli added a comment.Jun 12 2023, 4:52 AM
In D152703#4413499, @fhahn wrote:

LGTM, thanks!

Sweet, thanks!

Harbormaster completed remote builds in B238156: Diff 530462.Jun 12 2023, 5:23 AM

Revision Contents

PathSize
llvm/
test/
CodeGen/
AArch64/
1 line

Diff 530465

llvm/test/CodeGen/AArch64/misched-sort-resource-in-trace.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m3 -verify-machineinstrs \ # RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m3 -verify-machineinstrs \
# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \ # RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \
# RUN: -misched-topdown=true -sched-print-cycles=true \ # RUN: -misched-topdown=true -sched-print-cycles=true \
# RUN: -misched-dump-schedule-trace=true --misched-sort-resources-in-trace=true 2>&1 | FileCheck --check-prefix=SORTED %s # RUN: -misched-dump-schedule-trace=true --misched-sort-resources-in-trace=true 2>&1 | FileCheck --check-prefix=SORTED %s
# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m3 -verify-machineinstrs \ # RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=exynos-m3 -verify-machineinstrs \
# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \ # RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \
# RUN: -misched-topdown=true -sched-print-cycles=true \ # RUN: -misched-topdown=true -sched-print-cycles=true \
# RUN: -misched-dump-schedule-trace=true --misched-sort-resources-in-trace=false 2>&1 | FileCheck --check-prefix=UNSORTED %s # RUN: -misched-dump-schedule-trace=true --misched-sort-resources-in-trace=false 2>&1 | FileCheck --check-prefix=UNSORTED %s
# REQUIRES: asserts, aarch64-registered-target
--- ---
name: test name: test
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $x0, $x1, $x3, $x4, $q2 liveins: $x0, $x1, $x3, $x4, $q2
$x0, $q2 = LD1i32_POST $q2, 0, $x0, $x0 :: ("aarch64-strided-access" load (s32)) $x0, $q2 = LD1i32_POST $q2, 0, $x0, $x0 :: ("aarch64-strided-access" load (s32))
$x1, $q2 = LD1i32_POST $q2, 0, $x1, $x1 :: ("aarch64-strided-access" load (s32)) $x1, $q2 = LD1i32_POST $q2, 0, $x1, $x1 :: ("aarch64-strided-access" load (s32))
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