[AMDGPU] Add basic support for gfx11xx

[giuseros]

Summary

This patch fixes a minor issue in AMDGPUToROCDL to add gfx11 support in MLIR

[krzysz00]

@giuseros I'm willing to approve this if you add me as a reviewer.

Though can you update the commit message to mention the bug you're fixing and that the fix here is to set the correct buffer flags on gfx11 (because gfx11 acts like gfx10 for the purposes of those instructions)?

[giuseros]

Updating the commit message

[giuseros]

Adding github issue reference in the commit message

[arsenm]

Missing test

[giuseros]

Adding test

mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp

matchAndRewrite(GpuOp gpuOp, typename GpuOp::Adaptor adaptor,
     // bit 23: Add thread ID (0)
     // bit 24: Reserved to 1 (RDNA) or 0 (CDNA)
     // bits 25-26: Reserved (0)
     // bit 27: Buffer is non-volatile (CDNA only)
     // bits 28-29: Out of bounds select (0 = structured, 1 = check index, 2 =
     //  none, 3 = either swizzles or testing against offset field) RDNA only
     // bits 30-31: Type (must be 0)
     uint32_t word3 = (7 << 12) | (4 << 15);
-    if (chipset.majorVersion == 10) {
+    if (chipset.majorVersion >= 10) {
       word3 |= (1 << 24);
       uint32_t oob = adaptor.getBoundsCheck() ? 3 : 2;
       word3 |= (oob << 28);
     }
     Value word3Const = createI32Constant(rewriter, loc, word3);
     resource = rewriter.create<LLVM::InsertElementOp>(
         loc, llvm4xI32, resource, word3Const,
         this->createIndexConstant(rewriter, loc, 3));

mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir

 // RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx908 | FileCheck %s
 // RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx1030 | FileCheck %s --check-prefix=RDNA
+// RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx1100 | FileCheck %s --check-prefix=RDNA
 
 // CHECK-LABEL: func @gpu_gcn_raw_buffer_load_scalar_i32
 func.func @gpu_gcn_raw_buffer_load_scalar_i32(%buf: memref<i32>) -> i32 {
   // CHECK: %[[ptr:.*]] = llvm.ptrtoint
   // CHECK: %[[lowHalf:.*]] = llvm.trunc %[[ptr]] : i64 to i32
   // CHECK: %[[resource_1:.*]] = llvm.insertelement %[[lowHalf]]
   // CHECK: %[[highHalfI64:.*]] = llvm.lshr %[[ptr]]
   // CHECK: %[[highHalfI32:.*]] = llvm.trunc %[[highHalfI64]] : i64 to i32