AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic

[arsenm]

Summary

This barely matters since 99% are converted to the generic intrinsic now,
and the only real difference is the target intrinsic supports a variable
test mask. Start propagating poison. Prefer folding to a defined result (false)
for an undef test mask. Propagate undef for the first operand.

[rampitec]

LGTM

[foad]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

471

I don't think this is sound, e.g if the RHS is 0 (but not a ConstantInt) then the result should be 0, not undef.

Perhaps you could fold it to RHS != 0?

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

471

icmp ne x, undef folds to undef, so that would be the same thing

[foad]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

471

No we're talking about the case where LHS is undef.

[arsenm]

Compare with undef

[arsenm]

8609df7c6e91301af72080caab01b2edcef78b33

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

if (CMask) {
           II.getModule(), Intrinsic::is_fpclass, Src0->getType()));
 
       // Clamp any excess bits, as they're illegal for the generic intrinsic.
       II.setArgOperand(1, ConstantInt::get(Src1->getType(),
                                            CMask->getZExtValue() & fcAllFlags));
       return ⅈ
     }
 
-    // FIXME: Should propagate poison.
-    if (isa<UndefValue>(Src0))
-      return IC.replaceInstUsesWith(II, UndefValue::get(II.getType()));
+    // Propagate poison.
+    if (isa<PoisonValue>(Src0) || isa<PoisonValue>(Src1))
+      return IC.replaceInstUsesWith(II, PoisonValue::get(II.getType()));
 
-    if (isa<UndefValue>(Src1)) {
+    // llvm.amdgcn.class(_, undef) -> false
+    if (IC.getSimplifyQuery().isUndefValue(Src1))
       return IC.replaceInstUsesWith(II, ConstantInt::get(II.getType(), false));
-    }
 
+    // llvm.amdgcn.class(undef, mask) -> mask != 0
+    if (IC.getSimplifyQuery().isUndefValue(Src0)) {
+      Value *CmpMask = IC.Builder.CreateICmpNE(
+          Src1, ConstantInt::getNullValue(Src1->getType()));
+      return IC.replaceInstUsesWith(II, CmpMask);
+    }
     break;
   }
   case Intrinsic::amdgcn_cvt_pkrtz: {
     Value *Src0 = II.getArgOperand(0);
     Value *Src1 = II.getArgOperand(1);
     if (const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
       if (const ConstantFP *C1 = dyn_cast<ConstantFP>(Src1)) {
         const fltSemantics &HalfSem =

llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

 ; CHECK-NEXT:    ret i1 false
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float %x, i32 undef)
   ret i1 %val
 }
 
 define i1 @test_class_poison_poison_f32(float %x) nounwind {
 ; CHECK-LABEL: @test_class_poison_poison_f32(
-; CHECK-NEXT:    ret i1 undef
+; CHECK-NEXT:    ret i1 poison
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float poison, i32 poison)
   ret i1 %val
 }
 define i1 @test_class_val_poison_f32(float %arg) nounwind {
 ; CHECK-LABEL: @test_class_val_poison_f32(
-; CHECK-NEXT:    ret i1 false
+; CHECK-NEXT:    ret i1 poison
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float %arg, i32 poison)
   ret i1 %val
 }
 
 define i1 @test_class_poison_val_f32(i32 %arg) nounwind {
 ; CHECK-LABEL: @test_class_poison_val_f32(
-; CHECK-NEXT:    ret i1 undef
+; CHECK-NEXT:    ret i1 poison
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float poison, i32 %arg)
   ret i1 %val
 }
 
 define i1 @test_class_over_max_mask_f32(float %x) nounwind {
 ; CHECK-LABEL: @test_class_over_max_mask_f32(
 ; CHECK-NEXT:    [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 1)

 define i1 @test_class_undef_val_f32() nounwind {
 ; CHECK-LABEL: @test_class_undef_val_f32(
 ; CHECK-NEXT:    ret i1 undef
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float undef, i32 4)
   ret i1 %val
 }
 
+define i1 @test_class_undef_val_f32_var(i32 %arg) nounwind {
+; CHECK-LABEL: @test_class_undef_val_f32_var(
+; CHECK-NEXT:    [[VAL:%.*]] = icmp ne i32 [[ARG:%.*]], 0
+; CHECK-NEXT:    ret i1 [[VAL]]
+;
+  %val = call i1 @llvm.amdgcn.class.f32(float undef, i32 %arg)
+  ret i1 %val
+}
+
 define i1 @test_class_val_undef_f32(float %arg) nounwind {
 ; CHECK-LABEL: @test_class_val_undef_f32(
 ; CHECK-NEXT:    ret i1 false
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float %arg, i32 undef)
   ret i1 %val
 }
 
 define i1 @test_class_undef_undef_f32() nounwind {
 ; CHECK-LABEL: @test_class_undef_undef_f32(
-; CHECK-NEXT:    ret i1 undef
+; CHECK-NEXT:    ret i1 false
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float undef, i32 undef)
   ret i1 %val
 }
 
 define i1 @test_class_var_mask_f32(float %x, i32 %mask) nounwind {
 ; CHECK-LABEL: @test_class_var_mask_f32(
 ; CHECK-NEXT:    [[VAL:%.*]] = call i1 @llvm.amdgcn.class.f32(float [[X:%.*]], i32 [[MASK:%.*]])