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Differential D150694

[clang] Convert NVPTX OpenMP tests to opaque pointers
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Authored by barannikov88 on May 16 2023, 10:40 AM.

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nikic
jdoerfert
Commits
rG9beb817cc8db: [clang] Convert NVPTX OpenMP tests to opaque pointers

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barannikov88 created this revision.May 16 2023, 10:40 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 16 2023, 10:40 AM
Herald added subscribers: sunshaoce, mattd, gchakrabarti and 4 others. · View Herald Transcript
barannikov88 requested review of this revision.May 16 2023, 10:40 AM
Herald added a reviewer: jdoerfert. · View Herald TranscriptMay 16 2023, 10:40 AM
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barannikov88 added a comment.EditedMay 16 2023, 10:42 AM

These were completely handled by the script except that I manually renumbered basic blocks in the large SIMD test.

barannikov88 planned changes to this revision.May 16 2023, 10:46 AM

Nah, they need some hand work after all.

barannikov88 updated this revision to Diff 522718.May 16 2023, 11:08 AM

Update failing checks

nikic accepted this revision.May 16 2023, 12:17 PM

LGTM

This revision is now accepted and ready to land.May 16 2023, 12:17 PM
Harbormaster completed remote builds in B232382: Diff 522718.May 16 2023, 3:08 PM
Closed by commit rG9beb817cc8db: [clang] Convert NVPTX OpenMP tests to opaque pointers (authored by barannikov88). · Explain WhyMay 16 2023, 3:10 PM
This revision was automatically updated to reflect the committed changes.
barannikov88 added a commit: rG9beb817cc8db: [clang] Convert NVPTX OpenMP tests to opaque pointers.

Revision Contents

Diff 522808

clang/test/OpenMP/nvptx_SPMD_codegen.cpp

This file has a very large number of changes (23,024 lines). Show File Contents

clang/test/OpenMP/nvptx_param_translate.c

// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s
// expected-no-diagnostics // expected-no-diagnostics
// CHECK: [[MAP_FN:%.+]] = load void (i8*, ...)*, void (i8*, ...)** % // CHECK: store ptr @{{.+}}, ptr [[FN:%[^,]+]],
// CHECK: [[FN:%.+]] = bitcast void (i8*, ...)* [[MAP_FN]] to void (i8*, // CHECK: [[MAP_FN:%.+]] = load ptr, ptr [[FN]]
// CHECK: call void [[FN]](i8* % // CHECK: call void [[MAP_FN]](ptr %
int main() { int main() {
double a, b; double a, b;
#pragma omp target map(tofrom \ #pragma omp target map(tofrom \
: a) map(to \ : a) map(to \
: b) : b)
{ {
#pragma omp taskgroup #pragma omp taskgroup
#pragma omp task shared(a) #pragma omp task shared(a)
a = b; a = b;
} }
return 0; return 0;
} }

clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp

// Test target codegen - host bc file has to be created first. // Test target codegen - host bc file has to be created first.
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 // RUN: %clang_cc1 -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 // RUN: %clang_cc1 -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
// expected-no-diagnostics // expected-no-diagnostics
#ifndef HEADER #ifndef HEADER
#define HEADER #define HEADER
template <typename tx, typename ty> template <typename tx, typename ty>
struct TT { struct TT {
tx X; tx X;
ty Y; ty Y;
}; };
// TCHECK-DAG: [[TTII:%.+]] = type { i32, i32 } // TCHECK-DAG: [[TTII:%.+]] = type { i32, i32 }
// TCHECK-DAG: [[TTIC:%.+]] = type { i8, i8 }
// TCHECK-DAG: [[TT:%.+]] = type { i64, i8 } // TCHECK-DAG: [[TT:%.+]] = type { i64, i8 }
// TCHECK-DAG: [[S1:%.+]] = type { double } // TCHECK-DAG: [[S1:%.+]] = type { double }
int foo(int n, double *ptr) { int foo(int n, double *ptr) {
int a = 0; int a = 0;
short aa = 0; short aa = 0;
float b[10]; float b[10];
double c[5][10]; double c[5][10];
TT<long long, char> d; TT<long long, char> d;
const TT<int, int> e = {n, n}; const TT<int, int> e = {n, n};
#pragma omp target firstprivate(a, e) map(tofrom \ #pragma omp target firstprivate(a, e) map(tofrom \
: b) : b)
{ {
b[a] = a; b[a] = a;
b[a] += e.X; b[a] += e.X;
} }
// TCHECK: define {{.*}}void @__omp_offloading_{{.+}}([10 x float] addrspace(1)* noalias noundef [[B_IN:%.+]], i{{[0-9]+}} noundef [[A_IN:%.+]], [[TTII]]* noalias noundef [[E_IN:%.+]]) // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(ptr addrspace(1) noalias noundef [[B_IN:%.+]], i{{[0-9]+}} noundef [[A_IN:%.+]], ptr noalias noundef [[E_IN:%.+]])
// TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}},
// TCHECK-NOT: alloca [[TTII]], // TCHECK-NOT: alloca [[TTII]],
// TCHECK: alloca i{{[0-9]+}}, // TCHECK: alloca i{{[0-9]+}},
// TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], // TCHECK: store i{{[0-9]+}} [[A_IN]], ptr [[A_ADDR]],
// TCHECK: ret void // TCHECK: ret void
#pragma omp target firstprivate(aa, b, c, d) #pragma omp target firstprivate(aa, b, c, d)
{ {
aa += 1; aa += 1;
b[2] = 1.0; b[2] = 1.0;
c[1][2] = 1.0; c[1][2] = 1.0;
d.X = 1; d.X = 1;
d.Y = 1; d.Y = 1;
} }
// make sure that firstprivate variables are generated in all cases and that we use those instances for operations inside the // make sure that firstprivate variables are generated in all cases and that we use those instances for operations inside the
// target region // target region
// TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A2_IN:%.+]], [10 x float]*{{.*}} [[B_IN:%.+]], [5 x [10 x double]]*{{.*}} [[C_IN:%.+]], [[TT]]*{{.*}} [[D_IN:%.+]]) // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A2_IN:%.+]], ptr{{.*}} [[B_IN:%.+]], ptr{{.*}} [[C_IN:%.+]], ptr{{.*}} [[D_IN:%.+]])
// TCHECK: [[A2_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[A2_ADDR:%.+]] = alloca i{{[0-9]+}},
// TCHECK: [[B_ADDR:%.+]] = alloca [10 x float]*, // TCHECK: [[B_ADDR:%.+]] = alloca ptr,
// TCHECK: [[C_ADDR:%.+]] = alloca [5 x [10 x double]]*, // TCHECK: [[C_ADDR:%.+]] = alloca ptr,
// TCHECK: [[D_ADDR:%.+]] = alloca [[TT]]*, // TCHECK: [[D_ADDR:%.+]] = alloca ptr,
// TCHECK-NOT: alloca i{{[0-9]+}}, // TCHECK-NOT: alloca i{{[0-9]+}},
// TCHECK: [[B_PRIV:%.+]] = alloca [10 x float], // TCHECK: [[B_PRIV:%.+]] = alloca [10 x float],
// TCHECK: [[C_PRIV:%.+]] = alloca [5 x [10 x double]], // TCHECK: [[C_PRIV:%.+]] = alloca [5 x [10 x double]],
// TCHECK: [[D_PRIV:%.+]] = alloca [[TT]], // TCHECK: [[D_PRIV:%.+]] = alloca [[TT]],
// TCHECK: store i{{[0-9]+}} [[A2_IN]], i{{[0-9]+}}* [[A2_ADDR]], // TCHECK: store i{{[0-9]+}} [[A2_IN]], ptr [[A2_ADDR]],
// TCHECK: store [10 x float]* [[B_IN]], [10 x float]** [[B_ADDR]], // TCHECK: store ptr [[B_IN]], ptr [[B_ADDR]],
// TCHECK: store [5 x [10 x double]]* [[C_IN]], [5 x [10 x double]]** [[C_ADDR]], // TCHECK: store ptr [[C_IN]], ptr [[C_ADDR]],
// TCHECK: store [[TT]]* [[D_IN]], [[TT]]** [[D_ADDR]], // TCHECK: store ptr [[D_IN]], ptr [[D_ADDR]],
// TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** [[B_ADDR]], // TCHECK: [[B_ADDR_REF:%.+]] = load ptr, ptr [[B_ADDR]],
// TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** % // TCHECK: [[B_ADDR_REF:%.+]] = load ptr, ptr %
// TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], // TCHECK: [[C_ADDR_REF:%.+]] = load ptr, ptr [[C_ADDR]],
// TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** % // TCHECK: [[C_ADDR_REF:%.+]] = load ptr, ptr %
// TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** [[D_ADDR]], // TCHECK: [[D_ADDR_REF:%.+]] = load ptr, ptr [[D_ADDR]],
// TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** % // TCHECK: [[D_ADDR_REF:%.+]] = load ptr, ptr %
// firstprivate(aa): a_priv = a_in // firstprivate(aa): a_priv = a_in
// firstprivate(b): memcpy(b_priv,b_in) // firstprivate(b): memcpy(b_priv,b_in)
// TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x float]* [[B_PRIV]] to i8* // TCHECK: call void @llvm.memcpy.{{.+}}(ptr align {{[0-9]+}} [[B_PRIV]], ptr align {{[0-9]+}} [[B_ADDR_REF]], {{.+}})
// TCHECK: [[B_ADDR_REF_BCAST:%.+]] = bitcast [10 x float]* [[B_ADDR_REF]] to i8*
// TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_ADDR_REF_BCAST]], {{.+}})
// firstprivate(c) // firstprivate(c)
// TCHECK: [[C_PRIV_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_PRIV]] to i8* // TCHECK: call void @llvm.memcpy.{{.+}}(ptr align {{[0-9]+}} [[C_PRIV]], ptr align {{[0-9]+}} [[C_ADDR_REF]],{{.+}})
// TCHECK: [[C_IN_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_ADDR_REF]] to i8*
// TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[C_PRIV_BCAST]], i8* align {{[0-9]+}} [[C_IN_BCAST]],{{.+}})
// firstprivate(d) // firstprivate(d)
// TCHECK: [[D_PRIV_BCAST:%.+]] = bitcast [[TT]]* [[D_PRIV]] to i8* // TCHECK: call void @llvm.memcpy.{{.+}}(ptr align {{[0-9]+}} [[D_PRIV]], ptr align {{[0-9]+}} [[D_ADDR_REF]],{{.+}})
// TCHECK: [[D_IN_BCAST:%.+]] = bitcast [[TT]]* [[D_ADDR_REF]] to i8*
// TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[D_PRIV_BCAST]], i8* align {{[0-9]+}} [[D_IN_BCAST]],{{.+}})
// TCHECK: load i16, i16* [[A2_ADDR]], // TCHECK: load i16, ptr [[A2_ADDR]],
#pragma omp target firstprivate(ptr) #pragma omp target firstprivate(ptr)
{ {
ptr[0]++; ptr[0]++;
} }
// TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(double* noundef [[PTR_IN:%.+]]) // TCHECK: define weak_odr protected void @__omp_offloading_{{.+}}(ptr noundef [[PTR_IN:%.+]])
// TCHECK: [[PTR_ADDR:%.+]] = alloca double*, // TCHECK: [[PTR_ADDR:%.+]] = alloca ptr,
// TCHECK-NOT: alloca double*, // TCHECK-NOT: alloca ptr,
// TCHECK: store double* [[PTR_IN]], double** [[PTR_ADDR]], // TCHECK: store ptr [[PTR_IN]], ptr [[PTR_ADDR]],
// TCHECK: [[PTR_IN_REF:%.+]] = load double*, double** [[PTR_ADDR]], // TCHECK: [[PTR_IN_REF:%.+]] = load ptr, ptr [[PTR_ADDR]],
// TCHECK-NOT: store double* [[PTR_IN_REF]], double** {{%.+}}, // TCHECK-NOT: store ptr [[PTR_IN_REF]], ptr {{%.+}},
return a; return a;
} }
template <typename tx> template <typename tx>
tx ftemplate(int n) { tx ftemplate(int n) {
tx a = 0; tx a = 0;
tx b[10]; tx b[10];
Show All 23 Lines
} }
template <typename tx> template <typename tx>
void fconst(const tx t) { void fconst(const tx t) {
#pragma omp target firstprivate(t) #pragma omp target firstprivate(t)
{ } { }
} }
// TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A_IN:%.+]], i{{[0-9]+}}{{.*}} [[A3_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A_IN:%.+]], i{{[0-9]+}}{{.*}} [[A3_IN:%.+]], ptr {{.+}} [[B_IN:%.+]])
// TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}},
// TCHECK: [[A3_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[A3_ADDR:%.+]] = alloca i{{[0-9]+}},
// TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, // TCHECK: [[B_ADDR:%.+]] = alloca ptr,
// TCHECK-NOT: alloca i{{[0-9]+}}, // TCHECK-NOT: alloca i{{[0-9]+}},
// TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}],
// TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], // TCHECK: store i{{[0-9]+}} [[A_IN]], ptr [[A_ADDR]],
// TCHECK: store i{{[0-9]+}} [[A3_IN]], i{{[0-9]+}}* [[A3_ADDR]], // TCHECK: store i{{[0-9]+}} [[A3_IN]], ptr [[A3_ADDR]],
// TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], // TCHECK: store ptr [[B_IN]], ptr [[B_ADDR]],
// TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], // TCHECK: [[B_ADDR_REF:%.+]] = load ptr, ptr [[B_ADDR]],
// TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** % // TCHECK: [[B_ADDR_REF:%.+]] = load ptr, ptr %
// firstprivate(a): a_priv = a_in // firstprivate(a): a_priv = a_in
// firstprivate(aaa) // firstprivate(aaa)
// TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, ptr
// firstprivate(b) // firstprivate(b)
// TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* // TCHECK: call void @llvm.memcpy.{{.+}}(ptr align {{[0-9]+}} [[B_PRIV]], ptr align {{[0-9]+}} [[B_ADDR_REF]],{{.+}})
// TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8*
// TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_IN_BCAST]],{{.+}})
// TCHECK: ret void // TCHECK: ret void
struct S1 { struct S1 {
double a; double a;
int r1(int n) { int r1(int n) {
int b = n + 1; int b = n + 1;
#pragma omp target firstprivate(b) #pragma omp target firstprivate(b)
{ {
this->a = (double)b + 1.5; this->a = (double)b + 1.5;
} }
return (int)b; return (int)b;
} }
// TCHECK: define internal void @__omp_offloading_{{.+}}([[S1]]* noundef [[TH:%.+]], i{{[0-9]+}} noundef [[B_IN:%.+]]) // TCHECK: define internal void @__omp_offloading_{{.+}}(ptr noundef [[TH:%.+]], i{{[0-9]+}} noundef [[B_IN:%.+]])
// TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, // TCHECK: [[TH_ADDR:%.+]] = alloca ptr,
// TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}},
// TCHECK-NOT: alloca i{{[0-9]+}}, // TCHECK-NOT: alloca i{{[0-9]+}},
// TCHECK: store [[S1]]* [[TH]], [[S1]]** [[TH_ADDR]], // TCHECK: store ptr [[TH]], ptr [[TH_ADDR]],
// TCHECK: store i{{[0-9]+}} [[B_IN]], i{{[0-9]+}}* [[B_ADDR]], // TCHECK: store i{{[0-9]+}} [[B_IN]], ptr [[B_ADDR]],
// TCHECK: [[TH_ADDR_REF:%.+]] = load [[S1]]*, [[S1]]** [[TH_ADDR]], // TCHECK: [[TH_ADDR_REF:%.+]] = load ptr, ptr [[TH_ADDR]],
// TCHECK-64: [[B_ADDR_CONV:%.+]] = bitcast i{{[0-9]+}}* [[B_ADDR]] to i{{[0-9]+}}*
// firstprivate(b) // firstprivate(b)
// TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, ptr
// TCHECK: ret void // TCHECK: ret void
}; };
int bar(int n, double *ptr) { int bar(int n, double *ptr) {
int a = 0; int a = 0;
a += foo(n, ptr); a += foo(n, ptr);
S1 S; S1 S;
a += S.r1(n); a += S.r1(n);
a += fstatic(n); a += fstatic(n);
a += ftemplate<int>(n); a += ftemplate<int>(n);
fconst(TT<int, int>{0, 0}); fconst(TT<int, int>{0, 0});
fconst(TT<char, char>{0, 0}); fconst(TT<char, char>{0, 0});
return a; return a;
} }
// template // template
// TCHECK: define internal void @__omp_offloading_{{.+}}(i{{[0-9]+}} noundef [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} noundef [[B_IN:%.+]]) // TCHECK: define internal void @__omp_offloading_{{.+}}(i{{[0-9]+}} noundef [[A_IN:%.+]], ptr{{.+}} noundef [[B_IN:%.+]])
// TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}},
// TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, // TCHECK: [[B_ADDR:%.+]] = alloca ptr,
// TCHECK-NOT: alloca i{{[0-9]+}}, // TCHECK-NOT: alloca i{{[0-9]+}},
// TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}],
// TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], // TCHECK: store i{{[0-9]+}} [[A_IN]], ptr [[A_ADDR]],
// TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], // TCHECK: store ptr [[B_IN]], ptr [[B_ADDR]],
// TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], // TCHECK: [[B_ADDR_REF:%.+]] = load ptr, ptr [[B_ADDR]],
// TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** % // TCHECK: [[B_ADDR_REF:%.+]] = load ptr, ptr %
// firstprivate(a) // firstprivate(a)
// TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, ptr
// firstprivate(b) // firstprivate(b)
// TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* // TCHECK: call void @llvm.memcpy.{{.+}}(ptr align {{[0-9]+}} [[B_PRIV]], ptr align {{[0-9]+}} [[B_ADDR_REF]],{{.+}})
// TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8*
// TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_IN_BCAST]],{{.+}})
// TCHECK: ret void // TCHECK: ret void
#endif #endif

clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
// Test target codegen - host bc file has to be created first. // Test target codegen - host bc file has to be created first.
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK-64 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK-32 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK-32
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK-32-EX // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK-32-EX
// expected-no-diagnostics // expected-no-diagnostics
#ifndef HEADER #ifndef HEADER
#define HEADER #define HEADER
// Check for the data transfer medium in shared memory to transfer the reduction list to the first warp. // Check for the data transfer medium in shared memory to transfer the reduction list to the first warp.
// Check that the execution mode of all 3 target regions is set to Spmd Mode. // Check that the execution mode of all 3 target regions is set to Spmd Mode.
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// Barrier after copy to shared memory storage medium. // Barrier after copy to shared memory storage medium.
// Read into warp 0. // Read into warp 0.
// [[DO_COPY]] // [[DO_COPY]]
// Barrier after copy to shared memory storage medium. // Barrier after copy to shared memory storage medium.
// Read into warp 0. // Read into warp 0.
#endif #endif
// CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24
// CHECK-64-SAME: (double* noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-64-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[E_ADDR:%.*]] = alloca double*, align 8 // CHECK-64-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 8
// CHECK-64-NEXT: store double* [[E]], double** [[E_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
// CHECK-64-NEXT: [[TMP0:%.*]] = load double*, double** [[E_ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
// CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false) // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1:[0-9]+]], i8 2, i1 false)
// CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
// CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-64: user_code.entry: // CHECK-64: user_code.entry:
// CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP0]] to i8* // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 8
// CHECK-64-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 1)
// CHECK-64-NEXT: [[TMP5:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, double*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined to i8*), i8* null, i8** [[TMP5]], i64 1)
// CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// CHECK-64: worker.exit: // CHECK-64: worker.exit:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined
// CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR1:[0-9]+]] { // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[E_ADDR:%.*]] = alloca double*, align 8 // CHECK-64-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[E1:%.*]] = alloca double, align 8 // CHECK-64-NEXT: [[E1:%.*]] = alloca double, align 8
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
// CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK-64-NEXT: store double* [[E]], double** [[E_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 8
// CHECK-64-NEXT: [[TMP0:%.*]] = load double*, double** [[E_ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 8
// CHECK-64-NEXT: store double 0.000000e+00, double* [[E1]], align 8 // CHECK-64-NEXT: store double 0.000000e+00, ptr [[E1]], align 8
// CHECK-64-NEXT: [[TMP1:%.*]] = load double, double* [[E1]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load double, ptr [[E1]], align 8
// CHECK-64-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], 5.000000e+00 // CHECK-64-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], 5.000000e+00
// CHECK-64-NEXT: store double [[ADD]], double* [[E1]], align 8 // CHECK-64-NEXT: store double [[ADD]], ptr [[E1]], align 8
// CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK-64-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP5:%.*]] = bitcast double* [[E1]] to i8* // CHECK-64-NEXT: store ptr [[E1]], ptr [[TMP4]], align 8
// CHECK-64-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 8 // CHECK-64-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func, ptr @_omp_reduction_inter_warp_copy_func)
// CHECK-64-NEXT: [[TMP6:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-64-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i64 8, i8* [[TMP6]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func)
// CHECK-64-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 1 // CHECK-64-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 1
// CHECK-64-NEXT: br i1 [[TMP8]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-64-NEXT: br i1 [[TMP8]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-64: .omp.reduction.then: // CHECK-64: .omp.reduction.then:
// CHECK-64-NEXT: [[TMP9:%.*]] = load double, double* [[TMP0]], align 8 // CHECK-64-NEXT: [[TMP9:%.*]] = load double, ptr [[TMP0]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = load double, double* [[E1]], align 8 // CHECK-64-NEXT: [[TMP10:%.*]] = load double, ptr [[E1]], align 8
// CHECK-64-NEXT: [[ADD2:%.*]] = fadd double [[TMP9]], [[TMP10]] // CHECK-64-NEXT: [[ADD2:%.*]] = fadd double [[TMP9]], [[TMP10]]
// CHECK-64-NEXT: store double [[ADD2]], double* [[TMP0]], align 8 // CHECK-64-NEXT: store double [[ADD2]], ptr [[TMP0]], align 8
// CHECK-64-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP3]]) // CHECK-64-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP3]])
// CHECK-64-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-64-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-64: .omp.reduction.done: // CHECK-64: .omp.reduction.done:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func // CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func
// CHECK-64-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2:[0-9]+]] { // CHECK-64-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x ptr], align 8
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca double, align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca double, align 8
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-64-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-64-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-64-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-64-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-64-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-64-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* // CHECK-64-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-64-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-64-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-64-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-64-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-64-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP4]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP9]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to double** // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP11:%.*]] = load double*, double** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr double, ptr [[TMP11]], i64 1
// CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP11]], align 8
// CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr double, double* [[TMP11]], i64 1
// CHECK-64-NEXT: [[TMP14:%.*]] = bitcast double* [[TMP13]] to i8*
// CHECK-64-NEXT: [[TMP15:%.*]] = bitcast double* [[TMP11]] to i64*
// CHECK-64-NEXT: [[TMP16:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK-64-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 8
// CHECK-64-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-64-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-64-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16 // CHECK-64-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16
// CHECK-64-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]]) // CHECK-64-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]])
// CHECK-64-NEXT: store i64 [[TMP20]], i64* [[TMP16]], align 8 // CHECK-64-NEXT: store i64 [[TMP20]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 8
// CHECK-64-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 // CHECK-64-NEXT: [[TMP21:%.*]] = getelementptr i64, ptr [[TMP11]], i64 1
// CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 // CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr i64, ptr [[DOTOMP_REDUCTION_ELEMENT]], i64 1
// CHECK-64-NEXT: [[TMP23:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8* // CHECK-64-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP12]], align 8
// CHECK-64-NEXT: store i8* [[TMP23]], i8** [[TMP12]], align 8
// CHECK-64-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-64-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-64-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-64-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-64-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-64-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]] // CHECK-64-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]]
// CHECK-64-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-64-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-64-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1 // CHECK-64-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1
// CHECK-64-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0 // CHECK-64-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0
// CHECK-64-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]] // CHECK-64-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]]
// CHECK-64-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-64-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-64-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]] // CHECK-64-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]]
// CHECK-64-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]] // CHECK-64-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]]
// CHECK-64-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]] // CHECK-64-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]]
// CHECK-64-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-64-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-64: then: // CHECK-64: then:
// CHECK-64-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* // CHECK-64-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3:[0-9]+]]
// CHECK-64-NEXT: [[TMP37:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-64-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP36]], i8* [[TMP37]]) #[[ATTR3:[0-9]+]]
// CHECK-64-NEXT: br label [[IFCONT:%.*]] // CHECK-64-NEXT: br label [[IFCONT:%.*]]
// CHECK-64: else: // CHECK-64: else:
// CHECK-64-NEXT: br label [[IFCONT]] // CHECK-64-NEXT: br label [[IFCONT]]
// CHECK-64: ifcont: // CHECK-64: ifcont:
// CHECK-64-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-64-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-64-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-64-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] // CHECK-64-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
// CHECK-64-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]] // CHECK-64-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
// CHECK-64: then4: // CHECK-64: then4:
// CHECK-64-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to double** // CHECK-64-NEXT: [[TMP43:%.*]] = load ptr, ptr [[TMP41]], align 8
// CHECK-64-NEXT: [[TMP43:%.*]] = load double*, double** [[TMP42]], align 8 // CHECK-64-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP4]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP46:%.*]] = load ptr, ptr [[TMP44]], align 8
// CHECK-64-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to double** // CHECK-64-NEXT: [[TMP47:%.*]] = load double, ptr [[TMP43]], align 8
// CHECK-64-NEXT: [[TMP46:%.*]] = load double*, double** [[TMP45]], align 8 // CHECK-64-NEXT: store double [[TMP47]], ptr [[TMP46]], align 8
// CHECK-64-NEXT: [[TMP47:%.*]] = load double, double* [[TMP43]], align 8
// CHECK-64-NEXT: store double [[TMP47]], double* [[TMP46]], align 8
// CHECK-64-NEXT: br label [[IFCONT6:%.*]] // CHECK-64-NEXT: br label [[IFCONT6:%.*]]
// CHECK-64: else5: // CHECK-64: else5:
// CHECK-64-NEXT: br label [[IFCONT6]] // CHECK-64-NEXT: br label [[IFCONT6]]
// CHECK-64: ifcont6: // CHECK-64: ifcont6:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func // CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func
// CHECK-64-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-64-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-64-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4
// CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-64-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-64-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-64-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-64-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [1 x i8*]* // CHECK-64-NEXT: store i32 0, ptr [[DOTCNT_ADDR]], align 4
// CHECK-64-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4
// CHECK-64-NEXT: br label [[PRECOND:%.*]] // CHECK-64-NEXT: br label [[PRECOND:%.*]]
// CHECK-64: precond: // CHECK-64: precond:
// CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCNT_ADDR]], align 4
// CHECK-64-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2
// CHECK-64-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]] // CHECK-64-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]]
// CHECK-64: body: // CHECK-64: body:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]])
// CHECK-64-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-64-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-64-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-64-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-64: then: // CHECK-64: then:
// CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP6]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
// CHECK-64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP11]], i32 [[TMP8]]
// CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 [[TMP8]] // CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP13]], align 4
// CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 4 // CHECK-64-NEXT: store volatile i32 [[TMP15]], ptr addrspace(3) [[TMP14]], align 4
// CHECK-64-NEXT: store volatile i32 [[TMP15]], i32 addrspace(3)* [[TMP14]], align 4
// CHECK-64-NEXT: br label [[IFCONT:%.*]] // CHECK-64-NEXT: br label [[IFCONT:%.*]]
// CHECK-64: else: // CHECK-64: else:
// CHECK-64-NEXT: br label [[IFCONT]] // CHECK-64-NEXT: br label [[IFCONT]]
// CHECK-64: ifcont: // CHECK-64: ifcont:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]] // CHECK-64-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]]
// CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-64: then2: // CHECK-64: then2:
// CHECK-64-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-64-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-64-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP6]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 // CHECK-64-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
// CHECK-64-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* // CHECK-64-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[TMP19]], i32 [[TMP8]]
// CHECK-64-NEXT: [[TMP21:%.*]] = getelementptr i32, i32* [[TMP20]], i32 [[TMP8]] // CHECK-64-NEXT: [[TMP22:%.*]] = load volatile i32, ptr addrspace(3) [[TMP17]], align 4
// CHECK-64-NEXT: [[TMP22:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP17]], align 4 // CHECK-64-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4
// CHECK-64-NEXT: store i32 [[TMP22]], i32* [[TMP21]], align 4
// CHECK-64-NEXT: br label [[IFCONT4:%.*]] // CHECK-64-NEXT: br label [[IFCONT4:%.*]]
// CHECK-64: else3: // CHECK-64: else3:
// CHECK-64-NEXT: br label [[IFCONT4]] // CHECK-64-NEXT: br label [[IFCONT4]]
// CHECK-64: ifcont4: // CHECK-64: ifcont4:
// CHECK-64-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTCNT_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], ptr [[DOTCNT_ADDR]], align 4
// CHECK-64-NEXT: br label [[PRECOND]] // CHECK-64-NEXT: br label [[PRECOND]]
// CHECK-64: exit: // CHECK-64: exit:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29
// CHECK-64-SAME: (i8* noundef nonnull align 1 dereferenceable(1) [[C:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { // CHECK-64-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[C_ADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[D_ADDR:%.*]] = alloca float*, align 8 // CHECK-64-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
// CHECK-64-NEXT: store i8* [[C]], i8** [[C_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK-64-NEXT: store float* [[D]], float** [[D_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK-64-NEXT: [[TMP0:%.*]] = load i8*, i8** [[C_ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
// CHECK-64-NEXT: [[TMP1:%.*]] = load float*, float** [[D_ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8
// CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 2, i1 false)
// CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1
// CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-64: user_code.entry: // CHECK-64: user_code.entry:
// CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[TMP4]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8
// CHECK-64-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP6:%.*]] = bitcast float* [[TMP1]] to i8* // CHECK-64-NEXT: store ptr [[TMP1]], ptr [[TMP5]], align 8
// CHECK-64-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
// CHECK-64-NEXT: [[TMP7:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i8*, float*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined to i8*), i8* null, i8** [[TMP7]], i64 2)
// CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// CHECK-64: worker.exit: // CHECK-64: worker.exit:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined
// CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[C:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[C_ADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[D_ADDR:%.*]] = alloca float*, align 8 // CHECK-64-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[C1:%.*]] = alloca i8, align 1 // CHECK-64-NEXT: [[C1:%.*]] = alloca i8, align 1
// CHECK-64-NEXT: [[D2:%.*]] = alloca float, align 4 // CHECK-64-NEXT: [[D2:%.*]] = alloca float, align 4
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 8
// CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK-64-NEXT: store i8* [[C]], i8** [[C_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
// CHECK-64-NEXT: store float* [[D]], float** [[D_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
// CHECK-64-NEXT: [[TMP0:%.*]] = load i8*, i8** [[C_ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
// CHECK-64-NEXT: [[TMP1:%.*]] = load float*, float** [[D_ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8
// CHECK-64-NEXT: store i8 0, i8* [[C1]], align 1 // CHECK-64-NEXT: store i8 0, ptr [[C1]], align 1
// CHECK-64-NEXT: store float 1.000000e+00, float* [[D2]], align 4 // CHECK-64-NEXT: store float 1.000000e+00, ptr [[D2]], align 4
// CHECK-64-NEXT: [[TMP2:%.*]] = load i8, i8* [[C1]], align 1 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[C1]], align 1
// CHECK-64-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32 // CHECK-64-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
// CHECK-64-NEXT: [[XOR:%.*]] = xor i32 [[CONV]], 2 // CHECK-64-NEXT: [[XOR:%.*]] = xor i32 [[CONV]], 2
// CHECK-64-NEXT: [[CONV3:%.*]] = trunc i32 [[XOR]] to i8 // CHECK-64-NEXT: [[CONV3:%.*]] = trunc i32 [[XOR]] to i8
// CHECK-64-NEXT: store i8 [[CONV3]], i8* [[C1]], align 1 // CHECK-64-NEXT: store i8 [[CONV3]], ptr [[C1]], align 1
// CHECK-64-NEXT: [[TMP3:%.*]] = load float, float* [[D2]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load float, ptr [[D2]], align 4
// CHECK-64-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], 3.300000e+01 // CHECK-64-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], 3.300000e+01
// CHECK-64-NEXT: store float [[MUL]], float* [[D2]], align 4 // CHECK-64-NEXT: store float [[MUL]], ptr [[D2]], align 4
// CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK-64-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
// CHECK-64-NEXT: store i8* [[C1]], i8** [[TMP6]], align 8 // CHECK-64-NEXT: store ptr [[C1]], ptr [[TMP6]], align 8
// CHECK-64-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP8:%.*]] = bitcast float* [[D2]] to i8* // CHECK-64-NEXT: store ptr [[D2]], ptr [[TMP7]], align 8
// CHECK-64-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 8 // CHECK-64-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP5]], i32 2, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func1, ptr @_omp_reduction_inter_warp_copy_func2)
// CHECK-64-NEXT: [[TMP9:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-64-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 2, i64 16, i8* [[TMP9]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func1, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func2)
// CHECK-64-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1
// CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-64: .omp.reduction.then: // CHECK-64: .omp.reduction.then:
// CHECK-64-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP0]], align 1 // CHECK-64-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP0]], align 1
// CHECK-64-NEXT: [[CONV4:%.*]] = sext i8 [[TMP12]] to i32 // CHECK-64-NEXT: [[CONV4:%.*]] = sext i8 [[TMP12]] to i32
// CHECK-64-NEXT: [[TMP13:%.*]] = load i8, i8* [[C1]], align 1 // CHECK-64-NEXT: [[TMP13:%.*]] = load i8, ptr [[C1]], align 1
// CHECK-64-NEXT: [[CONV5:%.*]] = sext i8 [[TMP13]] to i32 // CHECK-64-NEXT: [[CONV5:%.*]] = sext i8 [[TMP13]] to i32
// CHECK-64-NEXT: [[XOR6:%.*]] = xor i32 [[CONV4]], [[CONV5]] // CHECK-64-NEXT: [[XOR6:%.*]] = xor i32 [[CONV4]], [[CONV5]]
// CHECK-64-NEXT: [[CONV7:%.*]] = trunc i32 [[XOR6]] to i8 // CHECK-64-NEXT: [[CONV7:%.*]] = trunc i32 [[XOR6]] to i8
// CHECK-64-NEXT: store i8 [[CONV7]], i8* [[TMP0]], align 1 // CHECK-64-NEXT: store i8 [[CONV7]], ptr [[TMP0]], align 1
// CHECK-64-NEXT: [[TMP14:%.*]] = load float, float* [[TMP1]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load float, ptr [[TMP1]], align 4
// CHECK-64-NEXT: [[TMP15:%.*]] = load float, float* [[D2]], align 4 // CHECK-64-NEXT: [[TMP15:%.*]] = load float, ptr [[D2]], align 4
// CHECK-64-NEXT: [[MUL8:%.*]] = fmul float [[TMP14]], [[TMP15]] // CHECK-64-NEXT: [[MUL8:%.*]] = fmul float [[TMP14]], [[TMP15]]
// CHECK-64-NEXT: store float [[MUL8]], float* [[TMP1]], align 4 // CHECK-64-NEXT: store float [[MUL8]], ptr [[TMP1]], align 4
// CHECK-64-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP5]]) // CHECK-64-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP5]])
// CHECK-64-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-64-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-64: .omp.reduction.done: // CHECK-64: .omp.reduction.done:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func1 // CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func1
// CHECK-64-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] { // CHECK-64-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x ptr], align 8
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i8, align 1 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i8, align 1
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca float, align 4 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca float, align 4
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-64-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-64-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-64-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-64-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-64-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-64-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* // CHECK-64-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-64-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-64-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-64-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-64-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-64-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP9]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 // CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP10]], i64 1
// CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP10]], i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP10]], align 1
// CHECK-64-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP10]], align 1
// CHECK-64-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32 // CHECK-64-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32
// CHECK-64-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-64-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-64-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 // CHECK-64-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16
// CHECK-64-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]]) // CHECK-64-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]])
// CHECK-64-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8 // CHECK-64-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
// CHECK-64-NEXT: store i8 [[TMP18]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1 // CHECK-64-NEXT: store i8 [[TMP18]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 1
// CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP10]], i64 1 // CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP10]], i64 1
// CHECK-64-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i64 1 // CHECK-64-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DOTOMP_REDUCTION_ELEMENT]], i64 1
// CHECK-64-NEXT: store i8* [[DOTOMP_REDUCTION_ELEMENT]], i8** [[TMP11]], align 8 // CHECK-64-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP11]], align 8
// CHECK-64-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to float** // CHECK-64-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP21]], align 8
// CHECK-64-NEXT: [[TMP23:%.*]] = load float*, float** [[TMP22]], align 8 // CHECK-64-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP25:%.*]] = getelementptr float, ptr [[TMP23]], i64 1
// CHECK-64-NEXT: [[TMP25:%.*]] = getelementptr float, float* [[TMP23]], i64 1 // CHECK-64-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 4
// CHECK-64-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to i8*
// CHECK-64-NEXT: [[TMP27:%.*]] = bitcast float* [[TMP23]] to i32*
// CHECK-64-NEXT: [[TMP28:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
// CHECK-64-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
// CHECK-64-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-64-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-64-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16 // CHECK-64-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
// CHECK-64-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]]) // CHECK-64-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
// CHECK-64-NEXT: store i32 [[TMP32]], i32* [[TMP28]], align 4 // CHECK-64-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_REDUCTION_ELEMENT4]], align 4
// CHECK-64-NEXT: [[TMP33:%.*]] = getelementptr i32, i32* [[TMP27]], i64 1 // CHECK-64-NEXT: [[TMP33:%.*]] = getelementptr i32, ptr [[TMP23]], i64 1
// CHECK-64-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[TMP28]], i64 1 // CHECK-64-NEXT: [[TMP34:%.*]] = getelementptr i32, ptr [[DOTOMP_REDUCTION_ELEMENT4]], i64 1
// CHECK-64-NEXT: [[TMP35:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8* // CHECK-64-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT4]], ptr [[TMP24]], align 8
// CHECK-64-NEXT: store i8* [[TMP35]], i8** [[TMP24]], align 8
// CHECK-64-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-64-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-64-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-64-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-64-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-64-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] // CHECK-64-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
// CHECK-64-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-64-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-64-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1 // CHECK-64-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1
// CHECK-64-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0 // CHECK-64-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0
// CHECK-64-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]] // CHECK-64-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]]
// CHECK-64-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-64-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-64-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]] // CHECK-64-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]]
// CHECK-64-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]] // CHECK-64-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]]
// CHECK-64-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]] // CHECK-64-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]]
// CHECK-64-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-64-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-64: then: // CHECK-64: then:
// CHECK-64-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8* // CHECK-64-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3]]
// CHECK-64-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-64-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP48]], i8* [[TMP49]]) #[[ATTR3]]
// CHECK-64-NEXT: br label [[IFCONT:%.*]] // CHECK-64-NEXT: br label [[IFCONT:%.*]]
// CHECK-64: else: // CHECK-64: else:
// CHECK-64-NEXT: br label [[IFCONT]] // CHECK-64-NEXT: br label [[IFCONT]]
// CHECK-64: ifcont: // CHECK-64: ifcont:
// CHECK-64-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-64-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-64-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-64-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]] // CHECK-64-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]]
// CHECK-64-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]] // CHECK-64-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
// CHECK-64: then5: // CHECK-64: then5:
// CHECK-64-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP54:%.*]] = load i8*, i8** [[TMP53]], align 8 // CHECK-64-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP53]], align 8
// CHECK-64-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP56:%.*]] = load i8*, i8** [[TMP55]], align 8 // CHECK-64-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP55]], align 8
// CHECK-64-NEXT: [[TMP57:%.*]] = load i8, i8* [[TMP54]], align 1 // CHECK-64-NEXT: [[TMP57:%.*]] = load i8, ptr [[TMP54]], align 1
// CHECK-64-NEXT: store i8 [[TMP57]], i8* [[TMP56]], align 1 // CHECK-64-NEXT: store i8 [[TMP57]], ptr [[TMP56]], align 1
// CHECK-64-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to float** // CHECK-64-NEXT: [[TMP60:%.*]] = load ptr, ptr [[TMP58]], align 8
// CHECK-64-NEXT: [[TMP60:%.*]] = load float*, float** [[TMP59]], align 8 // CHECK-64-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP63:%.*]] = load ptr, ptr [[TMP61]], align 8
// CHECK-64-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to float** // CHECK-64-NEXT: [[TMP64:%.*]] = load float, ptr [[TMP60]], align 4
// CHECK-64-NEXT: [[TMP63:%.*]] = load float*, float** [[TMP62]], align 8 // CHECK-64-NEXT: store float [[TMP64]], ptr [[TMP63]], align 4
// CHECK-64-NEXT: [[TMP64:%.*]] = load float, float* [[TMP60]], align 4
// CHECK-64-NEXT: store float [[TMP64]], float* [[TMP63]], align 4
// CHECK-64-NEXT: br label [[IFCONT7:%.*]] // CHECK-64-NEXT: br label [[IFCONT7:%.*]]
// CHECK-64: else6: // CHECK-64: else6:
// CHECK-64-NEXT: br label [[IFCONT7]] // CHECK-64-NEXT: br label [[IFCONT7]]
// CHECK-64: ifcont7: // CHECK-64: ifcont7:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func2 // CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func2
// CHECK-64-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-64-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-64-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-64-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-64-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-64-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]* // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-64-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-64-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-64-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-64: then: // CHECK-64: then:
// CHECK-64-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 8 // CHECK-64-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-64-NEXT: [[TMP11:%.*]] = bitcast i32 addrspace(3)* [[TMP10]] to i8 addrspace(3)* // CHECK-64-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP9]], align 1
// CHECK-64-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP9]], align 1 // CHECK-64-NEXT: store volatile i8 [[TMP12]], ptr addrspace(3) [[TMP10]], align 1
// CHECK-64-NEXT: store volatile i8 [[TMP12]], i8 addrspace(3)* [[TMP11]], align 1
// CHECK-64-NEXT: br label [[IFCONT:%.*]] // CHECK-64-NEXT: br label [[IFCONT:%.*]]
// CHECK-64: else: // CHECK-64: else:
// CHECK-64-NEXT: br label [[IFCONT]] // CHECK-64-NEXT: br label [[IFCONT]]
// CHECK-64: ifcont: // CHECK-64: ifcont:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]] // CHECK-64-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
// CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-64: then2: // CHECK-64: then2:
// CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-64-NEXT: [[TMP15:%.*]] = bitcast i32 addrspace(3)* [[TMP14]] to i8 addrspace(3)* // CHECK-64-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
// CHECK-64-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8 // CHECK-64-NEXT: [[TMP18:%.*]] = load volatile i8, ptr addrspace(3) [[TMP14]], align 1
// CHECK-64-NEXT: [[TMP18:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP15]], align 1 // CHECK-64-NEXT: store i8 [[TMP18]], ptr [[TMP17]], align 1
// CHECK-64-NEXT: store i8 [[TMP18]], i8* [[TMP17]], align 1
// CHECK-64-NEXT: br label [[IFCONT4:%.*]] // CHECK-64-NEXT: br label [[IFCONT4:%.*]]
// CHECK-64: else3: // CHECK-64: else3:
// CHECK-64-NEXT: br label [[IFCONT4]] // CHECK-64-NEXT: br label [[IFCONT4]]
// CHECK-64: ifcont4: // CHECK-64: ifcont4:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-64-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-64-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]] // CHECK-64-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
// CHECK-64: then6: // CHECK-64: then6:
// CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 8 // CHECK-64-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8
// CHECK-64-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i32* // CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP21]], align 4 // CHECK-64-NEXT: store volatile i32 [[TMP23]], ptr addrspace(3) [[TMP22]], align 4
// CHECK-64-NEXT: store volatile i32 [[TMP23]], i32 addrspace(3)* [[TMP22]], align 4
// CHECK-64-NEXT: br label [[IFCONT8:%.*]] // CHECK-64-NEXT: br label [[IFCONT8:%.*]]
// CHECK-64: else7: // CHECK-64: else7:
// CHECK-64-NEXT: br label [[IFCONT8]] // CHECK-64-NEXT: br label [[IFCONT8]]
// CHECK-64: ifcont8: // CHECK-64: ifcont8:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]] // CHECK-64-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]]
// CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]] // CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
// CHECK-64: then10: // CHECK-64: then10:
// CHECK-64-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-64-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-64-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 8 // CHECK-64-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8
// CHECK-64-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to i32* // CHECK-64-NEXT: [[TMP29:%.*]] = load volatile i32, ptr addrspace(3) [[TMP25]], align 4
// CHECK-64-NEXT: [[TMP29:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP25]], align 4 // CHECK-64-NEXT: store i32 [[TMP29]], ptr [[TMP27]], align 4
// CHECK-64-NEXT: store i32 [[TMP29]], i32* [[TMP28]], align 4
// CHECK-64-NEXT: br label [[IFCONT12:%.*]] // CHECK-64-NEXT: br label [[IFCONT12:%.*]]
// CHECK-64: else11: // CHECK-64: else11:
// CHECK-64-NEXT: br label [[IFCONT12]] // CHECK-64-NEXT: br label [[IFCONT12]]
// CHECK-64: ifcont12: // CHECK-64: ifcont12:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35 // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35
// CHECK-64-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR0]] { // CHECK-64-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR0]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[B_ADDR:%.*]] = alloca i16*, align 8 // CHECK-64-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 8
// CHECK-64-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK-64-NEXT: store i16* [[B]], i16** [[B_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
// CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
// CHECK-64-NEXT: [[TMP1:%.*]] = load i16*, i16** [[B_ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
// CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 2, i1 false)
// CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1 // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1
// CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-64: user_code.entry: // CHECK-64: user_code.entry:
// CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP5:%.*]] = bitcast i32* [[TMP0]] to i8* // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8
// CHECK-64-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 8 // CHECK-64-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: store ptr [[TMP1]], ptr [[TMP6]], align 8
// CHECK-64-NEXT: [[TMP7:%.*]] = bitcast i16* [[TMP1]] to i8* // CHECK-64-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 2)
// CHECK-64-NEXT: store i8* [[TMP7]], i8** [[TMP6]], align 8 // CHECK-64-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-64-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
// CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i16*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined to i8*), i8* null, i8** [[TMP8]], i64 2)
// CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// CHECK-64: worker.exit: // CHECK-64: worker.exit:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined
// CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR1]] { // CHECK-64-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR1]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[B_ADDR:%.*]] = alloca i16*, align 8 // CHECK-64-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[A1:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[A1:%.*]] = alloca i32, align 4
// CHECK-64-NEXT: [[B2:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[B2:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 8
// CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
// CHECK-64-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
// CHECK-64-NEXT: store i16* [[B]], i16** [[B_ADDR]], align 8 // CHECK-64-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
// CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
// CHECK-64-NEXT: [[TMP1:%.*]] = load i16*, i16** [[B_ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
// CHECK-64-NEXT: store i32 0, i32* [[A1]], align 4 // CHECK-64-NEXT: store i32 0, ptr [[A1]], align 4
// CHECK-64-NEXT: store i16 -32768, i16* [[B2]], align 2 // CHECK-64-NEXT: store i16 -32768, ptr [[B2]], align 2
// CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, ptr [[A1]], align 4
// CHECK-64-NEXT: [[OR:%.*]] = or i32 [[TMP2]], 1 // CHECK-64-NEXT: [[OR:%.*]] = or i32 [[TMP2]], 1
// CHECK-64-NEXT: store i32 [[OR]], i32* [[A1]], align 4 // CHECK-64-NEXT: store i32 [[OR]], ptr [[A1]], align 4
// CHECK-64-NEXT: [[TMP3:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-64-NEXT: [[TMP3:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-64-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 // CHECK-64-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
// CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 99, [[CONV]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 99, [[CONV]]
// CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
// CHECK-64: cond.true: // CHECK-64: cond.true:
// CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64-NEXT: br label [[COND_END:%.*]]
// CHECK-64: cond.false: // CHECK-64: cond.false:
// CHECK-64-NEXT: [[TMP4:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-64-NEXT: [[TMP4:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-64-NEXT: [[CONV3:%.*]] = sext i16 [[TMP4]] to i32 // CHECK-64-NEXT: [[CONV3:%.*]] = sext i16 [[TMP4]] to i32
// CHECK-64-NEXT: br label [[COND_END]] // CHECK-64-NEXT: br label [[COND_END]]
// CHECK-64: cond.end: // CHECK-64: cond.end:
// CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
// CHECK-64-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16 // CHECK-64-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
// CHECK-64-NEXT: store i16 [[CONV4]], i16* [[B2]], align 2 // CHECK-64-NEXT: store i16 [[CONV4]], ptr [[B2]], align 2
// CHECK-64-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
// CHECK-64-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP8:%.*]] = bitcast i32* [[A1]] to i8* // CHECK-64-NEXT: store ptr [[A1]], ptr [[TMP7]], align 8
// CHECK-64-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 8 // CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 // CHECK-64-NEXT: store ptr [[B2]], ptr [[TMP9]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = bitcast i16* [[B2]] to i8* // CHECK-64-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP6]], i32 2, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func3, ptr @_omp_reduction_inter_warp_copy_func4)
// CHECK-64-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8
// CHECK-64-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-64-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 2, i64 16, i8* [[TMP11]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func3, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func4)
// CHECK-64-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 1 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 1
// CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-64: .omp.reduction.then: // CHECK-64: .omp.reduction.then:
// CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[A1]], align 4
// CHECK-64-NEXT: [[OR5:%.*]] = or i32 [[TMP14]], [[TMP15]] // CHECK-64-NEXT: [[OR5:%.*]] = or i32 [[TMP14]], [[TMP15]]
// CHECK-64-NEXT: store i32 [[OR5]], i32* [[TMP0]], align 4 // CHECK-64-NEXT: store i32 [[OR5]], ptr [[TMP0]], align 4
// CHECK-64-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP1]], align 2 // CHECK-64-NEXT: [[TMP16:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK-64-NEXT: [[CONV6:%.*]] = sext i16 [[TMP16]] to i32 // CHECK-64-NEXT: [[CONV6:%.*]] = sext i16 [[TMP16]] to i32
// CHECK-64-NEXT: [[TMP17:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-64-NEXT: [[TMP17:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-64-NEXT: [[CONV7:%.*]] = sext i16 [[TMP17]] to i32 // CHECK-64-NEXT: [[CONV7:%.*]] = sext i16 [[TMP17]] to i32
// CHECK-64-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[CONV6]], [[CONV7]] // CHECK-64-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[CONV6]], [[CONV7]]
// CHECK-64-NEXT: br i1 [[CMP8]], label [[COND_TRUE9:%.*]], label [[COND_FALSE10:%.*]] // CHECK-64-NEXT: br i1 [[CMP8]], label [[COND_TRUE9:%.*]], label [[COND_FALSE10:%.*]]
// CHECK-64: cond.true9: // CHECK-64: cond.true9:
// CHECK-64-NEXT: [[TMP18:%.*]] = load i16, i16* [[TMP1]], align 2 // CHECK-64-NEXT: [[TMP18:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK-64-NEXT: br label [[COND_END11:%.*]] // CHECK-64-NEXT: br label [[COND_END11:%.*]]
// CHECK-64: cond.false10: // CHECK-64: cond.false10:
// CHECK-64-NEXT: [[TMP19:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-64-NEXT: [[TMP19:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-64-NEXT: br label [[COND_END11]] // CHECK-64-NEXT: br label [[COND_END11]]
// CHECK-64: cond.end11: // CHECK-64: cond.end11:
// CHECK-64-NEXT: [[COND12:%.*]] = phi i16 [ [[TMP18]], [[COND_TRUE9]] ], [ [[TMP19]], [[COND_FALSE10]] ] // CHECK-64-NEXT: [[COND12:%.*]] = phi i16 [ [[TMP18]], [[COND_TRUE9]] ], [ [[TMP19]], [[COND_FALSE10]] ]
// CHECK-64-NEXT: store i16 [[COND12]], i16* [[TMP1]], align 2 // CHECK-64-NEXT: store i16 [[COND12]], ptr [[TMP1]], align 2
// CHECK-64-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP6]]) // CHECK-64-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP6]])
// CHECK-64-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-64-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-64: .omp.reduction.done: // CHECK-64: .omp.reduction.done:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func3 // CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func3
// CHECK-64-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] { // CHECK-64-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x ptr], align 8
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i32, align 4
// CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca i16, align 2
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-64-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-64-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-64-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-64-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-64-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-64-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* // CHECK-64-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-64-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-64-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-64-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-64-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-64-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP9]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32** // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP11:%.*]] = load i32*, i32** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP11]], i64 1
// CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP11]], align 4
// CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP11]], i64 1
// CHECK-64-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP11]], align 4
// CHECK-64-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-64-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-64-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16 // CHECK-64-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
// CHECK-64-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]]) // CHECK-64-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
// CHECK-64-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4 // CHECK-64-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 4
// CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP11]], i64 1 // CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr i32, ptr [[TMP11]], i64 1
// CHECK-64-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i64 1 // CHECK-64-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[DOTOMP_REDUCTION_ELEMENT]], i64 1
// CHECK-64-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8* // CHECK-64-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP12]], align 8
// CHECK-64-NEXT: store i8* [[TMP21]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP22]], align 8
// CHECK-64-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i16** // CHECK-64-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP24:%.*]] = load i16*, i16** [[TMP23]], align 8 // CHECK-64-NEXT: [[TMP26:%.*]] = getelementptr i16, ptr [[TMP24]], i64 1
// CHECK-64-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP28:%.*]] = load i16, ptr [[TMP24]], align 2
// CHECK-64-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP24]], i64 1
// CHECK-64-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
// CHECK-64-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP24]], align 2
// CHECK-64-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32 // CHECK-64-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
// CHECK-64-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-64-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-64-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16 // CHECK-64-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
// CHECK-64-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]]) // CHECK-64-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
// CHECK-64-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16 // CHECK-64-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
// CHECK-64-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2 // CHECK-64-NEXT: store i16 [[TMP33]], ptr [[DOTOMP_REDUCTION_ELEMENT4]], align 2
// CHECK-64-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP24]], i64 1 // CHECK-64-NEXT: [[TMP34:%.*]] = getelementptr i16, ptr [[TMP24]], i64 1
// CHECK-64-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i64 1 // CHECK-64-NEXT: [[TMP35:%.*]] = getelementptr i16, ptr [[DOTOMP_REDUCTION_ELEMENT4]], i64 1
// CHECK-64-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8* // CHECK-64-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT4]], ptr [[TMP25]], align 8
// CHECK-64-NEXT: store i8* [[TMP36]], i8** [[TMP25]], align 8
// CHECK-64-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-64-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-64-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-64-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-64-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-64-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] // CHECK-64-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
// CHECK-64-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-64-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-64-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1 // CHECK-64-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
// CHECK-64-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0 // CHECK-64-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
// CHECK-64-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]] // CHECK-64-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
// CHECK-64-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-64-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-64-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]] // CHECK-64-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
// CHECK-64-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]] // CHECK-64-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
// CHECK-64-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]] // CHECK-64-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
// CHECK-64-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-64-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-64: then: // CHECK-64: then:
// CHECK-64-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8* // CHECK-64-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3]]
// CHECK-64-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-64-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
// CHECK-64-NEXT: br label [[IFCONT:%.*]] // CHECK-64-NEXT: br label [[IFCONT:%.*]]
// CHECK-64: else: // CHECK-64: else:
// CHECK-64-NEXT: br label [[IFCONT]] // CHECK-64-NEXT: br label [[IFCONT]]
// CHECK-64: ifcont: // CHECK-64: ifcont:
// CHECK-64-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-64-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-64-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-64-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-64-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]] // CHECK-64-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
// CHECK-64-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]] // CHECK-64-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
// CHECK-64: then5: // CHECK-64: then5:
// CHECK-64-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32** // CHECK-64-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP54]], align 8
// CHECK-64-NEXT: [[TMP56:%.*]] = load i32*, i32** [[TMP55]], align 8 // CHECK-64-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP59:%.*]] = load ptr, ptr [[TMP57]], align 8
// CHECK-64-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32** // CHECK-64-NEXT: [[TMP60:%.*]] = load i32, ptr [[TMP56]], align 4
// CHECK-64-NEXT: [[TMP59:%.*]] = load i32*, i32** [[TMP58]], align 8 // CHECK-64-NEXT: store i32 [[TMP60]], ptr [[TMP59]], align 4
// CHECK-64-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP56]], align 4 // CHECK-64-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
// CHECK-64-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4 // CHECK-64-NEXT: [[TMP63:%.*]] = load ptr, ptr [[TMP61]], align 8
// CHECK-64-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP64:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i16** // CHECK-64-NEXT: [[TMP66:%.*]] = load ptr, ptr [[TMP64]], align 8
// CHECK-64-NEXT: [[TMP63:%.*]] = load i16*, i16** [[TMP62]], align 8 // CHECK-64-NEXT: [[TMP67:%.*]] = load i16, ptr [[TMP63]], align 2
// CHECK-64-NEXT: [[TMP64:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1 // CHECK-64-NEXT: store i16 [[TMP67]], ptr [[TMP66]], align 2
// CHECK-64-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to i16**
// CHECK-64-NEXT: [[TMP66:%.*]] = load i16*, i16** [[TMP65]], align 8
// CHECK-64-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP63]], align 2
// CHECK-64-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
// CHECK-64-NEXT: br label [[IFCONT7:%.*]] // CHECK-64-NEXT: br label [[IFCONT7:%.*]]
// CHECK-64: else6: // CHECK-64: else6:
// CHECK-64-NEXT: br label [[IFCONT7]] // CHECK-64-NEXT: br label [[IFCONT7]]
// CHECK-64: ifcont7: // CHECK-64: ifcont7:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func4 // CHECK-64-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func4
// CHECK-64-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-64-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-64-NEXT: entry: // CHECK-64-NEXT: entry:
// CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
// CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-64-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-64-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-64-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-64-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-64-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-64-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8 // CHECK-64-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 8
// CHECK-64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]* // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-64-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-64-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-64-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-64: then: // CHECK-64: then:
// CHECK-64-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 8 // CHECK-64-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK-64-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* // CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 // CHECK-64-NEXT: store volatile i32 [[TMP12]], ptr addrspace(3) [[TMP11]], align 4
// CHECK-64-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
// CHECK-64-NEXT: br label [[IFCONT:%.*]] // CHECK-64-NEXT: br label [[IFCONT:%.*]]
// CHECK-64: else: // CHECK-64: else:
// CHECK-64-NEXT: br label [[IFCONT]] // CHECK-64-NEXT: br label [[IFCONT]]
// CHECK-64: ifcont: // CHECK-64: ifcont:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]] // CHECK-64-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
// CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-64: then2: // CHECK-64: then2:
// CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-64-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 0
// CHECK-64-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 // CHECK-64-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
// CHECK-64-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* // CHECK-64-NEXT: [[TMP18:%.*]] = load volatile i32, ptr addrspace(3) [[TMP14]], align 4
// CHECK-64-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4 // CHECK-64-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4
// CHECK-64-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
// CHECK-64-NEXT: br label [[IFCONT4:%.*]] // CHECK-64-NEXT: br label [[IFCONT4:%.*]]
// CHECK-64: else3: // CHECK-64: else3:
// CHECK-64-NEXT: br label [[IFCONT4]] // CHECK-64-NEXT: br label [[IFCONT4]]
// CHECK-64: ifcont4: // CHECK-64: ifcont4:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-64-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-64-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]] // CHECK-64-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
// CHECK-64: then6: // CHECK-64: then6:
// CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 8 // CHECK-64-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8
// CHECK-64-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16* // CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-64-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-64-NEXT: [[TMP24:%.*]] = load i16, ptr [[TMP20]], align 2
// CHECK-64-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)* // CHECK-64-NEXT: store volatile i16 [[TMP24]], ptr addrspace(3) [[TMP22]], align 2
// CHECK-64-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
// CHECK-64-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
// CHECK-64-NEXT: br label [[IFCONT8:%.*]] // CHECK-64-NEXT: br label [[IFCONT8:%.*]]
// CHECK-64: else7: // CHECK-64: else7:
// CHECK-64-NEXT: br label [[IFCONT8]] // CHECK-64-NEXT: br label [[IFCONT8]]
// CHECK-64: ifcont8: // CHECK-64: ifcont8:
// CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-64-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-64-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]] // CHECK-64-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
// CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]] // CHECK-64-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
// CHECK-64: then10: // CHECK-64: then10:
// CHECK-64-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-64-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-64-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)* // CHECK-64-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i64 0, i64 1
// CHECK-64-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP28]], align 8
// CHECK-64-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 8 // CHECK-64-NEXT: [[TMP31:%.*]] = load volatile i16, ptr addrspace(3) [[TMP26]], align 2
// CHECK-64-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16* // CHECK-64-NEXT: store i16 [[TMP31]], ptr [[TMP29]], align 2
// CHECK-64-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
// CHECK-64-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
// CHECK-64-NEXT: br label [[IFCONT12:%.*]] // CHECK-64-NEXT: br label [[IFCONT12:%.*]]
// CHECK-64: else11: // CHECK-64: else11:
// CHECK-64-NEXT: br label [[IFCONT12]] // CHECK-64-NEXT: br label [[IFCONT12]]
// CHECK-64: ifcont12: // CHECK-64: ifcont12:
// CHECK-64-NEXT: ret void // CHECK-64-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24
// CHECK-32-SAME: (double* noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-32-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[E_ADDR:%.*]] = alloca double*, align 4 // CHECK-32-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 4
// CHECK-32-NEXT: store double* [[E]], double** [[E_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
// CHECK-32-NEXT: [[TMP0:%.*]] = load double*, double** [[E_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
// CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false) // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1:[0-9]+]], i8 2, i1 false)
// CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
// CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-32: user_code.entry: // CHECK-32: user_code.entry:
// CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP0]] to i8* // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 4
// CHECK-32-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 4 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 1)
// CHECK-32-NEXT: [[TMP5:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, double*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined to i8*), i8* null, i8** [[TMP5]], i32 1)
// CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// CHECK-32: worker.exit: // CHECK-32: worker.exit:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined
// CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR1:[0-9]+]] { // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[E_ADDR:%.*]] = alloca double*, align 4 // CHECK-32-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[E1:%.*]] = alloca double, align 8 // CHECK-32-NEXT: [[E1:%.*]] = alloca double, align 8
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4
// CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
// CHECK-32-NEXT: store double* [[E]], double** [[E_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
// CHECK-32-NEXT: [[TMP0:%.*]] = load double*, double** [[E_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
// CHECK-32-NEXT: store double 0.000000e+00, double* [[E1]], align 8 // CHECK-32-NEXT: store double 0.000000e+00, ptr [[E1]], align 8
// CHECK-32-NEXT: [[TMP1:%.*]] = load double, double* [[E1]], align 8 // CHECK-32-NEXT: [[TMP1:%.*]] = load double, ptr [[E1]], align 8
// CHECK-32-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], 5.000000e+00 // CHECK-32-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], 5.000000e+00
// CHECK-32-NEXT: store double [[ADD]], double* [[E1]], align 8 // CHECK-32-NEXT: store double [[ADD]], ptr [[E1]], align 8
// CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK-32-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP5:%.*]] = bitcast double* [[E1]] to i8* // CHECK-32-NEXT: store ptr [[E1]], ptr [[TMP4]], align 4
// CHECK-32-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func, ptr @_omp_reduction_inter_warp_copy_func)
// CHECK-32-NEXT: [[TMP6:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-32-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 4, i8* [[TMP6]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func)
// CHECK-32-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 1 // CHECK-32-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 1
// CHECK-32-NEXT: br i1 [[TMP8]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-32-NEXT: br i1 [[TMP8]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-32: .omp.reduction.then: // CHECK-32: .omp.reduction.then:
// CHECK-32-NEXT: [[TMP9:%.*]] = load double, double* [[TMP0]], align 8 // CHECK-32-NEXT: [[TMP9:%.*]] = load double, ptr [[TMP0]], align 8
// CHECK-32-NEXT: [[TMP10:%.*]] = load double, double* [[E1]], align 8 // CHECK-32-NEXT: [[TMP10:%.*]] = load double, ptr [[E1]], align 8
// CHECK-32-NEXT: [[ADD2:%.*]] = fadd double [[TMP9]], [[TMP10]] // CHECK-32-NEXT: [[ADD2:%.*]] = fadd double [[TMP9]], [[TMP10]]
// CHECK-32-NEXT: store double [[ADD2]], double* [[TMP0]], align 8 // CHECK-32-NEXT: store double [[ADD2]], ptr [[TMP0]], align 8
// CHECK-32-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP3]]) // CHECK-32-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP3]])
// CHECK-32-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-32-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-32: .omp.reduction.done: // CHECK-32: .omp.reduction.done:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func // CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func
// CHECK-32-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2:[0-9]+]] { // CHECK-32-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x ptr], align 4
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca double, align 8 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca double, align 8
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-32-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-32-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-32-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-32-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-32-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-32-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* // CHECK-32-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-32-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-32-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-32-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-32-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-32-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK-32-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to double** // CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP11:%.*]] = load double*, double** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr double, ptr [[TMP11]], i32 1
// CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP11]], align 8
// CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr double, double* [[TMP11]], i32 1
// CHECK-32-NEXT: [[TMP14:%.*]] = bitcast double* [[TMP13]] to i8*
// CHECK-32-NEXT: [[TMP15:%.*]] = bitcast double* [[TMP11]] to i64*
// CHECK-32-NEXT: [[TMP16:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK-32-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 8
// CHECK-32-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16 // CHECK-32-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16
// CHECK-32-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]]) // CHECK-32-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]])
// CHECK-32-NEXT: store i64 [[TMP20]], i64* [[TMP16]], align 8 // CHECK-32-NEXT: store i64 [[TMP20]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 8
// CHECK-32-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP15]], i32 1 // CHECK-32-NEXT: [[TMP21:%.*]] = getelementptr i64, ptr [[TMP11]], i32 1
// CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr i64, i64* [[TMP16]], i32 1 // CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr i64, ptr [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK-32-NEXT: [[TMP23:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8* // CHECK-32-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP12]], align 4
// CHECK-32-NEXT: store i8* [[TMP23]], i8** [[TMP12]], align 4
// CHECK-32-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-32-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-32-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-32-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]] // CHECK-32-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]]
// CHECK-32-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-32-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-32-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1 // CHECK-32-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1
// CHECK-32-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0 // CHECK-32-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0
// CHECK-32-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]] // CHECK-32-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]]
// CHECK-32-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-32-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-32-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]] // CHECK-32-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]]
// CHECK-32-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]] // CHECK-32-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]]
// CHECK-32-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]] // CHECK-32-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]]
// CHECK-32-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32: then: // CHECK-32: then:
// CHECK-32-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* // CHECK-32-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3:[0-9]+]]
// CHECK-32-NEXT: [[TMP37:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-32-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP36]], i8* [[TMP37]]) #[[ATTR3:[0-9]+]]
// CHECK-32-NEXT: br label [[IFCONT:%.*]] // CHECK-32-NEXT: br label [[IFCONT:%.*]]
// CHECK-32: else: // CHECK-32: else:
// CHECK-32-NEXT: br label [[IFCONT]] // CHECK-32-NEXT: br label [[IFCONT]]
// CHECK-32: ifcont: // CHECK-32: ifcont:
// CHECK-32-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-32-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] // CHECK-32-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
// CHECK-32-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]] // CHECK-32-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
// CHECK-32: then4: // CHECK-32: then4:
// CHECK-32-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to double** // CHECK-32-NEXT: [[TMP43:%.*]] = load ptr, ptr [[TMP41]], align 4
// CHECK-32-NEXT: [[TMP43:%.*]] = load double*, double** [[TMP42]], align 4 // CHECK-32-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP46:%.*]] = load ptr, ptr [[TMP44]], align 4
// CHECK-32-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to double** // CHECK-32-NEXT: [[TMP47:%.*]] = load double, ptr [[TMP43]], align 8
// CHECK-32-NEXT: [[TMP46:%.*]] = load double*, double** [[TMP45]], align 4 // CHECK-32-NEXT: store double [[TMP47]], ptr [[TMP46]], align 8
// CHECK-32-NEXT: [[TMP47:%.*]] = load double, double* [[TMP43]], align 8
// CHECK-32-NEXT: store double [[TMP47]], double* [[TMP46]], align 8
// CHECK-32-NEXT: br label [[IFCONT6:%.*]] // CHECK-32-NEXT: br label [[IFCONT6:%.*]]
// CHECK-32: else5: // CHECK-32: else5:
// CHECK-32-NEXT: br label [[IFCONT6]] // CHECK-32-NEXT: br label [[IFCONT6]]
// CHECK-32: ifcont6: // CHECK-32: ifcont6:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func // CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func
// CHECK-32-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-32-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-32-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-32-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-32-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-32-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-32-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [1 x i8*]* // CHECK-32-NEXT: store i32 0, ptr [[DOTCNT_ADDR]], align 4
// CHECK-32-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4
// CHECK-32-NEXT: br label [[PRECOND:%.*]] // CHECK-32-NEXT: br label [[PRECOND:%.*]]
// CHECK-32: precond: // CHECK-32: precond:
// CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCNT_ADDR]], align 4
// CHECK-32-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2
// CHECK-32-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]] // CHECK-32-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]]
// CHECK-32: body: // CHECK-32: body:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]])
// CHECK-32-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32: then: // CHECK-32: then:
// CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 4
// CHECK-32-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* // CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP11]], i32 [[TMP8]]
// CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 [[TMP8]] // CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP13]], align 4
// CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 4 // CHECK-32-NEXT: store volatile i32 [[TMP15]], ptr addrspace(3) [[TMP14]], align 4
// CHECK-32-NEXT: store volatile i32 [[TMP15]], i32 addrspace(3)* [[TMP14]], align 4
// CHECK-32-NEXT: br label [[IFCONT:%.*]] // CHECK-32-NEXT: br label [[IFCONT:%.*]]
// CHECK-32: else: // CHECK-32: else:
// CHECK-32-NEXT: br label [[IFCONT]] // CHECK-32-NEXT: br label [[IFCONT]]
// CHECK-32: ifcont: // CHECK-32: ifcont:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]] // CHECK-32-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]]
// CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-32: then2: // CHECK-32: then2:
// CHECK-32-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 4
// CHECK-32-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* // CHECK-32-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[TMP19]], i32 [[TMP8]]
// CHECK-32-NEXT: [[TMP21:%.*]] = getelementptr i32, i32* [[TMP20]], i32 [[TMP8]] // CHECK-32-NEXT: [[TMP22:%.*]] = load volatile i32, ptr addrspace(3) [[TMP17]], align 4
// CHECK-32-NEXT: [[TMP22:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP17]], align 4 // CHECK-32-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4
// CHECK-32-NEXT: store i32 [[TMP22]], i32* [[TMP21]], align 4
// CHECK-32-NEXT: br label [[IFCONT4:%.*]] // CHECK-32-NEXT: br label [[IFCONT4:%.*]]
// CHECK-32: else3: // CHECK-32: else3:
// CHECK-32-NEXT: br label [[IFCONT4]] // CHECK-32-NEXT: br label [[IFCONT4]]
// CHECK-32: ifcont4: // CHECK-32: ifcont4:
// CHECK-32-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK-32-NEXT: store i32 [[TMP23]], i32* [[DOTCNT_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP23]], ptr [[DOTCNT_ADDR]], align 4
// CHECK-32-NEXT: br label [[PRECOND]] // CHECK-32-NEXT: br label [[PRECOND]]
// CHECK-32: exit: // CHECK-32: exit:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29
// CHECK-32-SAME: (i8* noundef nonnull align 1 dereferenceable(1) [[C:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { // CHECK-32-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[C_ADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[D_ADDR:%.*]] = alloca float*, align 4 // CHECK-32-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-NEXT: store i8* [[C]], i8** [[C_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
// CHECK-32-NEXT: store float* [[D]], float** [[D_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** [[C_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
// CHECK-32-NEXT: [[TMP1:%.*]] = load float*, float** [[D_ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 2, i1 false)
// CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1
// CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-32: user_code.entry: // CHECK-32: user_code.entry:
// CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[TMP4]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
// CHECK-32-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP6:%.*]] = bitcast float* [[TMP1]] to i8* // CHECK-32-NEXT: store ptr [[TMP1]], ptr [[TMP5]], align 4
// CHECK-32-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 4 // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
// CHECK-32-NEXT: [[TMP7:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i8*, float*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined to i8*), i8* null, i8** [[TMP7]], i32 2)
// CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// CHECK-32: worker.exit: // CHECK-32: worker.exit:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined
// CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[C:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[C_ADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[D_ADDR:%.*]] = alloca float*, align 4 // CHECK-32-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[C1:%.*]] = alloca i8, align 1 // CHECK-32-NEXT: [[C1:%.*]] = alloca i8, align 1
// CHECK-32-NEXT: [[D2:%.*]] = alloca float, align 4 // CHECK-32-NEXT: [[D2:%.*]] = alloca float, align 4
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
// CHECK-32-NEXT: store i8* [[C]], i8** [[C_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
// CHECK-32-NEXT: store float* [[D]], float** [[D_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** [[C_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
// CHECK-32-NEXT: [[TMP1:%.*]] = load float*, float** [[D_ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 4
// CHECK-32-NEXT: store i8 0, i8* [[C1]], align 1 // CHECK-32-NEXT: store i8 0, ptr [[C1]], align 1
// CHECK-32-NEXT: store float 1.000000e+00, float* [[D2]], align 4 // CHECK-32-NEXT: store float 1.000000e+00, ptr [[D2]], align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = load i8, i8* [[C1]], align 1 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[C1]], align 1
// CHECK-32-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32 // CHECK-32-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
// CHECK-32-NEXT: [[XOR:%.*]] = xor i32 [[CONV]], 2 // CHECK-32-NEXT: [[XOR:%.*]] = xor i32 [[CONV]], 2
// CHECK-32-NEXT: [[CONV3:%.*]] = trunc i32 [[XOR]] to i8 // CHECK-32-NEXT: [[CONV3:%.*]] = trunc i32 [[XOR]] to i8
// CHECK-32-NEXT: store i8 [[CONV3]], i8* [[C1]], align 1 // CHECK-32-NEXT: store i8 [[CONV3]], ptr [[C1]], align 1
// CHECK-32-NEXT: [[TMP3:%.*]] = load float, float* [[D2]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load float, ptr [[D2]], align 4
// CHECK-32-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], 3.300000e+01 // CHECK-32-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], 3.300000e+01
// CHECK-32-NEXT: store float [[MUL]], float* [[D2]], align 4 // CHECK-32-NEXT: store float [[MUL]], ptr [[D2]], align 4
// CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK-32-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
// CHECK-32-NEXT: store i8* [[C1]], i8** [[TMP6]], align 4 // CHECK-32-NEXT: store ptr [[C1]], ptr [[TMP6]], align 4
// CHECK-32-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP8:%.*]] = bitcast float* [[D2]] to i8* // CHECK-32-NEXT: store ptr [[D2]], ptr [[TMP7]], align 4
// CHECK-32-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP5]], i32 2, i32 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func1, ptr @_omp_reduction_inter_warp_copy_func2)
// CHECK-32-NEXT: [[TMP9:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-32-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 2, i32 8, i8* [[TMP9]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func1, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func2)
// CHECK-32-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1
// CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-32: .omp.reduction.then: // CHECK-32: .omp.reduction.then:
// CHECK-32-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP0]], align 1 // CHECK-32-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP0]], align 1
// CHECK-32-NEXT: [[CONV4:%.*]] = sext i8 [[TMP12]] to i32 // CHECK-32-NEXT: [[CONV4:%.*]] = sext i8 [[TMP12]] to i32
// CHECK-32-NEXT: [[TMP13:%.*]] = load i8, i8* [[C1]], align 1 // CHECK-32-NEXT: [[TMP13:%.*]] = load i8, ptr [[C1]], align 1
// CHECK-32-NEXT: [[CONV5:%.*]] = sext i8 [[TMP13]] to i32 // CHECK-32-NEXT: [[CONV5:%.*]] = sext i8 [[TMP13]] to i32
// CHECK-32-NEXT: [[XOR6:%.*]] = xor i32 [[CONV4]], [[CONV5]] // CHECK-32-NEXT: [[XOR6:%.*]] = xor i32 [[CONV4]], [[CONV5]]
// CHECK-32-NEXT: [[CONV7:%.*]] = trunc i32 [[XOR6]] to i8 // CHECK-32-NEXT: [[CONV7:%.*]] = trunc i32 [[XOR6]] to i8
// CHECK-32-NEXT: store i8 [[CONV7]], i8* [[TMP0]], align 1 // CHECK-32-NEXT: store i8 [[CONV7]], ptr [[TMP0]], align 1
// CHECK-32-NEXT: [[TMP14:%.*]] = load float, float* [[TMP1]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load float, ptr [[TMP1]], align 4
// CHECK-32-NEXT: [[TMP15:%.*]] = load float, float* [[D2]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load float, ptr [[D2]], align 4
// CHECK-32-NEXT: [[MUL8:%.*]] = fmul float [[TMP14]], [[TMP15]] // CHECK-32-NEXT: [[MUL8:%.*]] = fmul float [[TMP14]], [[TMP15]]
// CHECK-32-NEXT: store float [[MUL8]], float* [[TMP1]], align 4 // CHECK-32-NEXT: store float [[MUL8]], ptr [[TMP1]], align 4
// CHECK-32-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP5]]) // CHECK-32-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP5]])
// CHECK-32-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-32-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-32: .omp.reduction.done: // CHECK-32: .omp.reduction.done:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func1 // CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func1
// CHECK-32-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] { // CHECK-32-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i8, align 1 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i8, align 1
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca float, align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca float, align 4
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-32-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-32-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-32-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-32-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-32-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-32-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* // CHECK-32-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-32-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-32-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-32-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-32-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-32-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK-32-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP10]], i32 1
// CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1 // CHECK-32-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP10]], align 1
// CHECK-32-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP10]], align 1
// CHECK-32-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32 // CHECK-32-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32
// CHECK-32-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 // CHECK-32-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16
// CHECK-32-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]]) // CHECK-32-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]])
// CHECK-32-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8 // CHECK-32-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
// CHECK-32-NEXT: store i8 [[TMP18]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1 // CHECK-32-NEXT: store i8 [[TMP18]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 1
// CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1 // CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP10]], i32 1
// CHECK-32-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i32 1 // CHECK-32-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK-32-NEXT: store i8* [[DOTOMP_REDUCTION_ELEMENT]], i8** [[TMP11]], align 4 // CHECK-32-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP11]], align 4
// CHECK-32-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to float** // CHECK-32-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP21]], align 4
// CHECK-32-NEXT: [[TMP23:%.*]] = load float*, float** [[TMP22]], align 4 // CHECK-32-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP25:%.*]] = getelementptr float, ptr [[TMP23]], i32 1
// CHECK-32-NEXT: [[TMP25:%.*]] = getelementptr float, float* [[TMP23]], i32 1 // CHECK-32-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 4
// CHECK-32-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to i8*
// CHECK-32-NEXT: [[TMP27:%.*]] = bitcast float* [[TMP23]] to i32*
// CHECK-32-NEXT: [[TMP28:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
// CHECK-32-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
// CHECK-32-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16 // CHECK-32-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
// CHECK-32-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]]) // CHECK-32-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
// CHECK-32-NEXT: store i32 [[TMP32]], i32* [[TMP28]], align 4 // CHECK-32-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_REDUCTION_ELEMENT4]], align 4
// CHECK-32-NEXT: [[TMP33:%.*]] = getelementptr i32, i32* [[TMP27]], i32 1 // CHECK-32-NEXT: [[TMP33:%.*]] = getelementptr i32, ptr [[TMP23]], i32 1
// CHECK-32-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1 // CHECK-32-NEXT: [[TMP34:%.*]] = getelementptr i32, ptr [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
// CHECK-32-NEXT: [[TMP35:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8* // CHECK-32-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT4]], ptr [[TMP24]], align 4
// CHECK-32-NEXT: store i8* [[TMP35]], i8** [[TMP24]], align 4
// CHECK-32-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-32-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-32-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-32-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] // CHECK-32-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
// CHECK-32-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-32-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-32-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1 // CHECK-32-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1
// CHECK-32-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0 // CHECK-32-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0
// CHECK-32-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]] // CHECK-32-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]]
// CHECK-32-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-32-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-32-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]] // CHECK-32-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]]
// CHECK-32-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]] // CHECK-32-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]]
// CHECK-32-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]] // CHECK-32-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]]
// CHECK-32-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32: then: // CHECK-32: then:
// CHECK-32-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8* // CHECK-32-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3]]
// CHECK-32-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-32-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP48]], i8* [[TMP49]]) #[[ATTR3]]
// CHECK-32-NEXT: br label [[IFCONT:%.*]] // CHECK-32-NEXT: br label [[IFCONT:%.*]]
// CHECK-32: else: // CHECK-32: else:
// CHECK-32-NEXT: br label [[IFCONT]] // CHECK-32-NEXT: br label [[IFCONT]]
// CHECK-32: ifcont: // CHECK-32: ifcont:
// CHECK-32-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-32-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]] // CHECK-32-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]]
// CHECK-32-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]] // CHECK-32-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
// CHECK-32: then5: // CHECK-32: then5:
// CHECK-32-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP54:%.*]] = load i8*, i8** [[TMP53]], align 4 // CHECK-32-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP53]], align 4
// CHECK-32-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP56:%.*]] = load i8*, i8** [[TMP55]], align 4 // CHECK-32-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP55]], align 4
// CHECK-32-NEXT: [[TMP57:%.*]] = load i8, i8* [[TMP54]], align 1 // CHECK-32-NEXT: [[TMP57:%.*]] = load i8, ptr [[TMP54]], align 1
// CHECK-32-NEXT: store i8 [[TMP57]], i8* [[TMP56]], align 1 // CHECK-32-NEXT: store i8 [[TMP57]], ptr [[TMP56]], align 1
// CHECK-32-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to float** // CHECK-32-NEXT: [[TMP60:%.*]] = load ptr, ptr [[TMP58]], align 4
// CHECK-32-NEXT: [[TMP60:%.*]] = load float*, float** [[TMP59]], align 4 // CHECK-32-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP63:%.*]] = load ptr, ptr [[TMP61]], align 4
// CHECK-32-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to float** // CHECK-32-NEXT: [[TMP64:%.*]] = load float, ptr [[TMP60]], align 4
// CHECK-32-NEXT: [[TMP63:%.*]] = load float*, float** [[TMP62]], align 4 // CHECK-32-NEXT: store float [[TMP64]], ptr [[TMP63]], align 4
// CHECK-32-NEXT: [[TMP64:%.*]] = load float, float* [[TMP60]], align 4
// CHECK-32-NEXT: store float [[TMP64]], float* [[TMP63]], align 4
// CHECK-32-NEXT: br label [[IFCONT7:%.*]] // CHECK-32-NEXT: br label [[IFCONT7:%.*]]
// CHECK-32: else6: // CHECK-32: else6:
// CHECK-32-NEXT: br label [[IFCONT7]] // CHECK-32-NEXT: br label [[IFCONT7]]
// CHECK-32: ifcont7: // CHECK-32: ifcont7:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func2 // CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func2
// CHECK-32-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-32-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-32-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-32-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-32-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-32-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]* // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32: then: // CHECK-32: then:
// CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 4
// CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-NEXT: [[TMP11:%.*]] = bitcast i32 addrspace(3)* [[TMP10]] to i8 addrspace(3)* // CHECK-32-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP9]], align 1
// CHECK-32-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP9]], align 1 // CHECK-32-NEXT: store volatile i8 [[TMP12]], ptr addrspace(3) [[TMP10]], align 1
// CHECK-32-NEXT: store volatile i8 [[TMP12]], i8 addrspace(3)* [[TMP11]], align 1
// CHECK-32-NEXT: br label [[IFCONT:%.*]] // CHECK-32-NEXT: br label [[IFCONT:%.*]]
// CHECK-32: else: // CHECK-32: else:
// CHECK-32-NEXT: br label [[IFCONT]] // CHECK-32-NEXT: br label [[IFCONT]]
// CHECK-32: ifcont: // CHECK-32: ifcont:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]] // CHECK-32-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
// CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-32: then2: // CHECK-32: then2:
// CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-NEXT: [[TMP15:%.*]] = bitcast i32 addrspace(3)* [[TMP14]] to i8 addrspace(3)* // CHECK-32-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 4
// CHECK-32-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load volatile i8, ptr addrspace(3) [[TMP14]], align 1
// CHECK-32-NEXT: [[TMP18:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP15]], align 1 // CHECK-32-NEXT: store i8 [[TMP18]], ptr [[TMP17]], align 1
// CHECK-32-NEXT: store i8 [[TMP18]], i8* [[TMP17]], align 1
// CHECK-32-NEXT: br label [[IFCONT4:%.*]] // CHECK-32-NEXT: br label [[IFCONT4:%.*]]
// CHECK-32: else3: // CHECK-32: else3:
// CHECK-32-NEXT: br label [[IFCONT4]] // CHECK-32-NEXT: br label [[IFCONT4]]
// CHECK-32: ifcont4: // CHECK-32: ifcont4:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]] // CHECK-32-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
// CHECK-32: then6: // CHECK-32: then6:
// CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4 // CHECK-32-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 4
// CHECK-32-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i32* // CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK-32-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP21]], align 4 // CHECK-32-NEXT: store volatile i32 [[TMP23]], ptr addrspace(3) [[TMP22]], align 4
// CHECK-32-NEXT: store volatile i32 [[TMP23]], i32 addrspace(3)* [[TMP22]], align 4
// CHECK-32-NEXT: br label [[IFCONT8:%.*]] // CHECK-32-NEXT: br label [[IFCONT8:%.*]]
// CHECK-32: else7: // CHECK-32: else7:
// CHECK-32-NEXT: br label [[IFCONT8]] // CHECK-32-NEXT: br label [[IFCONT8]]
// CHECK-32: ifcont8: // CHECK-32: ifcont8:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]] // CHECK-32-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]]
// CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]] // CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
// CHECK-32: then10: // CHECK-32: then10:
// CHECK-32-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 4 // CHECK-32-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 4
// CHECK-32-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to i32* // CHECK-32-NEXT: [[TMP29:%.*]] = load volatile i32, ptr addrspace(3) [[TMP25]], align 4
// CHECK-32-NEXT: [[TMP29:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP25]], align 4 // CHECK-32-NEXT: store i32 [[TMP29]], ptr [[TMP27]], align 4
// CHECK-32-NEXT: store i32 [[TMP29]], i32* [[TMP28]], align 4
// CHECK-32-NEXT: br label [[IFCONT12:%.*]] // CHECK-32-NEXT: br label [[IFCONT12:%.*]]
// CHECK-32: else11: // CHECK-32: else11:
// CHECK-32-NEXT: br label [[IFCONT12]] // CHECK-32-NEXT: br label [[IFCONT12]]
// CHECK-32: ifcont12: // CHECK-32: ifcont12:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35 // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35
// CHECK-32-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR0]] { // CHECK-32-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR0]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[B_ADDR:%.*]] = alloca i16*, align 4 // CHECK-32-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
// CHECK-32-NEXT: store i16* [[B]], i16** [[B_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
// CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
// CHECK-32-NEXT: [[TMP1:%.*]] = load i16*, i16** [[B_ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 2, i1 false)
// CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1 // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1
// CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-32: user_code.entry: // CHECK-32: user_code.entry:
// CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP5:%.*]] = bitcast i32* [[TMP0]] to i8* // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
// CHECK-32-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: store ptr [[TMP1]], ptr [[TMP6]], align 4
// CHECK-32-NEXT: [[TMP7:%.*]] = bitcast i16* [[TMP1]] to i8* // CHECK-32-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
// CHECK-32-NEXT: store i8* [[TMP7]], i8** [[TMP6]], align 4 // CHECK-32-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-32-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
// CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i16*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined to i8*), i8* null, i8** [[TMP8]], i32 2)
// CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// CHECK-32: worker.exit: // CHECK-32: worker.exit:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined
// CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR1]] { // CHECK-32-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR1]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[B_ADDR:%.*]] = alloca i16*, align 4 // CHECK-32-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[A1:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[A1:%.*]] = alloca i32, align 4
// CHECK-32-NEXT: [[B2:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[B2:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
// CHECK-32-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
// CHECK-32-NEXT: store i16* [[B]], i16** [[B_ADDR]], align 4 // CHECK-32-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
// CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
// CHECK-32-NEXT: [[TMP1:%.*]] = load i16*, i16** [[B_ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
// CHECK-32-NEXT: store i32 0, i32* [[A1]], align 4 // CHECK-32-NEXT: store i32 0, ptr [[A1]], align 4
// CHECK-32-NEXT: store i16 -32768, i16* [[B2]], align 2 // CHECK-32-NEXT: store i16 -32768, ptr [[B2]], align 2
// CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, ptr [[A1]], align 4
// CHECK-32-NEXT: [[OR:%.*]] = or i32 [[TMP2]], 1 // CHECK-32-NEXT: [[OR:%.*]] = or i32 [[TMP2]], 1
// CHECK-32-NEXT: store i32 [[OR]], i32* [[A1]], align 4 // CHECK-32-NEXT: store i32 [[OR]], ptr [[A1]], align 4
// CHECK-32-NEXT: [[TMP3:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-NEXT: [[TMP3:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 // CHECK-32-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
// CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 99, [[CONV]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 99, [[CONV]]
// CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
// CHECK-32: cond.true: // CHECK-32: cond.true:
// CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32-NEXT: br label [[COND_END:%.*]]
// CHECK-32: cond.false: // CHECK-32: cond.false:
// CHECK-32-NEXT: [[TMP4:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-NEXT: [[TMP4:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-NEXT: [[CONV3:%.*]] = sext i16 [[TMP4]] to i32 // CHECK-32-NEXT: [[CONV3:%.*]] = sext i16 [[TMP4]] to i32
// CHECK-32-NEXT: br label [[COND_END]] // CHECK-32-NEXT: br label [[COND_END]]
// CHECK-32: cond.end: // CHECK-32: cond.end:
// CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
// CHECK-32-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16 // CHECK-32-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
// CHECK-32-NEXT: store i16 [[CONV4]], i16* [[B2]], align 2 // CHECK-32-NEXT: store i16 [[CONV4]], ptr [[B2]], align 2
// CHECK-32-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
// CHECK-32-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP8:%.*]] = bitcast i32* [[A1]] to i8* // CHECK-32-NEXT: store ptr [[A1]], ptr [[TMP7]], align 4
// CHECK-32-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1 // CHECK-32-NEXT: store ptr [[B2]], ptr [[TMP9]], align 4
// CHECK-32-NEXT: [[TMP10:%.*]] = bitcast i16* [[B2]] to i8* // CHECK-32-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP6]], i32 2, i32 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func3, ptr @_omp_reduction_inter_warp_copy_func4)
// CHECK-32-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
// CHECK-32-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-32-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 2, i32 8, i8* [[TMP11]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func3, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func4)
// CHECK-32-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 1 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 1
// CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-32: .omp.reduction.then: // CHECK-32: .omp.reduction.then:
// CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[A1]], align 4
// CHECK-32-NEXT: [[OR5:%.*]] = or i32 [[TMP14]], [[TMP15]] // CHECK-32-NEXT: [[OR5:%.*]] = or i32 [[TMP14]], [[TMP15]]
// CHECK-32-NEXT: store i32 [[OR5]], i32* [[TMP0]], align 4 // CHECK-32-NEXT: store i32 [[OR5]], ptr [[TMP0]], align 4
// CHECK-32-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP1]], align 2 // CHECK-32-NEXT: [[TMP16:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK-32-NEXT: [[CONV6:%.*]] = sext i16 [[TMP16]] to i32 // CHECK-32-NEXT: [[CONV6:%.*]] = sext i16 [[TMP16]] to i32
// CHECK-32-NEXT: [[TMP17:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-NEXT: [[TMP17:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-NEXT: [[CONV7:%.*]] = sext i16 [[TMP17]] to i32 // CHECK-32-NEXT: [[CONV7:%.*]] = sext i16 [[TMP17]] to i32
// CHECK-32-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[CONV6]], [[CONV7]] // CHECK-32-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[CONV6]], [[CONV7]]
// CHECK-32-NEXT: br i1 [[CMP8]], label [[COND_TRUE9:%.*]], label [[COND_FALSE10:%.*]] // CHECK-32-NEXT: br i1 [[CMP8]], label [[COND_TRUE9:%.*]], label [[COND_FALSE10:%.*]]
// CHECK-32: cond.true9: // CHECK-32: cond.true9:
// CHECK-32-NEXT: [[TMP18:%.*]] = load i16, i16* [[TMP1]], align 2 // CHECK-32-NEXT: [[TMP18:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK-32-NEXT: br label [[COND_END11:%.*]] // CHECK-32-NEXT: br label [[COND_END11:%.*]]
// CHECK-32: cond.false10: // CHECK-32: cond.false10:
// CHECK-32-NEXT: [[TMP19:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-NEXT: [[TMP19:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-NEXT: br label [[COND_END11]] // CHECK-32-NEXT: br label [[COND_END11]]
// CHECK-32: cond.end11: // CHECK-32: cond.end11:
// CHECK-32-NEXT: [[COND12:%.*]] = phi i16 [ [[TMP18]], [[COND_TRUE9]] ], [ [[TMP19]], [[COND_FALSE10]] ] // CHECK-32-NEXT: [[COND12:%.*]] = phi i16 [ [[TMP18]], [[COND_TRUE9]] ], [ [[TMP19]], [[COND_FALSE10]] ]
// CHECK-32-NEXT: store i16 [[COND12]], i16* [[TMP1]], align 2 // CHECK-32-NEXT: store i16 [[COND12]], ptr [[TMP1]], align 2
// CHECK-32-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP6]]) // CHECK-32-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP6]])
// CHECK-32-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-32-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-32: .omp.reduction.done: // CHECK-32: .omp.reduction.done:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func3 // CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func3
// CHECK-32-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] { // CHECK-32-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i32, align 4
// CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca i16, align 2
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-32-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-32-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-32-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-32-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-32-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-32-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* // CHECK-32-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-32-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-32-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-32-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-32-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-32-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK-32-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32** // CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP11:%.*]] = load i32*, i32** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP11]], i32 1
// CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP11]], align 4
// CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP11]], i32 1
// CHECK-32-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP11]], align 4
// CHECK-32-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16 // CHECK-32-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
// CHECK-32-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]]) // CHECK-32-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
// CHECK-32-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4 // CHECK-32-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 4
// CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP11]], i32 1 // CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr i32, ptr [[TMP11]], i32 1
// CHECK-32-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1 // CHECK-32-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK-32-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8* // CHECK-32-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP12]], align 4
// CHECK-32-NEXT: store i8* [[TMP21]], i8** [[TMP12]], align 4 // CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP22]], align 4
// CHECK-32-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i16** // CHECK-32-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP24:%.*]] = load i16*, i16** [[TMP23]], align 4 // CHECK-32-NEXT: [[TMP26:%.*]] = getelementptr i16, ptr [[TMP24]], i32 1
// CHECK-32-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP28:%.*]] = load i16, ptr [[TMP24]], align 2
// CHECK-32-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
// CHECK-32-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
// CHECK-32-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP24]], align 2
// CHECK-32-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32 // CHECK-32-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
// CHECK-32-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16 // CHECK-32-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
// CHECK-32-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]]) // CHECK-32-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
// CHECK-32-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16 // CHECK-32-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
// CHECK-32-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2 // CHECK-32-NEXT: store i16 [[TMP33]], ptr [[DOTOMP_REDUCTION_ELEMENT4]], align 2
// CHECK-32-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1 // CHECK-32-NEXT: [[TMP34:%.*]] = getelementptr i16, ptr [[TMP24]], i32 1
// CHECK-32-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1 // CHECK-32-NEXT: [[TMP35:%.*]] = getelementptr i16, ptr [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
// CHECK-32-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8* // CHECK-32-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT4]], ptr [[TMP25]], align 4
// CHECK-32-NEXT: store i8* [[TMP36]], i8** [[TMP25]], align 4
// CHECK-32-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-32-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-32-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-32-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] // CHECK-32-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
// CHECK-32-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-32-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-32-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1 // CHECK-32-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
// CHECK-32-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0 // CHECK-32-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
// CHECK-32-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]] // CHECK-32-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
// CHECK-32-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-32-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-32-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]] // CHECK-32-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
// CHECK-32-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]] // CHECK-32-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
// CHECK-32-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]] // CHECK-32-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
// CHECK-32-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32: then: // CHECK-32: then:
// CHECK-32-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8* // CHECK-32-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3]]
// CHECK-32-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-32-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
// CHECK-32-NEXT: br label [[IFCONT:%.*]] // CHECK-32-NEXT: br label [[IFCONT:%.*]]
// CHECK-32: else: // CHECK-32: else:
// CHECK-32-NEXT: br label [[IFCONT]] // CHECK-32-NEXT: br label [[IFCONT]]
// CHECK-32: ifcont: // CHECK-32: ifcont:
// CHECK-32-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-32-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]] // CHECK-32-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
// CHECK-32-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]] // CHECK-32-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
// CHECK-32: then5: // CHECK-32: then5:
// CHECK-32-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32** // CHECK-32-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP54]], align 4
// CHECK-32-NEXT: [[TMP56:%.*]] = load i32*, i32** [[TMP55]], align 4 // CHECK-32-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP59:%.*]] = load ptr, ptr [[TMP57]], align 4
// CHECK-32-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32** // CHECK-32-NEXT: [[TMP60:%.*]] = load i32, ptr [[TMP56]], align 4
// CHECK-32-NEXT: [[TMP59:%.*]] = load i32*, i32** [[TMP58]], align 4 // CHECK-32-NEXT: store i32 [[TMP60]], ptr [[TMP59]], align 4
// CHECK-32-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP56]], align 4 // CHECK-32-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4 // CHECK-32-NEXT: [[TMP63:%.*]] = load ptr, ptr [[TMP61]], align 4
// CHECK-32-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP64:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i16** // CHECK-32-NEXT: [[TMP66:%.*]] = load ptr, ptr [[TMP64]], align 4
// CHECK-32-NEXT: [[TMP63:%.*]] = load i16*, i16** [[TMP62]], align 4 // CHECK-32-NEXT: [[TMP67:%.*]] = load i16, ptr [[TMP63]], align 2
// CHECK-32-NEXT: [[TMP64:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-NEXT: store i16 [[TMP67]], ptr [[TMP66]], align 2
// CHECK-32-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to i16**
// CHECK-32-NEXT: [[TMP66:%.*]] = load i16*, i16** [[TMP65]], align 4
// CHECK-32-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP63]], align 2
// CHECK-32-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
// CHECK-32-NEXT: br label [[IFCONT7:%.*]] // CHECK-32-NEXT: br label [[IFCONT7:%.*]]
// CHECK-32: else6: // CHECK-32: else6:
// CHECK-32-NEXT: br label [[IFCONT7]] // CHECK-32-NEXT: br label [[IFCONT7]]
// CHECK-32: ifcont7: // CHECK-32: ifcont7:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func4 // CHECK-32-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func4
// CHECK-32-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-32-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-32-NEXT: entry: // CHECK-32-NEXT: entry:
// CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-32-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-32-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-32-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-32-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]* // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32: then: // CHECK-32: then:
// CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 4
// CHECK-32-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 // CHECK-32-NEXT: store volatile i32 [[TMP12]], ptr addrspace(3) [[TMP11]], align 4
// CHECK-32-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
// CHECK-32-NEXT: br label [[IFCONT:%.*]] // CHECK-32-NEXT: br label [[IFCONT:%.*]]
// CHECK-32: else: // CHECK-32: else:
// CHECK-32-NEXT: br label [[IFCONT]] // CHECK-32-NEXT: br label [[IFCONT]]
// CHECK-32: ifcont: // CHECK-32: ifcont:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]] // CHECK-32-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
// CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-32: then2: // CHECK-32: then2:
// CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 4
// CHECK-32-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* // CHECK-32-NEXT: [[TMP18:%.*]] = load volatile i32, ptr addrspace(3) [[TMP14]], align 4
// CHECK-32-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4 // CHECK-32-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4
// CHECK-32-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
// CHECK-32-NEXT: br label [[IFCONT4:%.*]] // CHECK-32-NEXT: br label [[IFCONT4:%.*]]
// CHECK-32: else3: // CHECK-32: else3:
// CHECK-32-NEXT: br label [[IFCONT4]] // CHECK-32-NEXT: br label [[IFCONT4]]
// CHECK-32: ifcont4: // CHECK-32: ifcont4:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]] // CHECK-32-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
// CHECK-32: then6: // CHECK-32: then6:
// CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4 // CHECK-32-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 4
// CHECK-32-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16* // CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-NEXT: [[TMP24:%.*]] = load i16, ptr [[TMP20]], align 2
// CHECK-32-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)* // CHECK-32-NEXT: store volatile i16 [[TMP24]], ptr addrspace(3) [[TMP22]], align 2
// CHECK-32-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
// CHECK-32-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
// CHECK-32-NEXT: br label [[IFCONT8:%.*]] // CHECK-32-NEXT: br label [[IFCONT8:%.*]]
// CHECK-32: else7: // CHECK-32: else7:
// CHECK-32-NEXT: br label [[IFCONT8]] // CHECK-32-NEXT: br label [[IFCONT8]]
// CHECK-32: ifcont8: // CHECK-32: ifcont8:
// CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]] // CHECK-32-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
// CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]] // CHECK-32-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
// CHECK-32: then10: // CHECK-32: then10:
// CHECK-32-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)* // CHECK-32-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP28]], align 4
// CHECK-32-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 4 // CHECK-32-NEXT: [[TMP31:%.*]] = load volatile i16, ptr addrspace(3) [[TMP26]], align 2
// CHECK-32-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16* // CHECK-32-NEXT: store i16 [[TMP31]], ptr [[TMP29]], align 2
// CHECK-32-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
// CHECK-32-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
// CHECK-32-NEXT: br label [[IFCONT12:%.*]] // CHECK-32-NEXT: br label [[IFCONT12:%.*]]
// CHECK-32: else11: // CHECK-32: else11:
// CHECK-32-NEXT: br label [[IFCONT12]] // CHECK-32-NEXT: br label [[IFCONT12]]
// CHECK-32: ifcont12: // CHECK-32: ifcont12:
// CHECK-32-NEXT: ret void // CHECK-32-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24
// CHECK-32-EX-SAME: (double* noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-32-EX-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[E_ADDR:%.*]] = alloca double*, align 4 // CHECK-32-EX-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 4
// CHECK-32-EX-NEXT: store double* [[E]], double** [[E_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP0:%.*]] = load double*, double** [[E_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1:[0-9]+]], i8 2, i1 false)
// CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
// CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-32-EX: user_code.entry: // CHECK-32-EX: user_code.entry:
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP0]] to i8* // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 1)
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, double*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined to i8*), i8* null, i8** [[TMP5]], i32 1)
// CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// CHECK-32-EX: worker.exit: // CHECK-32-EX: worker.exit:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined
// CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR1:[0-9]+]] { // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[E:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[E_ADDR:%.*]] = alloca double*, align 4 // CHECK-32-EX-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[E1:%.*]] = alloca double, align 8 // CHECK-32-EX-NEXT: [[E1:%.*]] = alloca double, align 8
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4
// CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: store double* [[E]], double** [[E_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP0:%.*]] = load double*, double** [[E_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[E_ADDR]], align 4
// CHECK-32-EX-NEXT: store double 0.000000e+00, double* [[E1]], align 8 // CHECK-32-EX-NEXT: store double 0.000000e+00, ptr [[E1]], align 8
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = load double, double* [[E1]], align 8 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load double, ptr [[E1]], align 8
// CHECK-32-EX-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], 5.000000e+00 // CHECK-32-EX-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], 5.000000e+00
// CHECK-32-EX-NEXT: store double [[ADD]], double* [[E1]], align 8 // CHECK-32-EX-NEXT: store double [[ADD]], ptr [[E1]], align 8
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = bitcast double* [[E1]] to i8* // CHECK-32-EX-NEXT: store ptr [[E1]], ptr [[TMP4]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func, ptr @_omp_reduction_inter_warp_copy_func)
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 4, i8* [[TMP6]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func)
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 1
// CHECK-32-EX-NEXT: br i1 [[TMP8]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP8]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-32-EX: .omp.reduction.then: // CHECK-32-EX: .omp.reduction.then:
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = load double, double* [[TMP0]], align 8 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load double, ptr [[TMP0]], align 8
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = load double, double* [[E1]], align 8 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load double, ptr [[E1]], align 8
// CHECK-32-EX-NEXT: [[ADD2:%.*]] = fadd double [[TMP9]], [[TMP10]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = fadd double [[TMP9]], [[TMP10]]
// CHECK-32-EX-NEXT: store double [[ADD2]], double* [[TMP0]], align 8 // CHECK-32-EX-NEXT: store double [[ADD2]], ptr [[TMP0]], align 8
// CHECK-32-EX-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP3]]) // CHECK-32-EX-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP3]])
// CHECK-32-EX-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-32-EX-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-32-EX: .omp.reduction.done: // CHECK-32-EX: .omp.reduction.done:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func // CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func
// CHECK-32-EX-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2:[0-9]+]] { // CHECK-32-EX-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2:[0-9]+]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x ptr], align 4
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca double, align 8 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca double, align 8
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to double** // CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = load double*, double** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr double, ptr [[TMP11]], i32 1
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP11]], align 8
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr double, double* [[TMP11]], i32 1
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = bitcast double* [[TMP13]] to i8*
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = bitcast double* [[TMP11]] to i64*
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 8
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-EX-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16
// CHECK-32-EX-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]]) // CHECK-32-EX-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]])
// CHECK-32-EX-NEXT: store i64 [[TMP20]], i64* [[TMP16]], align 8 // CHECK-32-EX-NEXT: store i64 [[TMP20]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 8
// CHECK-32-EX-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP15]], i32 1 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = getelementptr i64, ptr [[TMP11]], i32 1
// CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr i64, i64* [[TMP16]], i32 1 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr i64, ptr [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK-32-EX-NEXT: [[TMP23:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8* // CHECK-32-EX-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP12]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP23]], i8** [[TMP12]], align 4
// CHECK-32-EX-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-32-EX-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-EX-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-32-EX-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]] // CHECK-32-EX-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]]
// CHECK-32-EX-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-32-EX-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-32-EX-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1
// CHECK-32-EX-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0 // CHECK-32-EX-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0
// CHECK-32-EX-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]] // CHECK-32-EX-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]]
// CHECK-32-EX-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-32-EX-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-32-EX-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]] // CHECK-32-EX-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]]
// CHECK-32-EX-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]] // CHECK-32-EX-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]]
// CHECK-32-EX-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]] // CHECK-32-EX-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]]
// CHECK-32-EX-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32-EX: then: // CHECK-32-EX: then:
// CHECK-32-EX-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* // CHECK-32-EX-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3:[0-9]+]]
// CHECK-32-EX-NEXT: [[TMP37:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-32-EX-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l24_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP36]], i8* [[TMP37]]) #[[ATTR3:[0-9]+]]
// CHECK-32-EX-NEXT: br label [[IFCONT:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT:%.*]]
// CHECK-32-EX: else: // CHECK-32-EX: else:
// CHECK-32-EX-NEXT: br label [[IFCONT]] // CHECK-32-EX-NEXT: br label [[IFCONT]]
// CHECK-32-EX: ifcont: // CHECK-32-EX: ifcont:
// CHECK-32-EX-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-EX-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-32-EX-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] // CHECK-32-EX-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
// CHECK-32-EX-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
// CHECK-32-EX: then4: // CHECK-32-EX: then4:
// CHECK-32-EX-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to double** // CHECK-32-EX-NEXT: [[TMP43:%.*]] = load ptr, ptr [[TMP41]], align 4
// CHECK-32-EX-NEXT: [[TMP43:%.*]] = load double*, double** [[TMP42]], align 4 // CHECK-32-EX-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP46:%.*]] = load ptr, ptr [[TMP44]], align 4
// CHECK-32-EX-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to double** // CHECK-32-EX-NEXT: [[TMP47:%.*]] = load double, ptr [[TMP43]], align 8
// CHECK-32-EX-NEXT: [[TMP46:%.*]] = load double*, double** [[TMP45]], align 4 // CHECK-32-EX-NEXT: store double [[TMP47]], ptr [[TMP46]], align 8
// CHECK-32-EX-NEXT: [[TMP47:%.*]] = load double, double* [[TMP43]], align 8
// CHECK-32-EX-NEXT: store double [[TMP47]], double* [[TMP46]], align 8
// CHECK-32-EX-NEXT: br label [[IFCONT6:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT6:%.*]]
// CHECK-32-EX: else5: // CHECK-32-EX: else5:
// CHECK-32-EX-NEXT: br label [[IFCONT6]] // CHECK-32-EX-NEXT: br label [[IFCONT6]]
// CHECK-32-EX: ifcont6: // CHECK-32-EX: ifcont6:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func // CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func
// CHECK-32-EX-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-32-EX-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-32-EX-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-32-EX-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-32-EX-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [1 x i8*]* // CHECK-32-EX-NEXT: store i32 0, ptr [[DOTCNT_ADDR]], align 4
// CHECK-32-EX-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4
// CHECK-32-EX-NEXT: br label [[PRECOND:%.*]] // CHECK-32-EX-NEXT: br label [[PRECOND:%.*]]
// CHECK-32-EX: precond: // CHECK-32-EX: precond:
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCNT_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2
// CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]]
// CHECK-32-EX: body: // CHECK-32-EX: body:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-EX-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-EX-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32-EX: then: // CHECK-32-EX: then:
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 4
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* // CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP11]], i32 [[TMP8]]
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 [[TMP8]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP13]], align 4
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 4 // CHECK-32-EX-NEXT: store volatile i32 [[TMP15]], ptr addrspace(3) [[TMP14]], align 4
// CHECK-32-EX-NEXT: store volatile i32 [[TMP15]], i32 addrspace(3)* [[TMP14]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT:%.*]]
// CHECK-32-EX: else: // CHECK-32-EX: else:
// CHECK-32-EX-NEXT: br label [[IFCONT]] // CHECK-32-EX-NEXT: br label [[IFCONT]]
// CHECK-32-EX: ifcont: // CHECK-32-EX: ifcont:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]] // CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]]
// CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-32-EX: then2: // CHECK-32-EX: then2:
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 4
// CHECK-32-EX-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* // CHECK-32-EX-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr [[TMP19]], i32 [[TMP8]]
// CHECK-32-EX-NEXT: [[TMP21:%.*]] = getelementptr i32, i32* [[TMP20]], i32 [[TMP8]] // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load volatile i32, ptr addrspace(3) [[TMP17]], align 4
// CHECK-32-EX-NEXT: [[TMP22:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP17]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP22]], i32* [[TMP21]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT4:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT4:%.*]]
// CHECK-32-EX: else3: // CHECK-32-EX: else3:
// CHECK-32-EX-NEXT: br label [[IFCONT4]] // CHECK-32-EX-NEXT: br label [[IFCONT4]]
// CHECK-32-EX: ifcont4: // CHECK-32-EX: ifcont4:
// CHECK-32-EX-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK-32-EX-NEXT: store i32 [[TMP23]], i32* [[DOTCNT_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP23]], ptr [[DOTCNT_ADDR]], align 4
// CHECK-32-EX-NEXT: br label [[PRECOND]] // CHECK-32-EX-NEXT: br label [[PRECOND]]
// CHECK-32-EX: exit: // CHECK-32-EX: exit:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29
// CHECK-32-EX-SAME: (i8* noundef nonnull align 1 dereferenceable(1) [[C:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { // CHECK-32-EX-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[C_ADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[D_ADDR:%.*]] = alloca float*, align 4 // CHECK-32-EX-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-EX-NEXT: store i8* [[C]], i8** [[C_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
// CHECK-32-EX-NEXT: store float* [[D]], float** [[D_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i8*, i8** [[C_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = load float*, float** [[D_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 2, i1 false)
// CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1
// CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-32-EX: user_code.entry: // CHECK-32-EX: user_code.entry:
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[TMP4]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = bitcast float* [[TMP1]] to i8* // CHECK-32-EX-NEXT: store ptr [[TMP1]], ptr [[TMP5]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i8*, float*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined to i8*), i8* null, i8** [[TMP7]], i32 2)
// CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// CHECK-32-EX: worker.exit: // CHECK-32-EX: worker.exit:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined
// CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[C:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[C_ADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[D_ADDR:%.*]] = alloca float*, align 4 // CHECK-32-EX-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[C1:%.*]] = alloca i8, align 1 // CHECK-32-EX-NEXT: [[C1:%.*]] = alloca i8, align 1
// CHECK-32-EX-NEXT: [[D2:%.*]] = alloca float, align 4 // CHECK-32-EX-NEXT: [[D2:%.*]] = alloca float, align 4
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: store i8* [[C]], i8** [[C_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
// CHECK-32-EX-NEXT: store float* [[D]], float** [[D_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i8*, i8** [[C_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = load float*, float** [[D_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 4
// CHECK-32-EX-NEXT: store i8 0, i8* [[C1]], align 1 // CHECK-32-EX-NEXT: store i8 0, ptr [[C1]], align 1
// CHECK-32-EX-NEXT: store float 1.000000e+00, float* [[D2]], align 4 // CHECK-32-EX-NEXT: store float 1.000000e+00, ptr [[D2]], align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, i8* [[C1]], align 1 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[C1]], align 1
// CHECK-32-EX-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32 // CHECK-32-EX-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
// CHECK-32-EX-NEXT: [[XOR:%.*]] = xor i32 [[CONV]], 2 // CHECK-32-EX-NEXT: [[XOR:%.*]] = xor i32 [[CONV]], 2
// CHECK-32-EX-NEXT: [[CONV3:%.*]] = trunc i32 [[XOR]] to i8 // CHECK-32-EX-NEXT: [[CONV3:%.*]] = trunc i32 [[XOR]] to i8
// CHECK-32-EX-NEXT: store i8 [[CONV3]], i8* [[C1]], align 1 // CHECK-32-EX-NEXT: store i8 [[CONV3]], ptr [[C1]], align 1
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = load float, float* [[D2]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load float, ptr [[D2]], align 4
// CHECK-32-EX-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], 3.300000e+01 // CHECK-32-EX-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], 3.300000e+01
// CHECK-32-EX-NEXT: store float [[MUL]], float* [[D2]], align 4 // CHECK-32-EX-NEXT: store float [[MUL]], ptr [[D2]], align 4
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: store i8* [[C1]], i8** [[TMP6]], align 4 // CHECK-32-EX-NEXT: store ptr [[C1]], ptr [[TMP6]], align 4
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = bitcast float* [[D2]] to i8* // CHECK-32-EX-NEXT: store ptr [[D2]], ptr [[TMP7]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP5]], i32 2, i32 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func1, ptr @_omp_reduction_inter_warp_copy_func2)
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 2, i32 8, i8* [[TMP9]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func1, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func2)
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1
// CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-32-EX: .omp.reduction.then: // CHECK-32-EX: .omp.reduction.then:
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP0]], align 1 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP0]], align 1
// CHECK-32-EX-NEXT: [[CONV4:%.*]] = sext i8 [[TMP12]] to i32 // CHECK-32-EX-NEXT: [[CONV4:%.*]] = sext i8 [[TMP12]] to i32
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i8, i8* [[C1]], align 1 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i8, ptr [[C1]], align 1
// CHECK-32-EX-NEXT: [[CONV5:%.*]] = sext i8 [[TMP13]] to i32 // CHECK-32-EX-NEXT: [[CONV5:%.*]] = sext i8 [[TMP13]] to i32
// CHECK-32-EX-NEXT: [[XOR6:%.*]] = xor i32 [[CONV4]], [[CONV5]] // CHECK-32-EX-NEXT: [[XOR6:%.*]] = xor i32 [[CONV4]], [[CONV5]]
// CHECK-32-EX-NEXT: [[CONV7:%.*]] = trunc i32 [[XOR6]] to i8 // CHECK-32-EX-NEXT: [[CONV7:%.*]] = trunc i32 [[XOR6]] to i8
// CHECK-32-EX-NEXT: store i8 [[CONV7]], i8* [[TMP0]], align 1 // CHECK-32-EX-NEXT: store i8 [[CONV7]], ptr [[TMP0]], align 1
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = load float, float* [[TMP1]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load float, ptr [[TMP1]], align 4
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = load float, float* [[D2]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load float, ptr [[D2]], align 4
// CHECK-32-EX-NEXT: [[MUL8:%.*]] = fmul float [[TMP14]], [[TMP15]] // CHECK-32-EX-NEXT: [[MUL8:%.*]] = fmul float [[TMP14]], [[TMP15]]
// CHECK-32-EX-NEXT: store float [[MUL8]], float* [[TMP1]], align 4 // CHECK-32-EX-NEXT: store float [[MUL8]], ptr [[TMP1]], align 4
// CHECK-32-EX-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP5]]) // CHECK-32-EX-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP5]])
// CHECK-32-EX-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-32-EX-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-32-EX: .omp.reduction.done: // CHECK-32-EX: .omp.reduction.done:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func1 // CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func1
// CHECK-32-EX-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] { // CHECK-32-EX-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i8, align 1 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i8, align 1
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca float, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca float, align 4
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP10]], i32 1
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i8, ptr [[TMP10]], align 1
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP10]], align 1
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-EX-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]]) // CHECK-32-EX-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]])
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
// CHECK-32-EX-NEXT: store i8 [[TMP18]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1 // CHECK-32-EX-NEXT: store i8 [[TMP18]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 1
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP10]], i32 1
// CHECK-32-EX-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i32 1 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK-32-EX-NEXT: store i8* [[DOTOMP_REDUCTION_ELEMENT]], i8** [[TMP11]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP11]], align 4
// CHECK-32-EX-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to float** // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP21]], align 4
// CHECK-32-EX-NEXT: [[TMP23:%.*]] = load float*, float** [[TMP22]], align 4 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP25:%.*]] = getelementptr float, ptr [[TMP23]], i32 1
// CHECK-32-EX-NEXT: [[TMP25:%.*]] = getelementptr float, float* [[TMP23]], i32 1 // CHECK-32-EX-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 4
// CHECK-32-EX-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to i8*
// CHECK-32-EX-NEXT: [[TMP27:%.*]] = bitcast float* [[TMP23]] to i32*
// CHECK-32-EX-NEXT: [[TMP28:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
// CHECK-32-EX-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
// CHECK-32-EX-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-EX-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-EX-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16 // CHECK-32-EX-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
// CHECK-32-EX-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]]) // CHECK-32-EX-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
// CHECK-32-EX-NEXT: store i32 [[TMP32]], i32* [[TMP28]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_REDUCTION_ELEMENT4]], align 4
// CHECK-32-EX-NEXT: [[TMP33:%.*]] = getelementptr i32, i32* [[TMP27]], i32 1 // CHECK-32-EX-NEXT: [[TMP33:%.*]] = getelementptr i32, ptr [[TMP23]], i32 1
// CHECK-32-EX-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1 // CHECK-32-EX-NEXT: [[TMP34:%.*]] = getelementptr i32, ptr [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
// CHECK-32-EX-NEXT: [[TMP35:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8* // CHECK-32-EX-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT4]], ptr [[TMP24]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP35]], i8** [[TMP24]], align 4
// CHECK-32-EX-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-32-EX-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-32-EX-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-EX-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-32-EX-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] // CHECK-32-EX-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
// CHECK-32-EX-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-32-EX-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-32-EX-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1
// CHECK-32-EX-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0 // CHECK-32-EX-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0
// CHECK-32-EX-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]] // CHECK-32-EX-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]]
// CHECK-32-EX-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-32-EX-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-32-EX-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]] // CHECK-32-EX-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]]
// CHECK-32-EX-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]] // CHECK-32-EX-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]]
// CHECK-32-EX-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]] // CHECK-32-EX-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]]
// CHECK-32-EX-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32-EX: then: // CHECK-32-EX: then:
// CHECK-32-EX-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8* // CHECK-32-EX-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3]]
// CHECK-32-EX-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-32-EX-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l29_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP48]], i8* [[TMP49]]) #[[ATTR3]]
// CHECK-32-EX-NEXT: br label [[IFCONT:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT:%.*]]
// CHECK-32-EX: else: // CHECK-32-EX: else:
// CHECK-32-EX-NEXT: br label [[IFCONT]] // CHECK-32-EX-NEXT: br label [[IFCONT]]
// CHECK-32-EX: ifcont: // CHECK-32-EX: ifcont:
// CHECK-32-EX-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-EX-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-32-EX-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]] // CHECK-32-EX-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]]
// CHECK-32-EX-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
// CHECK-32-EX: then5: // CHECK-32-EX: then5:
// CHECK-32-EX-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP54:%.*]] = load i8*, i8** [[TMP53]], align 4 // CHECK-32-EX-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP53]], align 4
// CHECK-32-EX-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP56:%.*]] = load i8*, i8** [[TMP55]], align 4 // CHECK-32-EX-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP55]], align 4
// CHECK-32-EX-NEXT: [[TMP57:%.*]] = load i8, i8* [[TMP54]], align 1 // CHECK-32-EX-NEXT: [[TMP57:%.*]] = load i8, ptr [[TMP54]], align 1
// CHECK-32-EX-NEXT: store i8 [[TMP57]], i8* [[TMP56]], align 1 // CHECK-32-EX-NEXT: store i8 [[TMP57]], ptr [[TMP56]], align 1
// CHECK-32-EX-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to float** // CHECK-32-EX-NEXT: [[TMP60:%.*]] = load ptr, ptr [[TMP58]], align 4
// CHECK-32-EX-NEXT: [[TMP60:%.*]] = load float*, float** [[TMP59]], align 4 // CHECK-32-EX-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP63:%.*]] = load ptr, ptr [[TMP61]], align 4
// CHECK-32-EX-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to float** // CHECK-32-EX-NEXT: [[TMP64:%.*]] = load float, ptr [[TMP60]], align 4
// CHECK-32-EX-NEXT: [[TMP63:%.*]] = load float*, float** [[TMP62]], align 4 // CHECK-32-EX-NEXT: store float [[TMP64]], ptr [[TMP63]], align 4
// CHECK-32-EX-NEXT: [[TMP64:%.*]] = load float, float* [[TMP60]], align 4
// CHECK-32-EX-NEXT: store float [[TMP64]], float* [[TMP63]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT7:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT7:%.*]]
// CHECK-32-EX: else6: // CHECK-32-EX: else6:
// CHECK-32-EX-NEXT: br label [[IFCONT7]] // CHECK-32-EX-NEXT: br label [[IFCONT7]]
// CHECK-32-EX: ifcont7: // CHECK-32-EX: ifcont7:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func2 // CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func2
// CHECK-32-EX-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-32-EX-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-32-EX-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-32-EX-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]* // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-EX-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-EX-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32-EX: then: // CHECK-32-EX: then:
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 4
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = bitcast i32 addrspace(3)* [[TMP10]] to i8 addrspace(3)* // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP9]], align 1
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP9]], align 1 // CHECK-32-EX-NEXT: store volatile i8 [[TMP12]], ptr addrspace(3) [[TMP10]], align 1
// CHECK-32-EX-NEXT: store volatile i8 [[TMP12]], i8 addrspace(3)* [[TMP11]], align 1
// CHECK-32-EX-NEXT: br label [[IFCONT:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT:%.*]]
// CHECK-32-EX: else: // CHECK-32-EX: else:
// CHECK-32-EX-NEXT: br label [[IFCONT]] // CHECK-32-EX-NEXT: br label [[IFCONT]]
// CHECK-32-EX: ifcont: // CHECK-32-EX: ifcont:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]] // CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
// CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-32-EX: then2: // CHECK-32-EX: then2:
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = bitcast i32 addrspace(3)* [[TMP14]] to i8 addrspace(3)* // CHECK-32-EX-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 4
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load volatile i8, ptr addrspace(3) [[TMP14]], align 1
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP15]], align 1 // CHECK-32-EX-NEXT: store i8 [[TMP18]], ptr [[TMP17]], align 1
// CHECK-32-EX-NEXT: store i8 [[TMP18]], i8* [[TMP17]], align 1
// CHECK-32-EX-NEXT: br label [[IFCONT4:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT4:%.*]]
// CHECK-32-EX: else3: // CHECK-32-EX: else3:
// CHECK-32-EX-NEXT: br label [[IFCONT4]] // CHECK-32-EX-NEXT: br label [[IFCONT4]]
// CHECK-32-EX: ifcont4: // CHECK-32-EX: ifcont4:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-EX-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-EX-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]] // CHECK-32-EX-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
// CHECK-32-EX: then6: // CHECK-32-EX: then6:
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 4
// CHECK-32-EX-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i32* // CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP20]], align 4
// CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP21]], align 4 // CHECK-32-EX-NEXT: store volatile i32 [[TMP23]], ptr addrspace(3) [[TMP22]], align 4
// CHECK-32-EX-NEXT: store volatile i32 [[TMP23]], i32 addrspace(3)* [[TMP22]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT8:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT8:%.*]]
// CHECK-32-EX: else7: // CHECK-32-EX: else7:
// CHECK-32-EX-NEXT: br label [[IFCONT8]] // CHECK-32-EX-NEXT: br label [[IFCONT8]]
// CHECK-32-EX: ifcont8: // CHECK-32-EX: ifcont8:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]] // CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]]
// CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]] // CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
// CHECK-32-EX: then10: // CHECK-32-EX: then10:
// CHECK-32-EX-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-EX-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-EX-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 4 // CHECK-32-EX-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 4
// CHECK-32-EX-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to i32* // CHECK-32-EX-NEXT: [[TMP29:%.*]] = load volatile i32, ptr addrspace(3) [[TMP25]], align 4
// CHECK-32-EX-NEXT: [[TMP29:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP25]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP29]], ptr [[TMP27]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP29]], i32* [[TMP28]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT12:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT12:%.*]]
// CHECK-32-EX: else11: // CHECK-32-EX: else11:
// CHECK-32-EX-NEXT: br label [[IFCONT12]] // CHECK-32-EX-NEXT: br label [[IFCONT12]]
// CHECK-32-EX: ifcont12: // CHECK-32-EX: ifcont12:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35 // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35
// CHECK-32-EX-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR0]] { // CHECK-32-EX-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR0]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[B_ADDR:%.*]] = alloca i16*, align 4 // CHECK-32-EX-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-EX-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
// CHECK-32-EX-NEXT: store i16* [[B]], i16** [[B_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i16*, i16** [[B_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 2, i1 false)
// CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1 // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP2]], -1
// CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
// CHECK-32-EX: user_code.entry: // CHECK-32-EX: user_code.entry:
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = bitcast i32* [[TMP0]] to i8* // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: store ptr [[TMP1]], ptr [[TMP6]], align 4
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = bitcast i16* [[TMP1]] to i8* // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 2)
// CHECK-32-EX-NEXT: store i8* [[TMP7]], i8** [[TMP6]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i16*)* @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined to i8*), i8* null, i8** [[TMP8]], i32 2)
// CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2)
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// CHECK-32-EX: worker.exit: // CHECK-32-EX: worker.exit:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined
// CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR1]] { // CHECK-32-EX-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[B:%.*]]) #[[ATTR1]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[B_ADDR:%.*]] = alloca i16*, align 4 // CHECK-32-EX-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[A1:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[A1:%.*]] = alloca i32, align 4
// CHECK-32-EX-NEXT: [[B2:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[B2:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
// CHECK-32-EX-NEXT: store i16* [[B]], i16** [[B_ADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i16*, i16** [[B_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
// CHECK-32-EX-NEXT: store i32 0, i32* [[A1]], align 4 // CHECK-32-EX-NEXT: store i32 0, ptr [[A1]], align 4
// CHECK-32-EX-NEXT: store i16 -32768, i16* [[B2]], align 2 // CHECK-32-EX-NEXT: store i16 -32768, ptr [[B2]], align 2
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, ptr [[A1]], align 4
// CHECK-32-EX-NEXT: [[OR:%.*]] = or i32 [[TMP2]], 1 // CHECK-32-EX-NEXT: [[OR:%.*]] = or i32 [[TMP2]], 1
// CHECK-32-EX-NEXT: store i32 [[OR]], i32* [[A1]], align 4 // CHECK-32-EX-NEXT: store i32 [[OR]], ptr [[A1]], align 4
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-EX-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 // CHECK-32-EX-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
// CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 99, [[CONV]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 99, [[CONV]]
// CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
// CHECK-32-EX: cond.true: // CHECK-32-EX: cond.true:
// CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX-NEXT: br label [[COND_END:%.*]]
// CHECK-32-EX: cond.false: // CHECK-32-EX: cond.false:
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-EX-NEXT: [[CONV3:%.*]] = sext i16 [[TMP4]] to i32 // CHECK-32-EX-NEXT: [[CONV3:%.*]] = sext i16 [[TMP4]] to i32
// CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX-NEXT: br label [[COND_END]]
// CHECK-32-EX: cond.end: // CHECK-32-EX: cond.end:
// CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
// CHECK-32-EX-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16 // CHECK-32-EX-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
// CHECK-32-EX-NEXT: store i16 [[CONV4]], i16* [[B2]], align 2 // CHECK-32-EX-NEXT: store i16 [[CONV4]], ptr [[B2]], align 2
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = bitcast i32* [[A1]] to i8* // CHECK-32-EX-NEXT: store ptr [[A1]], ptr [[TMP7]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1 // CHECK-32-EX-NEXT: store ptr [[B2]], ptr [[TMP9]], align 4
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = bitcast i16* [[B2]] to i8* // CHECK-32-EX-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(ptr @[[GLOB1]], i32 [[TMP6]], i32 2, i32 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_omp_reduction_shuffle_and_reduce_func3, ptr @_omp_reduction_inter_warp_copy_func4)
// CHECK-32-EX-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 2, i32 8, i8* [[TMP11]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func3, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func4)
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 1 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 1
// CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]]
// CHECK-32-EX: .omp.reduction.then: // CHECK-32-EX: .omp.reduction.then:
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[A1]], align 4
// CHECK-32-EX-NEXT: [[OR5:%.*]] = or i32 [[TMP14]], [[TMP15]] // CHECK-32-EX-NEXT: [[OR5:%.*]] = or i32 [[TMP14]], [[TMP15]]
// CHECK-32-EX-NEXT: store i32 [[OR5]], i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: store i32 [[OR5]], ptr [[TMP0]], align 4
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP1]], align 2 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK-32-EX-NEXT: [[CONV6:%.*]] = sext i16 [[TMP16]] to i32 // CHECK-32-EX-NEXT: [[CONV6:%.*]] = sext i16 [[TMP16]] to i32
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-EX-NEXT: [[CONV7:%.*]] = sext i16 [[TMP17]] to i32 // CHECK-32-EX-NEXT: [[CONV7:%.*]] = sext i16 [[TMP17]] to i32
// CHECK-32-EX-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[CONV6]], [[CONV7]] // CHECK-32-EX-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[CONV6]], [[CONV7]]
// CHECK-32-EX-NEXT: br i1 [[CMP8]], label [[COND_TRUE9:%.*]], label [[COND_FALSE10:%.*]] // CHECK-32-EX-NEXT: br i1 [[CMP8]], label [[COND_TRUE9:%.*]], label [[COND_FALSE10:%.*]]
// CHECK-32-EX: cond.true9: // CHECK-32-EX: cond.true9:
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i16, i16* [[TMP1]], align 2 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i16, ptr [[TMP1]], align 2
// CHECK-32-EX-NEXT: br label [[COND_END11:%.*]] // CHECK-32-EX-NEXT: br label [[COND_END11:%.*]]
// CHECK-32-EX: cond.false10: // CHECK-32-EX: cond.false10:
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i16, i16* [[B2]], align 2 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i16, ptr [[B2]], align 2
// CHECK-32-EX-NEXT: br label [[COND_END11]] // CHECK-32-EX-NEXT: br label [[COND_END11]]
// CHECK-32-EX: cond.end11: // CHECK-32-EX: cond.end11:
// CHECK-32-EX-NEXT: [[COND12:%.*]] = phi i16 [ [[TMP18]], [[COND_TRUE9]] ], [ [[TMP19]], [[COND_FALSE10]] ] // CHECK-32-EX-NEXT: [[COND12:%.*]] = phi i16 [ [[TMP18]], [[COND_TRUE9]] ], [ [[TMP19]], [[COND_FALSE10]] ]
// CHECK-32-EX-NEXT: store i16 [[COND12]], i16* [[TMP1]], align 2 // CHECK-32-EX-NEXT: store i16 [[COND12]], ptr [[TMP1]], align 2
// CHECK-32-EX-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP6]]) // CHECK-32-EX-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP6]])
// CHECK-32-EX-NEXT: br label [[DOTOMP_REDUCTION_DONE]] // CHECK-32-EX-NEXT: br label [[DOTOMP_REDUCTION_DONE]]
// CHECK-32-EX: .omp.reduction.done: // CHECK-32-EX: .omp.reduction.done:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func3 // CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func3
// CHECK-32-EX-SAME: (i8* noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] { // CHECK-32-EX-SAME: (ptr noundef [[TMP0:%.*]], i16 noundef signext [[TMP1:%.*]], i16 noundef signext [[TMP2:%.*]], i16 noundef signext [[TMP3:%.*]]) #[[ATTR2]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [2 x ptr], align 4
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca i32, align 4
// CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTOMP_REDUCTION_ELEMENT4:%.*]] = alloca i16, align 2
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP1]], ptr [[DOTADDR1]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP2]], ptr [[DOTADDR2]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP3]], ptr [[DOTADDR3]], align 2
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i16, ptr [[DOTADDR1]], align 2
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i16, ptr [[DOTADDR2]], align 2
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i16, ptr [[DOTADDR3]], align 2
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32** // CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32*, i32** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP11]], i32 1
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP11]], align 4
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP11]], i32 1
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP11]], align 4
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-EX-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]]) // CHECK-32-EX-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
// CHECK-32-EX-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_REDUCTION_ELEMENT]], align 4
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP11]], i32 1 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr i32, ptr [[TMP11]], i32 1
// CHECK-32-EX-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK-32-EX-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8* // CHECK-32-EX-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT]], ptr [[TMP12]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP21]], i8** [[TMP12]], align 4 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP22]], align 4
// CHECK-32-EX-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i16** // CHECK-32-EX-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i16*, i16** [[TMP23]], align 4 // CHECK-32-EX-NEXT: [[TMP26:%.*]] = getelementptr i16, ptr [[TMP24]], i32 1
// CHECK-32-EX-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP28:%.*]] = load i16, ptr [[TMP24]], align 2
// CHECK-32-EX-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
// CHECK-32-EX-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
// CHECK-32-EX-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP24]], align 2
// CHECK-32-EX-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32 // CHECK-32-EX-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
// CHECK-32-EX-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size() // CHECK-32-EX-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
// CHECK-32-EX-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16 // CHECK-32-EX-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
// CHECK-32-EX-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]]) // CHECK-32-EX-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
// CHECK-32-EX-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16 // CHECK-32-EX-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
// CHECK-32-EX-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2 // CHECK-32-EX-NEXT: store i16 [[TMP33]], ptr [[DOTOMP_REDUCTION_ELEMENT4]], align 2
// CHECK-32-EX-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1 // CHECK-32-EX-NEXT: [[TMP34:%.*]] = getelementptr i16, ptr [[TMP24]], i32 1
// CHECK-32-EX-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1 // CHECK-32-EX-NEXT: [[TMP35:%.*]] = getelementptr i16, ptr [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
// CHECK-32-EX-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8* // CHECK-32-EX-NEXT: store ptr [[DOTOMP_REDUCTION_ELEMENT4]], ptr [[TMP25]], align 4
// CHECK-32-EX-NEXT: store i8* [[TMP36]], i8** [[TMP25]], align 4
// CHECK-32-EX-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0 // CHECK-32-EX-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
// CHECK-32-EX-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-EX-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
// CHECK-32-EX-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] // CHECK-32-EX-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
// CHECK-32-EX-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2 // CHECK-32-EX-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
// CHECK-32-EX-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
// CHECK-32-EX-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0 // CHECK-32-EX-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
// CHECK-32-EX-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]] // CHECK-32-EX-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
// CHECK-32-EX-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0 // CHECK-32-EX-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
// CHECK-32-EX-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]] // CHECK-32-EX-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
// CHECK-32-EX-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]] // CHECK-32-EX-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
// CHECK-32-EX-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]] // CHECK-32-EX-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
// CHECK-32-EX-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32-EX: then: // CHECK-32-EX: then:
// CHECK-32-EX-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8* // CHECK-32-EX-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined_omp$reduction$reduction_func"(ptr [[TMP4]], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]]) #[[ATTR3]]
// CHECK-32-EX-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
// CHECK-32-EX-NEXT: call void @"{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l35_omp_outlined_omp$reduction$reduction_func"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
// CHECK-32-EX-NEXT: br label [[IFCONT:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT:%.*]]
// CHECK-32-EX: else: // CHECK-32-EX: else:
// CHECK-32-EX-NEXT: br label [[IFCONT]] // CHECK-32-EX-NEXT: br label [[IFCONT]]
// CHECK-32-EX: ifcont: // CHECK-32-EX: ifcont:
// CHECK-32-EX-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
// CHECK-32-EX-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
// CHECK-32-EX-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]] // CHECK-32-EX-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
// CHECK-32-EX-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]] // CHECK-32-EX-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
// CHECK-32-EX: then5: // CHECK-32-EX: then5:
// CHECK-32-EX-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32** // CHECK-32-EX-NEXT: [[TMP56:%.*]] = load ptr, ptr [[TMP54]], align 4
// CHECK-32-EX-NEXT: [[TMP56:%.*]] = load i32*, i32** [[TMP55]], align 4 // CHECK-32-EX-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP59:%.*]] = load ptr, ptr [[TMP57]], align 4
// CHECK-32-EX-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32** // CHECK-32-EX-NEXT: [[TMP60:%.*]] = load i32, ptr [[TMP56]], align 4
// CHECK-32-EX-NEXT: [[TMP59:%.*]] = load i32*, i32** [[TMP58]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP60]], ptr [[TMP59]], align 4
// CHECK-32-EX-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP56]], align 4 // CHECK-32-EX-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
// CHECK-32-EX-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4 // CHECK-32-EX-NEXT: [[TMP63:%.*]] = load ptr, ptr [[TMP61]], align 4
// CHECK-32-EX-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP64:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP4]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i16** // CHECK-32-EX-NEXT: [[TMP66:%.*]] = load ptr, ptr [[TMP64]], align 4
// CHECK-32-EX-NEXT: [[TMP63:%.*]] = load i16*, i16** [[TMP62]], align 4 // CHECK-32-EX-NEXT: [[TMP67:%.*]] = load i16, ptr [[TMP63]], align 2
// CHECK-32-EX-NEXT: [[TMP64:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 // CHECK-32-EX-NEXT: store i16 [[TMP67]], ptr [[TMP66]], align 2
// CHECK-32-EX-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to i16**
// CHECK-32-EX-NEXT: [[TMP66:%.*]] = load i16*, i16** [[TMP65]], align 4
// CHECK-32-EX-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP63]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
// CHECK-32-EX-NEXT: br label [[IFCONT7:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT7:%.*]]
// CHECK-32-EX: else6: // CHECK-32-EX: else6:
// CHECK-32-EX-NEXT: br label [[IFCONT7]] // CHECK-32-EX-NEXT: br label [[IFCONT7]]
// CHECK-32-EX: ifcont7: // CHECK-32-EX: ifcont7:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //
// //
// CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func4 // CHECK-32-EX-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func4
// CHECK-32-EX-SAME: (i8* noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] { // CHECK-32-EX-SAME: (ptr noundef [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR2]] {
// CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: entry:
// CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4
// CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31 // CHECK-32-EX-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block() // CHECK-32-EX-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
// CHECK-32-EX-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5 // CHECK-32-EX-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
// CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 4
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]* // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-EX-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-EX-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] // CHECK-32-EX-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK-32-EX: then: // CHECK-32-EX: then:
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 4
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP9]], align 4
// CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 // CHECK-32-EX-NEXT: store volatile i32 [[TMP12]], ptr addrspace(3) [[TMP11]], align 4
// CHECK-32-EX-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT:%.*]]
// CHECK-32-EX: else: // CHECK-32-EX: else:
// CHECK-32-EX-NEXT: br label [[IFCONT]] // CHECK-32-EX-NEXT: br label [[IFCONT]]
// CHECK-32-EX: ifcont: // CHECK-32-EX: ifcont:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]] // CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
// CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]] // CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
// CHECK-32-EX: then2: // CHECK-32-EX: then2:
// CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-EX-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 0
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 4
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load volatile i32, ptr addrspace(3) [[TMP14]], align 4
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
// CHECK-32-EX-NEXT: br label [[IFCONT4:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT4:%.*]]
// CHECK-32-EX: else3: // CHECK-32-EX: else3:
// CHECK-32-EX-NEXT: br label [[IFCONT4]] // CHECK-32-EX-NEXT: br label [[IFCONT4]]
// CHECK-32-EX: ifcont4: // CHECK-32-EX: ifcont4:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 // CHECK-32-EX-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK-32-EX-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]] // CHECK-32-EX-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
// CHECK-32-EX: then6: // CHECK-32-EX: then6:
// CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 4
// CHECK-32-EX-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16* // CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
// CHECK-32-EX-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i16, ptr [[TMP20]], align 2
// CHECK-32-EX-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)* // CHECK-32-EX-NEXT: store volatile i16 [[TMP24]], ptr addrspace(3) [[TMP22]], align 2
// CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
// CHECK-32-EX-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
// CHECK-32-EX-NEXT: br label [[IFCONT8:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT8:%.*]]
// CHECK-32-EX: else7: // CHECK-32-EX: else7:
// CHECK-32-EX-NEXT: br label [[IFCONT8]] // CHECK-32-EX-NEXT: br label [[IFCONT8]]
// CHECK-32-EX: ifcont8: // CHECK-32-EX: ifcont8:
// CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
// CHECK-32-EX-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTADDR1]], align 4
// CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]] // CHECK-32-EX-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
// CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]] // CHECK-32-EX-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
// CHECK-32-EX: then10: // CHECK-32-EX: then10:
// CHECK-32-EX-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]] // CHECK-32-EX-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], ptr addrspace(3) @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
// CHECK-32-EX-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)* // CHECK-32-EX-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP6]], i32 0, i32 1
// CHECK-32-EX-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP28]], align 4
// CHECK-32-EX-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 4 // CHECK-32-EX-NEXT: [[TMP31:%.*]] = load volatile i16, ptr addrspace(3) [[TMP26]], align 2
// CHECK-32-EX-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16* // CHECK-32-EX-NEXT: store i16 [[TMP31]], ptr [[TMP29]], align 2
// CHECK-32-EX-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
// CHECK-32-EX-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
// CHECK-32-EX-NEXT: br label [[IFCONT12:%.*]] // CHECK-32-EX-NEXT: br label [[IFCONT12:%.*]]
// CHECK-32-EX: else11: // CHECK-32-EX: else11:
// CHECK-32-EX-NEXT: br label [[IFCONT12]] // CHECK-32-EX-NEXT: br label [[IFCONT12]]
// CHECK-32-EX: ifcont12: // CHECK-32-EX: ifcont12:
// CHECK-32-EX-NEXT: ret void // CHECK-32-EX-NEXT: ret void
// //

clang/test/OpenMP/nvptx_unsupported_type_codegen.cpp

// Test target codegen - host bc file has to be created first. // Test target codegen - host bc file has to be created first.
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple x86_64-unknown-linux -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-host.bc // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -aux-triple x86_64-unknown-linux -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fvisibility=protected -fopenmp-host-ir-file-path %t-host.bc -o - | FileCheck %s // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -aux-triple x86_64-unknown-linux -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fvisibility=protected -fopenmp-host-ir-file-path %t-host.bc -o - | FileCheck %s
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-linux-gnu -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-host.bc // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-linux-gnu -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -aux-triple powerpc64le-unknown-linux-gnu -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fvisibility=protected -fopenmp-host-ir-file-path %t-host.bc -o - | FileCheck %s // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -aux-triple powerpc64le-unknown-linux-gnu -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fvisibility=protected -fopenmp-host-ir-file-path %t-host.bc -o - | FileCheck %s
// expected-no-diagnostics // expected-no-diagnostics
// CHECK-DAG: [[T:%.+]] = type {{.+}}, {{fp128|ppc_fp128}}, // CHECK-DAG: [[T:%.+]] = type {{.+}}, {{fp128|ppc_fp128}},
// CHECK-DAG: [[T1:%.+]] = type {{.+}}, i128, i128, // CHECK-DAG: [[T1:%.+]] = type {{.+}}, i128, i128,
#ifndef _ARCH_PPC #ifndef _ARCH_PPC
typedef __float128 BIGTYPE; typedef __float128 BIGTYPE;
#else #else
Show All 15 Linesstruct T1 {
char c; char c;
T1() : a(12), f(15) {} T1() : a(12), f(15) {}
T1 &operator+(T1 &b) { f += b.a; return *this;} T1 &operator+(T1 &b) { f += b.a; return *this;}
}; };
#pragma omp declare target #pragma omp declare target
T a = T(); T a = T();
T f = a; T f = a;
// CHECK: define{{ hidden | }}void @{{.+}}foo{{.+}}([[T]]* noundef byval([[T]]) align {{.+}}) // CHECK: define{{ hidden | }}void @{{.+}}foo{{.+}}(ptr noundef byval([[T]]) align {{.+}})
void foo(T a = T()) { void foo(T a = T()) {
return; return;
} }
// CHECK: define{{ hidden | }}[6 x i64] @{{.+}}bar{{.+}}() // CHECK: define{{ hidden | }}[6 x i64] @{{.+}}bar{{.+}}()
T bar() { T bar() {
// CHECK: bitcast [[T]]* %{{.+}} to [6 x i64]* // CHECK: [[RETVAL:%.+]] = alloca [[T]]
// CHECK-NEXT: load [6 x i64], [6 x i64]* %{{.+}}, // CHECK: load [6 x i64], ptr [[RETVAL]]
// CHECK-NEXT: ret [6 x i64] // CHECK-NEXT: ret [6 x i64]
return T(); return T();
} }
// CHECK: define{{ hidden | }}void @{{.+}}baz{{.+}}() // CHECK: define{{ hidden | }}void @{{.+}}baz{{.+}}()
void baz() { void baz() {
// CHECK: call [6 x i64] @{{.+}}bar{{.+}}() // CHECK: call [6 x i64] @{{.+}}bar{{.+}}()
// CHECK-NEXT: bitcast [[T]]* %{{.+}} to [6 x i64]* // CHECK-NEXT: store [6 x i64] %{{.+}}, ptr %{{.+}},
// CHECK-NEXT: store [6 x i64] %{{.+}}, [6 x i64]* %{{.+}},
T t = bar(); T t = bar();
} }
T1 a1 = T1(); T1 a1 = T1();
T1 f1 = a1; T1 f1 = a1;
// CHECK: define{{ hidden | }}void @{{.+}}foo1{{.+}}([[T1]]* noundef byval([[T1]]) align {{.+}}) // CHECK: define{{ hidden | }}void @{{.+}}foo1{{.+}}(ptr noundef byval([[T1]]) align {{.+}})
void foo1(T1 a = T1()) { void foo1(T1 a = T1()) {
return; return;
} }
// CHECK: define{{ hidden | }}[[T1]] @{{.+}}bar1{{.+}}() // CHECK: define{{ hidden | }}[[T1]] @{{.+}}bar1{{.+}}()
T1 bar1() { T1 bar1() {
// CHECK: load [[T1]], [[T1]]* // CHECK: load [[T1]], ptr
// CHECK-NEXT: ret [[T1]] // CHECK-NEXT: ret [[T1]]
return T1(); return T1();
} }
// CHECK: define{{ hidden | }}void @{{.+}}baz1{{.+}}() // CHECK: define{{ hidden | }}void @{{.+}}baz1{{.+}}()
void baz1() { void baz1() {
// CHECK: call [[T1]] @{{.+}}bar1{{.+}}() // CHECK: call [[T1]] @{{.+}}bar1{{.+}}()
T1 t = bar1(); T1 t = bar1();
} }
#pragma omp end declare target #pragma omp end declare target