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Differential D150101

[ValueTracking] Add tests for knownbits of saturating add/sub functions; NFC
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Authored by goldstein.w.n on May 7 2023, 11:59 PM.

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foad
nikic
RKSimon
Commits
rG1e963b40813e: [ValueTracking] Add tests for knownbits of saturating add/sub functions; NFC

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goldstein.w.n created this revision.May 7 2023, 11:59 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 7 2023, 11:59 PM
Herald added a subscriber: StephenFan. · View Herald Transcript
goldstein.w.n requested review of this revision.May 7 2023, 11:59 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 7 2023, 11:59 PM
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goldstein.w.n added a child revision: D150102: [KnownBits] Add implementations for saturating add/sub functions.May 7 2023, 11:59 PM
goldstein.w.n added a parent revision: D150100: [KnownBits] Improve implementation of `KnownBits::abs`.
Harbormaster completed remote builds in B230566: Diff 520276.May 8 2023, 12:01 AM
goldstein.w.n updated this revision to Diff 520570.May 8 2023, 8:01 PM

Rebase

Harbormaster completed remote builds in B230777: Diff 520570.May 8 2023, 9:35 PM
RKSimon accepted this revision.May 13 2023, 4:24 AM

LGTM - I'm still unsure whether they give us anything over what the exhaustive tests provide

This revision is now accepted and ready to land.May 13 2023, 4:24 AM
goldstein.w.n added a comment.May 13 2023, 10:52 AM
In D150101#4339922, @RKSimon wrote:

LGTM - I'm still unsure whether they give us anything over what the exhaustive tests provide

To test that they have as expected in valuetracking (I.e exhausting will pass for all bits unknown in all cases, but for our purposes thats a bug).

goldstein.w.n updated this revision to Diff 521930.May 13 2023, 10:55 AM

Rebase

Harbormaster completed remote builds in B231809: Diff 521930.May 13 2023, 1:01 PM
goldstein.w.n updated this revision to Diff 522366.May 15 2023, 3:30 PM

Rebase

Harbormaster completed remote builds in B232142: Diff 522366.May 15 2023, 6:12 PM
This revision was landed with ongoing or failed builds.May 23 2023, 11:57 AM
Closed by commit rG1e963b40813e: [ValueTracking] Add tests for knownbits of saturating add/sub functions; NFC (authored by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG1e963b40813e: [ValueTracking] Add tests for knownbits of saturating add/sub functions; NFC.

Revision Contents

PathSize
llvm/
test/
Analysis/
ValueTracking/
219 lines

Diff 524827

llvm/test/Analysis/ValueTracking/knownbits-sat-addsub.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=instsimplify -S < %s | FileCheck %s
declare i8 @llvm.sadd.sat.i8(i8, i8)
declare i8 @llvm.ssub.sat.i8(i8, i8)
declare i8 @llvm.uadd.sat.i8(i8, i8)
declare i8 @llvm.usub.sat.i8(i8, i8)
define i1 @uadd_sat_overflow(i8 %x, i8 %y) {
; CHECK-LABEL: @uadd_sat_overflow(
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[X:%.*]], -128
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[Y:%.*]], -128
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], -2
; CHECK-NEXT: ret i1 [[R]]
;
%lhs = or i8 %x, 128
%rhs = or i8 %y, 128
%exp = call i8 @llvm.uadd.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 254
ret i1 %r
}
define i1 @uadd_sat_overflow_fail(i8 %x, i8 %y) {
; CHECK-LABEL: @uadd_sat_overflow_fail(
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[X:%.*]], -128
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[Y:%.*]], 126
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], -2
; CHECK-NEXT: ret i1 [[R]]
;
%lhs = or i8 %x, 128
%rhs = or i8 %y, 126
%exp = call i8 @llvm.uadd.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 254
ret i1 %r
}
define i1 @usub_sat_overflow(i8 %x, i8 %y) {
; CHECK-LABEL: @usub_sat_overflow(
; CHECK-NEXT: [[LHS:%.*]] = and i8 [[X:%.*]], 127
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[Y:%.*]], -128
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%lhs = and i8 %x, 127
%rhs = or i8 %y, 128
%exp = call i8 @llvm.usub.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 1
ret i1 %r
}
define i1 @usub_sat_overflow_fail(i8 %x, i8 %y) {
; CHECK-LABEL: @usub_sat_overflow_fail(
; CHECK-NEXT: [[LHS:%.*]] = and i8 [[X:%.*]], 127
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[Y:%.*]], 126
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%lhs = and i8 %x, 127
%rhs = or i8 %y, 126
%exp = call i8 @llvm.usub.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 1
ret i1 %r
}
define i1 @sadd_sat_overflow_pos(i8 %x, i8 %y) {
; CHECK-LABEL: @sadd_sat_overflow_pos(
; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 127
; CHECK-NEXT: [[YY:%.*]] = and i8 [[Y:%.*]], 127
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[XX]], 64
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[YY]], 65
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.sadd.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], -128
; CHECK-NEXT: ret i1 [[R]]
;
%xx = and i8 %x, 127
%yy = and i8 %y, 127
%lhs = or i8 %xx, 64
%rhs = or i8 %yy, 65
%exp = call i8 @llvm.sadd.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 128
ret i1 %r
}
define i1 @sadd_sat_low_bits(i8 %x, i8 %y) {
; CHECK-LABEL: @sadd_sat_low_bits(
; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 15
; CHECK-NEXT: [[YY:%.*]] = and i8 [[Y:%.*]], 15
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[XX]], 1
; CHECK-NEXT: [[RHS:%.*]] = and i8 [[YY]], -2
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.sadd.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[AND:%.*]] = and i8 [[EXP]], 1
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%xx = and i8 %x, 15
%yy = and i8 %y, 15
%lhs = or i8 %xx, 1
%rhs = and i8 %yy, -2
%exp = call i8 @llvm.sadd.sat.i8(i8 %lhs, i8 %rhs)
%and = and i8 %exp, 1
%r = icmp eq i8 %and, 0
ret i1 %r
}
define i1 @sadd_sat_fail_may_overflow(i8 %x, i8 %y) {
; CHECK-LABEL: @sadd_sat_fail_may_overflow(
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[X:%.*]], 1
; CHECK-NEXT: [[RHS:%.*]] = and i8 [[Y:%.*]], -2
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.sadd.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[AND:%.*]] = and i8 [[EXP]], 1
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%lhs = or i8 %x, 1
%rhs = and i8 %y, -2
%exp = call i8 @llvm.sadd.sat.i8(i8 %lhs, i8 %rhs)
%and = and i8 %exp, 1
%r = icmp eq i8 %and, 0
ret i1 %r
}
define i1 @sadd_sat_overflow_neg(i8 %x, i8 %y) {
; CHECK-LABEL: @sadd_sat_overflow_neg(
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[X:%.*]], -64
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[Y:%.*]], -65
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.sadd.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], 127
; CHECK-NEXT: ret i1 [[R]]
;
%lhs = or i8 %x, 192
%rhs = or i8 %y, 191
%exp = call i8 @llvm.sadd.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 127
ret i1 %r
}
define i1 @ssub_sat_overflow_neg(i8 %x, i8 %y) {
; CHECK-LABEL: @ssub_sat_overflow_neg(
; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 112
; CHECK-NEXT: [[YY:%.*]] = and i8 [[Y:%.*]], 127
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[XX]], -128
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[YY]], 126
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.ssub.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], 32
; CHECK-NEXT: ret i1 [[R]]
;
%xx = and i8 %x, 112
%yy = and i8 %y, 127
%lhs = or i8 %xx, 128
%rhs = or i8 %yy, 126
%exp = call i8 @llvm.ssub.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 32
ret i1 %r
}
define i1 @ssub_sat_low_bits(i8 %x, i8 %y) {
; CHECK-LABEL: @ssub_sat_low_bits(
; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 15
; CHECK-NEXT: [[YY:%.*]] = and i8 [[Y:%.*]], 15
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[XX]], 17
; CHECK-NEXT: [[RHS:%.*]] = and i8 [[YY]], -2
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.ssub.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[AND:%.*]] = and i8 [[EXP]], 1
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%xx = and i8 %x, 15
%yy = and i8 %y, 15
%lhs = or i8 %xx, 17
%rhs = and i8 %yy, -2
%exp = call i8 @llvm.ssub.sat.i8(i8 %lhs, i8 %rhs)
%and = and i8 %exp, 1
%r = icmp eq i8 %and, 0
ret i1 %r
}
define i1 @ssub_sat_fail_may_overflow(i8 %x, i8 %y) {
; CHECK-LABEL: @ssub_sat_fail_may_overflow(
; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 15
; CHECK-NEXT: [[YY:%.*]] = and i8 [[Y:%.*]], 15
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[XX]], 1
; CHECK-NEXT: [[RHS:%.*]] = and i8 [[YY]], -2
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.ssub.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[AND:%.*]] = and i8 [[EXP]], 1
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%xx = and i8 %x, 15
%yy = and i8 %y, 15
%lhs = or i8 %xx, 1
%rhs = and i8 %yy, -2
%exp = call i8 @llvm.ssub.sat.i8(i8 %lhs, i8 %rhs)
%and = and i8 %exp, 1
%r = icmp eq i8 %and, 0
ret i1 %r
}
define i1 @ssub_sat_overflow_pos(i8 %x, i8 %y) {
; CHECK-LABEL: @ssub_sat_overflow_pos(
; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 24
; CHECK-NEXT: [[YY:%.*]] = and i8 [[Y:%.*]], 3
; CHECK-NEXT: [[LHS:%.*]] = or i8 [[XX]], 8
; CHECK-NEXT: [[RHS:%.*]] = or i8 [[YY]], -128
; CHECK-NEXT: [[EXP:%.*]] = call i8 @llvm.ssub.sat.i8(i8 [[LHS]], i8 [[RHS]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[EXP]], -128
; CHECK-NEXT: ret i1 [[R]]
;
%xx = and i8 %x, 24
%yy = and i8 %y, 3
%lhs = or i8 %xx, 8
%rhs = or i8 %yy, 128
%exp = call i8 @llvm.ssub.sat.i8(i8 %lhs, i8 %rhs)
%r = icmp eq i8 %exp, 128
ret i1 %r
}